ReactOS 0.4.16-dev-320-g3bd9ddc
Public Attributes | List of all members
CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX Union Reference

#include <Cpuid.h>

Collaboration diagram for CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX:
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Public Attributes

struct {
   UINT32   PREFETCHWT1: 1
 
   UINT32   AVX512_VBMI: 1
 
   UINT32   UMIP: 1
 
   UINT32   PKU: 1
 
   UINT32   OSPKE: 1
 
   UINT32   Reserved8: 8
 
   UINT32   TME_EN: 1
 
   UINT32   AVX512_VPOPCNTDQ: 1
 
   UINT32   Reserved7: 1
 
   UINT32   FiveLevelPage: 1
 
   UINT32   MAWAU: 5
 
   UINT32   RDPID: 1
 
   UINT32   Reserved3: 7
 
   UINT32   SGX_LC: 1
 
   UINT32   Reserved4: 1
 
} Bits
 
UINT32 Uint32
 

Detailed Description

CPUID Structured Extended Feature Flags Enumeration in ECX for CPUID leaf CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS sub leaf CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_SUB_LEAF_INFO.

Definition at line 1466 of file Cpuid.h.

Member Data Documentation

◆ AVX512_VBMI

UINT32 CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX::AVX512_VBMI

[Bit 1] AVX512_VBMI.

Definition at line 1479 of file Cpuid.h.

◆ AVX512_VPOPCNTDQ

UINT32 CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX::AVX512_VPOPCNTDQ

[Bits 14] AVX512_VPOPCNTDQ. (Intel Xeon Phi only.).

Definition at line 1502 of file Cpuid.h.

◆ 

struct { ... } CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX::Bits

Individual bit fields

◆ FiveLevelPage

UINT32 CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX::FiveLevelPage

[Bits 16] Supports 5-level paging if 1.

Definition at line 1507 of file Cpuid.h.

◆ MAWAU

UINT32 CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX::MAWAU

[Bits 21:17] The value of MAWAU used by the BNDLDX and BNDSTX instructions in 64-bit mode.

Definition at line 1512 of file Cpuid.h.

◆ OSPKE

UINT32 CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX::OSPKE

[Bit 4] If 1, OS has set CR4.PKE to enable protection keys (and the RDPKRU/WRPKRU instructions).

Definition at line 1492 of file Cpuid.h.

◆ PKU

UINT32 CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX::PKU

[Bit 3] Supports protection keys for user-mode pages if 1.

Definition at line 1487 of file Cpuid.h.

◆ PREFETCHWT1

UINT32 CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX::PREFETCHWT1

[Bit 0] If 1 indicates the processor supports the PREFETCHWT1 instruction. (Intel Xeon Phi only.)

Definition at line 1475 of file Cpuid.h.

◆ RDPID

UINT32 CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX::RDPID

[Bit 22] RDPID and IA32_TSC_AUX are available if 1.

Definition at line 1516 of file Cpuid.h.

◆ Reserved3

UINT32 CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX::Reserved3

Definition at line 1517 of file Cpuid.h.

◆ Reserved4

UINT32 CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX::Reserved4

Definition at line 1522 of file Cpuid.h.

◆ Reserved7

UINT32 CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX::Reserved7

Definition at line 1503 of file Cpuid.h.

◆ Reserved8

UINT32 CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX::Reserved8

Definition at line 1493 of file Cpuid.h.

◆ SGX_LC

UINT32 CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX::SGX_LC

[Bit 30] Supports SGX Launch Configuration if 1.

Definition at line 1521 of file Cpuid.h.

◆ TME_EN

UINT32 CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX::TME_EN

[Bit 13] If 1, the following MSRs are supported: IA32_TME_CAPABILITY, IA32_TME_ACTIVATE, IA32_TME_EXCLUDE_MASK, and IA32_TME_EXCLUDE_BASE.

Definition at line 1498 of file Cpuid.h.

◆ Uint32

UINT32 CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX::Uint32

All bit fields as a 32-bit value

Definition at line 1527 of file Cpuid.h.

◆ UMIP

UINT32 CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX::UMIP

[Bit 2] Supports user-mode instruction prevention if 1.

Definition at line 1483 of file Cpuid.h.

The documentation for this union was generated from the following file: