enum | _tag_ARMINTR_BANKED_REG {
_ARM_BANKED_R8_USR = 0x0
, _ARM_BANKED_R9_USR = 0x1
, _ARM_BANKED_R10_USR = 0x2
, _ARM_BANKED_R11_USR = 0x3
,
_ARM_BANKED_R12_USR = 0x4
, _ARM_BANKED_R13_USR = 0x5
, _ARM_BANKED_SP_USR = 0x5
, _ARM_BANKED_R14_USR = 0x6
,
_ARM_BANKED_LR_USR = 0x6
, _ARM_BANKED_R8_FIQ = 0x8
, _ARM_BANKED_R9_FIQ = 0x9
, _ARM_BANKED_R10_FIQ = 0xA
,
_ARM_BANKED_R11_FIQ = 0xB
, _ARM_BANKED_R12_FIQ = 0xC
, _ARM_BANKED_R13_FIQ = 0xD
, _ARM_BANKED_SP_FIQ = 0xD
,
_ARM_BANKED_R14_FIQ = 0xE
, _ARM_BANKED_LR_FIQ = 0xE
, _ARM_BANKED_R14_IRQ = 0x10
, _ARM_BANKED_LR_IRQ = 0x10
,
_ARM_BANKED_R13_IRQ = 0x11
, _ARM_BANKED_SP_IRQ = 0x11
, _ARM_BANKED_R14_SVC = 0x12
, _ARM_BANKED_LR_SVC = 0x12
,
_ARM_BANKED_R13_SVC = 0x13
, _ARM_BANKED_SP_SVC = 0x13
, _ARM_BANKED_R14_ABT = 0x14
, _ARM_BANKED_LR_ABT = 0x14
,
_ARM_BANKED_R13_ABT = 0x15
, _ARM_BANKED_SP_ABT = 0x15
, _ARM_BANKED_R14_UND = 0x16
, _ARM_BANKED_LR_UND = 0x16
,
_ARM_BANKED_R13_UND = 0x17
, _ARM_BANKED_SP_UND = 0x17
, _ARM_BANKED_R14_MON = 0x1C
, _ARM_BANKED_LR_MON = 0x1C
,
_ARM_BANKED_R13_MON = 0x1D
, _ARM_BANKED_SP_MON = 0x1D
, _ARM_BANKED_ELR_HYP = 0x1E
, _ARM_BANKED_R13_HYP = 0x1F
,
_ARM_BANKED_SP_HYP = 0x1F
, _ARM_BANKED_SPSR_FIQ = 0x2E
, _ARM_BANKED_SPSR_IRQ = 0x30
, _ARM_BANKED_SPSR_SVC = 0x32
,
_ARM_BANKED_SPSR_ABT = 0x34
, _ARM_BANKED_SPSR_UND = 0x36
, _ARM_BANKED_SPSR_MON = 0x3C
, _ARM_BANKED_SPSR_HYP = 0x3E
} |