#include <Cpuid.h>

Collaboration diagram for CPUID_EXTENDED_STATE_SIZE_OFFSET_ECX:

[legend]

Public Attributes
struct {
UINT32 XSS: 1

UINT32 Aligned: 1

UINT32 Reserved: 30

}	Bits

UINT32	Uint32

Detailed Description

CPUID Extended State Information ECX for CPUID leaf CPUID_EXTENDED_STATE, sub-leaf CPUID_EXTENDED_STATE_SIZE_OFFSET.

Definition at line 2180 of file Cpuid.h.

Member Data Documentation

◆ Aligned

UINT32 CPUID_EXTENDED_STATE_SIZE_OFFSET_ECX::Aligned

[Bit 1] is set if, when the compacted format of an XSAVE area is used, this extended state component located on the next 64-byte boundary following the preceding state component (otherwise, it is located immediately following the preceding state component).

Definition at line 2197 of file Cpuid.h.

◆

struct { ... } CPUID_EXTENDED_STATE_SIZE_OFFSET_ECX::Bits

Individual bit fields

Referenced by GetExpectedXStateConfig(), and KiGetXStateConfiguration().

◆ Reserved

UINT32 CPUID_EXTENDED_STATE_SIZE_OFFSET_ECX::Reserved

Definition at line 2198 of file Cpuid.h.

◆ Uint32

UINT32 CPUID_EXTENDED_STATE_SIZE_OFFSET_ECX::Uint32

All bit fields as a 32-bit value

Definition at line 2203 of file Cpuid.h.

◆ XSS

UINT32 CPUID_EXTENDED_STATE_SIZE_OFFSET_ECX::XSS

[Bit 0] Is set if the bit n (corresponding to the sub-leaf index) is supported in the IA32_XSS MSR; it is clear if bit n is instead supported in XCR0.

Definition at line 2190 of file Cpuid.h.

The documentation for this union was generated from the following file:

sdk/include/reactos/x86x64/Intel/Cpuid.h