ReactOS 0.4.15-dev-8028-g8e799e2
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CPUID_AMD_VIR_PHY_ADDRESS_SIZE_EAX Union Reference

#include <Cpuid.h>

Collaboration diagram for CPUID_AMD_VIR_PHY_ADDRESS_SIZE_EAX:
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Public Attributes

struct {
   UINT32   PhysicalAddressBits: 8
 
   UINT32   LinearAddressBits: 8
 
   UINT32   GuestPhysAddrSize: 8
 
   UINT32   Reserved: 8
 
} Bits
 
UINT32 Uint32
 

Detailed Description

CPUID Linear Physical Address Size

Parameters
EAXCPUID_VIR_PHY_ADDRESS_SIZE (0x80000008)
Return values
EAXLinear/Physical Address Size described by the type CPUID_AMD_VIR_PHY_ADDRESS_SIZE_EAX.
EBXLinear/Physical Address Size described by the type CPUID_AMD_VIR_PHY_ADDRESS_SIZE_EBX.
ECXLinear/Physical Address Size described by the type CPUID_AMD_VIR_PHY_ADDRESS_SIZE_ECX.
EDXReserved. CPUID Linear Physical Address Size EAX for CPUID leaf CPUID_VIR_PHY_ADDRESS_SIZE.

Definition at line 410 of file Cpuid.h.

Member Data Documentation

◆ 

struct { ... } CPUID_AMD_VIR_PHY_ADDRESS_SIZE_EAX::Bits

Individual bit fields

◆ GuestPhysAddrSize

UINT32 CPUID_AMD_VIR_PHY_ADDRESS_SIZE_EAX::GuestPhysAddrSize

[Bits 23:16] Maximum guest physical byte address size in bits.

Definition at line 426 of file Cpuid.h.

◆ LinearAddressBits

UINT32 CPUID_AMD_VIR_PHY_ADDRESS_SIZE_EAX::LinearAddressBits

[Bits 15:8] Maximum linear byte address size in bits.

Definition at line 422 of file Cpuid.h.

◆ PhysicalAddressBits

UINT32 CPUID_AMD_VIR_PHY_ADDRESS_SIZE_EAX::PhysicalAddressBits

[Bits 7:0] Maximum physical byte address size in bits.

Definition at line 418 of file Cpuid.h.

◆ Reserved

UINT32 CPUID_AMD_VIR_PHY_ADDRESS_SIZE_EAX::Reserved

[Bit 31:24] Reserved.

Definition at line 430 of file Cpuid.h.

◆ Uint32

UINT32 CPUID_AMD_VIR_PHY_ADDRESS_SIZE_EAX::Uint32

All bit fields as a 32-bit value

Definition at line 435 of file Cpuid.h.

The documentation for this union was generated from the following file: