Data Structures |
| union | PIDE_REGISTERS_1 |
| struct | PIDE_REGISTERS_1::_o |
| struct | PIDE_REGISTERS_1::_i |
| struct | PIDE_REGISTERS_2 |
| struct | PMODE_SENSE_10 |
| struct | PMODE_SELECT_10 |
| struct | PMODE_PARAMETER_HEADER_10 |
| union | PATAPI_REGISTERS_1 |
| struct | PATAPI_REGISTERS_1::_o |
| struct | PATAPI_REGISTERS_1::_i |
| struct | PIDENTIFY_DATA |
Defines |
| #define | PRINT_PREFIX "UniATA: " |
| #define | KdPrint3(_x_) {;} |
| #define | KdPrint2(_x_) {;} |
| #define | KdPrint(_x_) {;} |
| #define | Connect_DbgPrint() {;} |
| #define | AtapiStallExecution(dt) ScsiPortStallExecution(dt) |
| #define | IDX_IO1 0 |
| #define | IDX_IO1_SZ sizeof(IDE_REGISTERS_1) |
| #define | IDX_IO1 0 |
| #define | IDX_IO1_SZ sizeof(IDE_REGISTERS_1) |
| #define | IDX_IO1_i_Data (FIELD_OFFSET(IDE_REGISTERS_1, i.Data )+IDX_IO1) |
| #define | IDX_IO1_i_Error (FIELD_OFFSET(IDE_REGISTERS_1, i.Error )+IDX_IO1) |
| #define | IDX_IO1_i_BlockCount (FIELD_OFFSET(IDE_REGISTERS_1, i.BlockCount )+IDX_IO1) |
| #define | IDX_IO1_i_BlockNumber (FIELD_OFFSET(IDE_REGISTERS_1, i.BlockNumber )+IDX_IO1) |
| #define | IDX_IO1_i_CylinderLow (FIELD_OFFSET(IDE_REGISTERS_1, i.CylinderLow )+IDX_IO1) |
| #define | IDX_IO1_i_CylinderHigh (FIELD_OFFSET(IDE_REGISTERS_1, i.CylinderHigh)+IDX_IO1) |
| #define | IDX_IO1_i_DriveSelect (FIELD_OFFSET(IDE_REGISTERS_1, i.DriveSelect )+IDX_IO1) |
| #define | IDX_IO1_i_Status (FIELD_OFFSET(IDE_REGISTERS_1, i.Status )+IDX_IO1) |
| #define | IDX_IO1_o IDX_IO1_SZ |
| #define | IDX_IO1_o_SZ sizeof(IDE_REGISTERS_1) |
| #define | IDX_IO1_o_Data (FIELD_OFFSET(IDE_REGISTERS_1, o.Data )+IDX_IO1_o) |
| #define | IDX_IO1_o_Feature (FIELD_OFFSET(IDE_REGISTERS_1, o.Feature )+IDX_IO1_o) |
| #define | IDX_IO1_o_BlockCount (FIELD_OFFSET(IDE_REGISTERS_1, o.BlockCount )+IDX_IO1_o) |
| #define | IDX_IO1_o_BlockNumber (FIELD_OFFSET(IDE_REGISTERS_1, o.BlockNumber )+IDX_IO1_o) |
| #define | IDX_IO1_o_CylinderLow (FIELD_OFFSET(IDE_REGISTERS_1, o.CylinderLow )+IDX_IO1_o) |
| #define | IDX_IO1_o_CylinderHigh (FIELD_OFFSET(IDE_REGISTERS_1, o.CylinderHigh)+IDX_IO1_o) |
| #define | IDX_IO1_o_DriveSelect (FIELD_OFFSET(IDE_REGISTERS_1, o.DriveSelect )+IDX_IO1_o) |
| #define | IDX_IO1_o_Command (FIELD_OFFSET(IDE_REGISTERS_1, o.Command )+IDX_IO1_o) |
| #define | IDX_IO2 (IDX_IO1_o+IDX_IO1_o_SZ) |
| #define | IDX_IO2_SZ sizeof(IDE_REGISTERS_2) |
| #define | IDX_IO2_AltStatus (FIELD_OFFSET(IDE_REGISTERS_2, AltStatus )+IDX_IO2) |
| #define | IDX_IO2_DriveAddress (FIELD_OFFSET(IDE_REGISTERS_2, DriveAddress)+IDX_IO2) |
| #define | IDX_IO2_o (IDX_IO2+IDX_IO2_SZ) |
| #define | IDX_IO2_o_SZ sizeof(IDE_REGISTERS_2) |
| #define | IDX_IO2_o_Control (FIELD_OFFSET(IDE_REGISTERS_2, AltStatus )+IDX_IO2_o) |
| #define | DFLAGS_DEVICE_PRESENT 0x0001 |
| #define | DFLAGS_ATAPI_DEVICE 0x0002 |
| #define | DFLAGS_TAPE_DEVICE 0x0004 |
| #define | DFLAGS_INT_DRQ 0x0008 |
| #define | DFLAGS_REMOVABLE_DRIVE 0x0010 |
| #define | DFLAGS_MEDIA_STATUS_ENABLED 0x0020 |
| #define | DFLAGS_ATAPI_CHANGER 0x0040 |
| #define | DFLAGS_SANYO_ATAPI_CHANGER 0x0080 |
| #define | DFLAGS_CHANGER_INITED 0x0100 |
| #define | DFLAGS_LBA_ENABLED 0x0200 |
| #define | DFLAGS_DWORDIO_ENABLED 0x0400 |
| #define | DFLAGS_WCACHE_ENABLED 0x0800 |
| #define | DFLAGS_RCACHE_ENABLED 0x1000 |
| #define | DFLAGS_ORIG_GEOMETRY 0x2000 |
| #define | DFLAGS_REINIT_DMA 0x4000 |
| #define | DFLAGS_HIDDEN 0x8000 |
| #define | MAX_ERRORS 4 |
| #define | ATAPI_MODE_SENSE 0x5A |
| #define | ATAPI_MODE_SELECT 0x55 |
| #define | ATAPI_FORMAT_UNIT 0x24 |
| #define | IDE_COMMAND_ATAPI_RESET 0x08 |
| #define | IDE_COMMAND_RECALIBRATE 0x10 |
| #define | IDE_COMMAND_READ 0x20 |
| #define | IDE_COMMAND_READ_NO_RETR 0x21 |
| #define | IDE_COMMAND_READ48 0x24 |
| #define | IDE_COMMAND_READ_DMA48 0x25 |
| #define | IDE_COMMAND_READ_DMA_Q48 0x26 |
| #define | IDE_COMMAND_READ_NATIVE_SIZE48 0x27 |
| #define | IDE_COMMAND_READ_MUL48 0x29 |
| #define | IDE_COMMAND_READ_STREAM_DMA48 0x2A |
| #define | IDE_COMMAND_READ_STREAM48 0x2B |
| #define | IDE_COMMAND_READ_LOG48 0x2f |
| #define | IDE_COMMAND_WRITE 0x30 |
| #define | IDE_COMMAND_WRITE_NO_RETR 0x31 |
| #define | IDE_COMMAND_WRITE48 0x34 |
| #define | IDE_COMMAND_WRITE_DMA48 0x35 |
| #define | IDE_COMMAND_WRITE_DMA_Q48 0x36 |
| #define | IDE_COMMAND_SET_NATIVE_SIZE48 0x37 |
| #define | IDE_COMMAND_WRITE_MUL48 0x39 |
| #define | IDE_COMMAND_WRITE_STREAM_DMA48 0x3a |
| #define | IDE_COMMAND_WRITE_STREAM48 0x3b |
| #define | IDE_COMMAND_WRITE_FUA_DMA48 0x3d |
| #define | IDE_COMMAND_WRITE_FUA_DMA_Q48 0x3e |
| #define | IDE_COMMAND_WRITE_LOG48 0x3f |
| #define | IDE_COMMAND_VERIFY 0x40 |
| #define | IDE_COMMAND_VERIFY48 0x42 |
| #define | IDE_COMMAND_READ_LOG_DMA48 0x47 |
| #define | IDE_COMMAND_WRITE_LOG_DMA48 0x57 |
| #define | IDE_COMMAND_TRUSTED_RCV 0x5c |
| #define | IDE_COMMAND_TRUSTED_RCV_DMA 0x5d |
| #define | IDE_COMMAND_TRUSTED_SEND 0x5e |
| #define | IDE_COMMAND_TRUSTED_SEND_DMA 0x5f |
| #define | IDE_COMMAND_SEEK 0x70 |
| #define | IDE_COMMAND_SET_DRIVE_PARAMETERS 0x91 |
| #define | IDE_COMMAND_ATAPI_PACKET 0xA0 |
| #define | IDE_COMMAND_ATAPI_IDENTIFY 0xA1 |
| #define | IDE_COMMAND_READ_MULTIPLE 0xC4 |
| #define | IDE_COMMAND_WRITE_MULTIPLE 0xC5 |
| #define | IDE_COMMAND_SET_MULTIPLE 0xC6 |
| #define | IDE_COMMAND_READ_DMA_Q 0xC7 |
| #define | IDE_COMMAND_READ_DMA 0xC8 |
| #define | IDE_COMMAND_WRITE_DMA 0xCA |
| #define | IDE_COMMAND_WRITE_DMA_Q 0xCC |
| #define | IDE_COMMAND_WRITE_MUL_FUA48 0xCE |
| #define | IDE_COMMAND_GET_MEDIA_STATUS 0xDA |
| #define | IDE_COMMAND_DOOR_LOCK 0xDE |
| #define | IDE_COMMAND_DOOR_UNLOCK 0xDF |
| #define | IDE_COMMAND_STANDBY_IMMED 0xE0 |
| #define | IDE_COMMAND_STANDBY 0xE2 |
| #define | IDE_COMMAND_READ_PM 0xE4 |
| #define | IDE_COMMAND_SLEEP 0xE6 |
| #define | IDE_COMMAND_FLUSH_CACHE 0xE7 |
| #define | IDE_COMMAND_WRITE_PM 0xE8 |
| #define | IDE_COMMAND_IDENTIFY 0xEC |
| #define | IDE_COMMAND_MEDIA_EJECT 0xED |
| #define | IDE_COMMAND_FLUSH_CACHE48 0xEA |
| #define | IDE_COMMAND_ENABLE_MEDIA_STATUS 0xEF |
| #define | IDE_COMMAND_SET_FEATURES |
| #define | IDE_COMMAND_READ_NATIVE_SIZE 0xF8 |
| #define | IDE_COMMAND_SET_NATIVE_SIZE 0xF9 |
| #define | SCSIOP_ATA_PASSTHROUGH 0xCC |
| #define | IDE_STATUS_SUCCESS 0x00 |
| #define | IDE_STATUS_ERROR 0x01 |
| #define | IDE_STATUS_INDEX 0x02 |
| #define | IDE_STATUS_CORRECTED_ERROR 0x04 |
| #define | IDE_STATUS_DRQ 0x08 |
| #define | IDE_STATUS_DSC 0x10 |
| #define | IDE_STATUS_DMA 0x20 /* DMA ready */ |
| #define | IDE_STATUS_DWF 0x20 /* drive write fault */ |
| #define | IDE_STATUS_DRDY 0x40 |
| #define | IDE_STATUS_IDLE 0x50 |
| #define | IDE_STATUS_BUSY 0x80 |
| #define | IDE_DRIVE_SELECT 0xA0 |
| #define | IDE_DRIVE_1 0x00 |
| #define | IDE_DRIVE_2 0x10 |
| #define | IDE_DRIVE_SELECT_1 (IDE_DRIVE_SELECT | IDE_DRIVE_1) |
| #define | IDE_DRIVE_SELECT_2 (IDE_DRIVE_SELECT | IDE_DRIVE_2) |
| #define | IDE_USE_LBA 0x40 |
| #define | IDE_DC_DISABLE_INTERRUPTS 0x02 |
| #define | IDE_DC_RESET_CONTROLLER 0x04 |
| #define | IDE_DC_A_4BIT 0x80 |
| #define | IDE_DC_USE_HOB 0x80 |
| #define | IDE_DC_REENABLE_CONTROLLER 0x00 |
| #define | IDE_ERROR_ICRC 0x80 |
| #define | IDE_ERROR_BAD_BLOCK 0x80 |
| #define | IDE_ERROR_DATA_ERROR 0x40 |
| #define | IDE_ERROR_MEDIA_CHANGE 0x20 |
| #define | IDE_ERROR_ID_NOT_FOUND 0x10 |
| #define | IDE_ERROR_MEDIA_CHANGE_REQ 0x08 |
| #define | IDE_ERROR_COMMAND_ABORTED 0x04 |
| #define | IDE_ERROR_END_OF_MEDIA 0x02 |
| #define | IDE_ERROR_NO_MEDIA 0x02 |
| #define | IDE_ERROR_ILLEGAL_LENGTH 0x01 |
| #define | IDX_ATAPI_IO1 IDX_IO1 |
| #define | IDX_ATAPI_IO1_SZ sizeof(ATAPI_REGISTERS_1) |
| #define | IDX_ATAPI_IO1_i_Data (FIELD_OFFSET(ATAPI_REGISTERS_1, i.Data )+IDX_ATAPI_IO1) |
| #define | IDX_ATAPI_IO1_i_Error (FIELD_OFFSET(ATAPI_REGISTERS_1, i.Error )+IDX_ATAPI_IO1) |
| #define | IDX_ATAPI_IO1_i_InterruptReason (FIELD_OFFSET(ATAPI_REGISTERS_1, i.InterruptReason)+IDX_ATAPI_IO1) |
| #define | IDX_ATAPI_IO1_i_Unused1 (FIELD_OFFSET(ATAPI_REGISTERS_1, i.Unused1 )+IDX_ATAPI_IO1) |
| #define | IDX_ATAPI_IO1_i_ByteCountLow (FIELD_OFFSET(ATAPI_REGISTERS_1, i.ByteCountLow )+IDX_ATAPI_IO1) |
| #define | IDX_ATAPI_IO1_i_ByteCountHigh (FIELD_OFFSET(ATAPI_REGISTERS_1, i.ByteCountHigh )+IDX_ATAPI_IO1) |
| #define | IDX_ATAPI_IO1_i_DriveSelect (FIELD_OFFSET(ATAPI_REGISTERS_1, i.DriveSelect )+IDX_ATAPI_IO1) |
| #define | IDX_ATAPI_IO1_i_Status (FIELD_OFFSET(ATAPI_REGISTERS_1, i.Status )+IDX_ATAPI_IO1) |
| #define | IDX_ATAPI_IO1_o_Data (FIELD_OFFSET(ATAPI_REGISTERS_1, o.Data )+IDX_ATAPI_IO1) |
| #define | IDX_ATAPI_IO1_o_Feature (FIELD_OFFSET(ATAPI_REGISTERS_1, o.Feature )+IDX_ATAPI_IO1) |
| #define | IDX_ATAPI_IO1_o_Unused0 (FIELD_OFFSET(ATAPI_REGISTERS_1, o.Unused0 )+IDX_ATAPI_IO1) |
| #define | IDX_ATAPI_IO1_o_Unused1 (FIELD_OFFSET(ATAPI_REGISTERS_1, o.Unused1 )+IDX_ATAPI_IO1) |
| #define | IDX_ATAPI_IO1_o_ByteCountLow (FIELD_OFFSET(ATAPI_REGISTERS_1, o.ByteCountLow )+IDX_ATAPI_IO1) |
| #define | IDX_ATAPI_IO1_o_ByteCountHigh (FIELD_OFFSET(ATAPI_REGISTERS_1, o.ByteCountHigh)+IDX_ATAPI_IO1) |
| #define | IDX_ATAPI_IO1_o_DriveSelect (FIELD_OFFSET(ATAPI_REGISTERS_1, o.DriveSelect )+IDX_ATAPI_IO1) |
| #define | IDX_ATAPI_IO1_o_Command (FIELD_OFFSET(ATAPI_REGISTERS_1, o.Command )+IDX_ATAPI_IO1) |
| #define | ATAPI_IR_COD 0x01 |
| #define | ATAPI_IR_IO 0x02 |
| #define | ATA_F_DMA 0x01 /* enable DMA */ |
| #define | ATA_F_OVL 0x02 /* enable overlap */ |
| #define | ATA_C_F_SETXFER 0x03 /* set transfer mode */ |
| #define | ATA_C_F_ENAB_WCACHE 0x02 /* enable write cache */ |
| #define | ATA_C_F_DIS_WCACHE 0x82 /* disable write cache */ |
| #define | ATA_C_F_ENAB_RCACHE 0xaa /* enable readahead cache */ |
| #define | ATA_C_F_DIS_RCACHE 0x55 /* disable readahead cache */ |
| #define | ATA_C_F_ENAB_RELIRQ 0x5d /* enable release interrupt */ |
| #define | ATA_C_F_DIS_RELIRQ 0xdd /* disable release interrupt */ |
| #define | ATA_C_F_ENAB_SRVIRQ 0x5e /* enable service interrupt */ |
| #define | ATA_C_F_DIS_SRVIRQ 0xde /* disable service interrupt */ |
| #define | ATA_C_F_ENAB_MEDIASTAT 0x95 /* enable media status */ |
| #define | ATA_C_F_DIS_MEDIASTAT 0x31 /* disable media status */ |
| #define | ATA_I_CMD 0x01 /* cmd (1) | data (0) */ |
| #define | ATA_I_IN 0x02 /* read (1) | write (0) */ |
| #define | ATA_I_RELEASE 0x04 /* released bus (1) */ |
| #define | ATA_I_TAGMASK 0xf8 /* tag mask */ |
| #define | ATAPI_PSIZE_12 0 /* 12 bytes */ |
| #define | ATAPI_PSIZE_16 1 /* 16 bytes */ |
| #define | ATAPI_DRQT_MPROC 0 /* cpu 3 ms delay */ |
| #define | ATAPI_DRQT_INTR 1 /* intr 10 ms delay */ |
| #define | ATAPI_DRQT_ACCEL 2 /* accel 50 us delay */ |
| #define | ATAPI_TYPE_DIRECT 0 /* disk/floppy */ |
| #define | ATAPI_TYPE_TAPE 1 /* streaming tape */ |
| #define | ATAPI_TYPE_CDROM 5 /* CD-ROM device */ |
| #define | ATAPI_TYPE_OPTICAL 7 /* optical disk */ |
| #define | ATAPI_PROTO_ATAPI 2 |
| #define | ATA_BT_SINGLEPORTSECTOR 1 /* 1 port, 1 sector buffer */ |
| #define | ATA_BT_DUALPORTMULTI 2 /* 2 port, mult sector buffer */ |
| #define | ATA_BT_DUALPORTMULTICACHE 3 /* above plus track cache */ |
| #define | AdvancedPIOModes_3 1 |
| #define | AdvancedPIOModes_4 2 |
| #define | AdvancedPIOModes_5 4 |
| #define | ATA_SATA_GEN1 0x0002 |
| #define | ATA_SATA_GEN2 0x0004 |
| #define | ATA_SATA_GEN3 0x0008 |
| #define | ATA_SUPPORT_NCQ 0x0100 |
| #define | ATA_SUPPORT_IFPWRMNGTRCV 0x0200 |
| #define | ATA_SUPPORT_NONZERO 0x0002 |
| #define | ATA_SUPPORT_AUTOACTIVATE 0x0004 |
| #define | ATA_SUPPORT_IFPWRMNGT 0x0008 |
| #define | ATA_SUPPORT_INORDERDATA 0x0010 |
| #define | IDENTIFY_DATA2 IDENTIFY_DATA |
| #define | PIDENTIFY_DATA2 PIDENTIFY_DATA |
| #define | IDENTIFY_DATA_SIZE sizeof(IDENTIFY_DATA) |
| #define | IDENTIFY_DMA_CYCLES_MODE_0 0x00 |
| #define | IDENTIFY_DMA_CYCLES_MODE_1 0x01 |
| #define | IDENTIFY_DMA_CYCLES_MODE_2 0x02 |
| #define | GetStatus(chan, Status) Status = AtapiReadPort1(chan, IDX_IO2_AltStatus); |
| #define | GetBaseStatus(chan, pStatus) pStatus = AtapiReadPort1(chan, IDX_IO1_i_Status); |
| #define | WriteCommand(chan, _Command) AtapiWritePort1(chan, IDX_IO1_o_Command, _Command); |
| #define | SelectDrive(chan, unit) |
| #define | ReadBuffer(chan, Buffer, Count, timing) |
| #define | WriteBuffer(chan, Buffer, Count, timing) |
| #define | ReadBuffer2(chan, Buffer, Count, timing) |
| #define | WriteBuffer2(chan, Buffer, Count, timing) |
| #define | IS_RDP(OperationCode) |
| #define | AtapiCopyMemory RtlCopyMemory |
| #define | AtapiStringCmp(s1, s2, n) _strnicmp(s1, s2, n) |
| #define | INTERRUPT_REASON_IGNORE 0 |
| #define | INTERRUPT_REASON_OUR 1 |
| #define | INTERRUPT_REASON_UNEXPECTED 2 |
| #define | UNIATA_FIND_DEV_UNHIDE 0x01 |
| #define | CHAN_NOT_SPECIFIED (0xffffffffL) |
| #define | CHAN_NOT_SPECIFIED_CHECK_CABLE (0xfffffffeL) |
| #define | DEVNUM_NOT_SPECIFIED (0xffffffffL) |
| #define | IOMODE_NOT_SPECIFIED (0xffffffffL) |
| #define | ATA_CMD_FLAG_LBAIOsupp 0x01 |
| #define | ATA_CMD_FLAG_48supp 0x02 |
| #define | ATA_CMD_FLAG_48 0x04 |
| #define | ATA_CMD_FLAG_DMA 0x08 |
| #define | UniAta_need_lba48(command, lba, count, supp48) |
| #define | PrintNtConsole(x) {;} |
Functions |
| UCHAR DDKFASTAPI | WaitOnBusy (IN struct _HW_CHANNEL *chan) |
| UCHAR DDKFASTAPI | WaitOnBusyLong (IN struct _HW_CHANNEL *chan) |
| UCHAR DDKFASTAPI | WaitOnBaseBusy (IN struct _HW_CHANNEL *chan) |
| UCHAR DDKFASTAPI | WaitOnBaseBusyLong (IN struct _HW_CHANNEL *chan) |
| UCHAR DDKFASTAPI | WaitForDrq (IN struct _HW_CHANNEL *chan) |
| UCHAR DDKFASTAPI | WaitShortForDrq (IN struct _HW_CHANNEL *chan) |
| VOID DDKFASTAPI | AtapiSoftReset (IN struct _HW_CHANNEL *chan, ULONG DeviceNumber) |
| PSCSI_REQUEST_BLOCK NTAPI | BuildMechanismStatusSrb (IN PVOID HwDeviceExtension, IN PSCSI_REQUEST_BLOCK Srb) |
| PSCSI_REQUEST_BLOCK NTAPI | BuildRequestSenseSrb (IN PVOID HwDeviceExtension, IN PSCSI_REQUEST_BLOCK Srb) |
| VOID NTAPI | AtapiHwInitializeChanger (IN PVOID HwDeviceExtension, IN ULONG TargetId, IN PMECHANICAL_STATUS_INFORMATION_HEADER MechanismStatus) |
| ULONG NTAPI | AtapiSendCommand (IN PVOID HwDeviceExtension, IN PSCSI_REQUEST_BLOCK Srb, IN ULONG CmdAction) |
| ULONG NTAPI | IdeSendCommand (IN PVOID HwDeviceExtension, IN PSCSI_REQUEST_BLOCK Srb, IN ULONG CmdAction) |
| VOID NTAPI | AtapiHexToString (ULONG Value, PCHAR *Buffer) |
| BOOLEAN NTAPI | AtapiInterrupt (IN PVOID HwDeviceExtension) |
| BOOLEAN NTAPI | AtapiInterrupt__ (IN PVOID HwDeviceExtension, IN UCHAR c) |
| UCHAR NTAPI | AtapiCheckInterrupt__ (IN PVOID HwDeviceExtension, IN UCHAR c) |
| BOOLEAN NTAPI | AtapiHwInitialize (IN PVOID HwDeviceExtension) |
| ULONG NTAPI | IdeBuildSenseBuffer (IN PVOID HwDeviceExtension, IN PSCSI_REQUEST_BLOCK Srb) |
| VOID NTAPI | IdeMediaStatus (BOOLEAN EnableMSN, IN PVOID HwDeviceExtension, IN ULONG lChannel, IN ULONG DeviceNumber) |
| ULONG NTAPI | AtapiFindController (IN PVOID HwDeviceExtension, IN PVOID Context, IN PVOID BusInformation, IN PCHAR ArgumentString, IN OUT PPORT_CONFIGURATION_INFORMATION ConfigInfo, OUT PBOOLEAN Again) |
| ULONG NTAPI | AtapiParseArgumentString (IN PCCH String, IN PCCH KeyWord) |
| BOOLEAN NTAPI | IssueIdentify (IN PVOID HwDeviceExtension, IN ULONG DeviceNumber, IN ULONG Channel, IN UCHAR Command, IN BOOLEAN NoSetup) |
| BOOLEAN NTAPI | SetDriveParameters (IN PVOID HwDeviceExtension, IN ULONG DeviceNumber, IN ULONG Channel) |
| ULONG NTAPI | CheckDevice (IN PVOID HwDeviceExtension, IN ULONG Channel, IN ULONG deviceNumber, IN BOOLEAN ResetBus) |
| BOOLEAN NTAPI | FindDevices (IN PVOID HwDeviceExtension, IN ULONG Flags, IN ULONG Channel) |
| BOOLEAN NTAPI | AtapiResetController (IN PVOID HwDeviceExtension, IN ULONG PathId) |
| BOOLEAN NTAPI | AtapiStartIo (IN PVOID HwDeviceExtension, IN PSCSI_REQUEST_BLOCK Srb) |
| BOOLEAN NTAPI | AtapiStartIo__ (IN PVOID HwDeviceExtension, IN PSCSI_REQUEST_BLOCK Srb, IN BOOLEAN TopLevel) |
| UCHAR NTAPI | AtaCommand48 (IN struct _HW_DEVICE_EXTENSION *deviceExtension, IN ULONG DeviceNumber, IN ULONG Channel, IN UCHAR command, IN ULONGLONG lba, IN USHORT count, IN USHORT feature, IN ULONG flags) |
| UCHAR NTAPI | AtaCommand (IN struct _HW_DEVICE_EXTENSION *deviceExtension, IN ULONG DeviceNumber, IN ULONG Channel, IN UCHAR command, IN USHORT cylinder, IN UCHAR head, IN UCHAR sector, IN UCHAR count, IN UCHAR feature, IN ULONG flags) |
| LONG NTAPI | AtaPioMode (PIDENTIFY_DATA2 ident) |
| LONG NTAPI | AtaWmode (PIDENTIFY_DATA2 ident) |
| LONG NTAPI | AtaUmode (PIDENTIFY_DATA2 ident) |
| VOID NTAPI | AtapiDpcDispatch (IN PKDPC Dpc, IN PVOID DeferredContext, IN PVOID SystemArgument1, IN PVOID SystemArgument2) |
| LONG NTAPI | AtaPio2Mode (LONG pio) |
| VOID NTAPI | AtapiEnableInterrupts (IN PVOID HwDeviceExtension, IN ULONG c) |
| VOID NTAPI | AtapiDisableInterrupts (IN PVOID HwDeviceExtension, IN ULONG c) |
| ULONG NTAPI | AtapiRegCheckDevValue (IN PVOID HwDeviceExtension, IN ULONG chan, IN ULONG dev, IN PCWSTR Name, IN ULONG Default) |
| ULONG NTAPI | AtapiRegCheckParameterValue (IN PVOID HwDeviceExtension, IN PCWSTR PathSuffix, IN PCWSTR Name, IN ULONG Default) |
| VOID _cdecl | _PrintNtConsole (PCCH DebugMessage,...) |
| VOID NTAPI | UniataInitMapBM (IN struct _HW_DEVICE_EXTENSION *deviceExtension, IN struct _IDE_BUSMASTER_REGISTERS *BaseIoAddressBM_0, IN BOOLEAN MemIo) |
| VOID NTAPI | UniataInitMapBase (IN struct _HW_CHANNEL *chan, IN PIDE_REGISTERS_1 BaseIoAddress1, IN PIDE_REGISTERS_2 BaseIoAddress2) |
| VOID NTAPI | UniataInitSyncBaseIO (IN struct _HW_CHANNEL *chan) |
| UCHAR DDKFASTAPI | UniataIsIdle (IN struct _HW_DEVICE_EXTENSION *deviceExtension, IN UCHAR Status) |
| VOID NTAPI | UniataDumpATARegs (IN struct _HW_CHANNEL *chan) |
| ULONG NTAPI | EncodeVendorStr (OUT PWCHAR Buffer, IN PUCHAR Str, IN ULONG Length) |
| ULONGLONG NTAPI | UniAtaCalculateLBARegsBack (struct _HW_LU_EXTENSION *LunExt, ULONGLONG lba) |
| BOOLEAN NTAPI | UniataAnybodyHome (IN PVOID HwDeviceExtension, IN ULONG Channel, IN ULONG deviceNumber) |
Variables |
| ULONG | g_LogToDisplay |
| UCHAR | AtaCommands48 [256] |
| UCHAR | AtaCommandFlags [256] |