ReactOS 0.4.16-dev-455-g37b0646
Public Attributes | List of all members
MSR_IA32_HWP_REQUEST_REGISTER Union Reference

#include <ArchitecturalMsr.h>

Collaboration diagram for MSR_IA32_HWP_REQUEST_REGISTER:
Collaboration graph
[legend]

Public Attributes

struct {
   UINT32   Minimum_Performance: 8
 
   UINT32   Maximum_Performance: 8
 
   UINT32   Desired_Performance: 8
 
   UINT32   Energy_Performance_Preference: 8
 
   UINT32   Activity_Window: 10
 
   UINT32   Package_Control: 1
 
   UINT32   Reserved: 21
 
} Bits
 
UINT64 Uint64
 

Detailed Description

MSR information returned for MSR index MSR_IA32_HWP_REQUEST

Definition at line 5109 of file ArchitecturalMsr.h.

Member Data Documentation

◆ Activity_Window

UINT32 MSR_IA32_HWP_REQUEST_REGISTER::Activity_Window

[Bits 41:32] Activity_Window See Section 14.4.4, "Managing HWP". If CPUID.06H:EAX.[7] = 1 && CPUID.06H:EAX.[9] = 1.

Definition at line 5138 of file ArchitecturalMsr.h.

◆ 

struct { ... } MSR_IA32_HWP_REQUEST_REGISTER::Bits

Individual bit fields

◆ Desired_Performance

UINT32 MSR_IA32_HWP_REQUEST_REGISTER::Desired_Performance

[Bits 23:16] Desired_Performance See Section 14.4.4, "Managing HWP". If CPUID.06H:EAX.[7] = 1.

Definition at line 5128 of file ArchitecturalMsr.h.

◆ Energy_Performance_Preference

UINT32 MSR_IA32_HWP_REQUEST_REGISTER::Energy_Performance_Preference

[Bits 31:24] Energy_Performance_Preference See Section 14.4.4, "Managing HWP". If CPUID.06H:EAX.[7] = 1 && CPUID.06H:EAX.[10] = 1.

Definition at line 5133 of file ArchitecturalMsr.h.

◆ Maximum_Performance

UINT32 MSR_IA32_HWP_REQUEST_REGISTER::Maximum_Performance

[Bits 15:8] Maximum_Performance See Section 14.4.4, "Managing HWP". If CPUID.06H:EAX.[7] = 1.

Definition at line 5123 of file ArchitecturalMsr.h.

◆ Minimum_Performance

UINT32 MSR_IA32_HWP_REQUEST_REGISTER::Minimum_Performance

[Bits 7:0] Minimum_Performance See Section 14.4.4, "Managing HWP". If CPUID.06H:EAX.[7] = 1.

Definition at line 5118 of file ArchitecturalMsr.h.

◆ Package_Control

UINT32 MSR_IA32_HWP_REQUEST_REGISTER::Package_Control

[Bit 42] Package_Control See Section 14.4.4, "Managing HWP". If CPUID.06H:EAX.[7] = 1 && CPUID.06H:EAX.[11] = 1.

Definition at line 5143 of file ArchitecturalMsr.h.

◆ Reserved

UINT32 MSR_IA32_HWP_REQUEST_REGISTER::Reserved

Definition at line 5144 of file ArchitecturalMsr.h.

◆ Uint64

UINT64 MSR_IA32_HWP_REQUEST_REGISTER::Uint64

All bit fields as a 64-bit value

Definition at line 5149 of file ArchitecturalMsr.h.

The documentation for this union was generated from the following file: