ReactOS  0.4.15-dev-1386-g5cb9f87
cmireg.hpp File Reference
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Macros

#define REG_FUNCTRL0   0x00
 
#define ADC_CH0   0x00000001
 
#define ADC_CH1   0x00000002
 
#define PAUSE_CH0   0x00000004
 
#define PAUSE_CH1   0x00000008
 
#define EN_CH0   0x00010000
 
#define EN_CH1   0x00020000
 
#define RST_CH0   0x00040000
 
#define RST_CH1   0x00080000
 
#define REG_FUNCTRL1   0x04
 
#define EN_ZVPORT   0x00000001
 
#define EN_GAMEPORT   0x00000002
 
#define EN_UART   0x00000004
 
#define BREQ   0x00000010
 
#define INTRM   0x00000020
 
#define SPDO2DAC   0x00000040
 
#define LOOP_SPDF   0x00000080
 
#define SPDF_0   0x00000100
 
#define SPDF_1   0x00000200
 
#define SFC_CH0_MASK   0x00001C00
 
#define SFC_44K_CH0   0x00000C00
 
#define SFC_48K_CH0   0x00001C00
 
#define SFC_CH1_MASK   0x0000E000
 
#define SFC_44K_CH1   0x00006000
 
#define SFC_48K_CH1   0x0000E000
 
#define REG_CHFORMAT   0x08
 
#define FORMAT_CH0   0x00000003
 
#define FORMAT_CH1   0x0000000C
 
#define SPDLOCKED   0x00000010
 
#define POLVALID   0x00000020
 
#define DBLSPDS   0x00000040
 
#define INV_SPDIFI2   0x00000080
 
#define SPD88_CH0   0x00000100
 
#define SPD88_CH1   0x00000200
 
#define SPD96_CH0   0x00000400
 
#define SPD96_CH1   0x00000800
 
#define SEL_SPDIFI1   0x00080000
 
#define EN_SPDO_AC3_3   0x00020000
 
#define EN_SPDO_AC3_1   0x00100000
 
#define SPD24SEL   0x00200000
 
#define VERSION_37   0x01000000
 
#define EN_4CH_CH1   0x20000000
 
#define EN_5CH_CH1   0x80000000
 
#define REG_INTHLDCLR   0x0C
 
#define VERSION_MASK   0xFF000000
 
#define VERSION_68   0x20000000
 
#define VERSION_55   0x08000000
 
#define VERSION_39   0x04000000
 
#define VERSION_39_6   0x01000000
 
#define INT_CLEAR   0x00000001
 
#define INT_HOLD   0x00000002
 
#define EN_CH0_INT   0x00010000
 
#define EN_CH1_INT   0x00020000
 
#define REG_INT_STAT   0x10
 
#define INT_CH0   0x00000001
 
#define INT_CH1   0x00000002
 
#define BUSY_CH0   0x00000004
 
#define BUSY_CH1   0x00000008
 
#define INT_UART   0x00010000
 
#define INT_PENDING   0x80000000
 
#define REG_LEGACY   0x14
 
#define CENTER2LINE   0x00002000
 
#define BASS2LINE   0x00004000
 
#define EN_6CH_CH1   0x00008000
 
#define DAC2SPDO   0x00200000
 
#define EN_SPDCOPYRHT   0x00400000
 
#define EN_SPDIF_OUT   0x00800000
 
#define UART_330   0x00000000
 
#define UART_320   0x20000000
 
#define UART_310   0x40000000
 
#define UART_300   0x60000000
 
#define DWORD_MAPPING   0x80000000
 
#define REG_MISCCTRL   0x18
 
#define EN_CENTER   0x00000080
 
#define SEL_SPDIFI2   0x00000100
 
#define EN_SPDIF_48_1   0x00008000
 
#define EN_SPDO_AC3_2   0x00040000
 
#define LOOP_SPDF_I   0x00100000
 
#define SPD32SEL   0x00200000
 
#define XCHG_DAC   0x00400000
 
#define EN_DBLDAC   0x00800000
 
#define EN_SPDIF_48_2   0x01000000
 
#define EN_SPDO5V   0x02000000
 
#define RST_CHIP   0x40000000
 
#define PWD_CHIP   0x80000000
 
#define EN_SPDIF_48   (EN_SPDIF_48_1 | EN_SPDIF_48_2)
 
#define REG_SBDATA   0x22
 
#define REG_SBINDEX   0x23
 
#define REG_MIXER1   0x24
 
#define EN_SPDI2DAC   0x01
 
#define EN_3DSOUND   0x02
 
#define EN_WAVEIN_L   0x04
 
#define EN_WAVEIN_R   0x08
 
#define REAR2FRONT   0x10
 
#define REAR2LINE   0x20
 
#define MUTE_WAVE   0x40
 
#define MUTE_FM   0x80
 
#define REG_MIXER2   0x25
 
#define DIS_MICGAIN   0x01
 
#define MUTE_AUX_L   0x10
 
#define MUTE_AUX_R   0x20
 
#define MUTE_RAUX_L   0x40
 
#define MUTE_RAUX_R   0x80
 
#define REG_MIXER3   0x26
 
#define REG_MIXER4   0x27
 
#define INV_SPDIFI1   0x04
 
#define CENTER2MIC   0x04
 
#define REG_CH0_FRAME1   0x80
 
#define REG_CH0_FRAME2   0x84
 
#define REG_CH1_FRAME1   0x88
 
#define REG_CH1_FRAME2   0x8C
 
#define REG_MISCCTRL2   0x92
 
#define EN_8CH_CH1   0x0020
 
#define SBREG_OUTPUTCTRL   0x3C
 
#define EN_MIC   0x01
 
#define EN_CD_L   0x02
 
#define EN_CD_R   0x04
 
#define EN_LINEIN_L   0x08
 
#define EN_LINEIN_R   0x10
 
#define SBREG_IN_CTRL_L   0x3D
 
#define SBREG_IN_CTRL_R   0x3E
 
#define SBREG_EXTENSION   0xF0
 
#define EN_MICBOOST   0x01
 

Macro Definition Documentation

◆ ADC_CH0

#define ADC_CH0   0x00000001

Definition at line 34 of file cmireg.hpp.

◆ ADC_CH1

#define ADC_CH1   0x00000002

Definition at line 35 of file cmireg.hpp.

◆ BASS2LINE

#define BASS2LINE   0x00004000

Definition at line 100 of file cmireg.hpp.

◆ BREQ

#define BREQ   0x00000010

Definition at line 47 of file cmireg.hpp.

◆ BUSY_CH0

#define BUSY_CH0   0x00000004

Definition at line 93 of file cmireg.hpp.

◆ BUSY_CH1

#define BUSY_CH1   0x00000008

Definition at line 94 of file cmireg.hpp.

◆ CENTER2LINE

#define CENTER2LINE   0x00002000

Definition at line 99 of file cmireg.hpp.

◆ CENTER2MIC

#define CENTER2MIC   0x04

Definition at line 150 of file cmireg.hpp.

◆ DAC2SPDO

#define DAC2SPDO   0x00200000

Definition at line 102 of file cmireg.hpp.

◆ DBLSPDS

#define DBLSPDS   0x00000040

Definition at line 65 of file cmireg.hpp.

◆ DIS_MICGAIN

#define DIS_MICGAIN   0x01

Definition at line 140 of file cmireg.hpp.

◆ DWORD_MAPPING

#define DWORD_MAPPING   0x80000000

Definition at line 109 of file cmireg.hpp.

◆ EN_3DSOUND

#define EN_3DSOUND   0x02

Definition at line 131 of file cmireg.hpp.

◆ EN_4CH_CH1

#define EN_4CH_CH1   0x20000000

Definition at line 76 of file cmireg.hpp.

◆ EN_5CH_CH1

#define EN_5CH_CH1   0x80000000

Definition at line 77 of file cmireg.hpp.

◆ EN_6CH_CH1

#define EN_6CH_CH1   0x00008000

Definition at line 101 of file cmireg.hpp.

◆ EN_8CH_CH1

#define EN_8CH_CH1   0x0020

Definition at line 158 of file cmireg.hpp.

◆ EN_CD_L

#define EN_CD_L   0x02

Definition at line 162 of file cmireg.hpp.

◆ EN_CD_R

#define EN_CD_R   0x04

Definition at line 163 of file cmireg.hpp.

◆ EN_CENTER

#define EN_CENTER   0x00000080

Definition at line 112 of file cmireg.hpp.

◆ EN_CH0

#define EN_CH0   0x00010000

Definition at line 38 of file cmireg.hpp.

◆ EN_CH0_INT

#define EN_CH0_INT   0x00010000

Definition at line 87 of file cmireg.hpp.

◆ EN_CH1

#define EN_CH1   0x00020000

Definition at line 39 of file cmireg.hpp.

◆ EN_CH1_INT

#define EN_CH1_INT   0x00020000

Definition at line 88 of file cmireg.hpp.

◆ EN_DBLDAC

#define EN_DBLDAC   0x00800000

Definition at line 119 of file cmireg.hpp.

◆ EN_GAMEPORT

#define EN_GAMEPORT   0x00000002

Definition at line 45 of file cmireg.hpp.

◆ EN_LINEIN_L

#define EN_LINEIN_L   0x08

Definition at line 164 of file cmireg.hpp.

◆ EN_LINEIN_R

#define EN_LINEIN_R   0x10

Definition at line 165 of file cmireg.hpp.

◆ EN_MIC

#define EN_MIC   0x01

Definition at line 161 of file cmireg.hpp.

◆ EN_MICBOOST

#define EN_MICBOOST   0x01

Definition at line 171 of file cmireg.hpp.

◆ EN_SPDCOPYRHT

#define EN_SPDCOPYRHT   0x00400000

Definition at line 103 of file cmireg.hpp.

◆ EN_SPDI2DAC

#define EN_SPDI2DAC   0x01

Definition at line 130 of file cmireg.hpp.

◆ EN_SPDIF_48

#define EN_SPDIF_48   (EN_SPDIF_48_1 | EN_SPDIF_48_2)

Definition at line 124 of file cmireg.hpp.

◆ EN_SPDIF_48_1

#define EN_SPDIF_48_1   0x00008000

Definition at line 114 of file cmireg.hpp.

◆ EN_SPDIF_48_2

#define EN_SPDIF_48_2   0x01000000

Definition at line 120 of file cmireg.hpp.

◆ EN_SPDIF_OUT

#define EN_SPDIF_OUT   0x00800000

Definition at line 104 of file cmireg.hpp.

◆ EN_SPDO5V

#define EN_SPDO5V   0x02000000

Definition at line 121 of file cmireg.hpp.

◆ EN_SPDO_AC3_1

#define EN_SPDO_AC3_1   0x00100000

Definition at line 73 of file cmireg.hpp.

◆ EN_SPDO_AC3_2

#define EN_SPDO_AC3_2   0x00040000

Definition at line 115 of file cmireg.hpp.

◆ EN_SPDO_AC3_3

#define EN_SPDO_AC3_3   0x00020000

Definition at line 72 of file cmireg.hpp.

◆ EN_UART

#define EN_UART   0x00000004

Definition at line 46 of file cmireg.hpp.

◆ EN_WAVEIN_L

#define EN_WAVEIN_L   0x04

Definition at line 132 of file cmireg.hpp.

◆ EN_WAVEIN_R

#define EN_WAVEIN_R   0x08

Definition at line 133 of file cmireg.hpp.

◆ EN_ZVPORT

#define EN_ZVPORT   0x00000001

Definition at line 44 of file cmireg.hpp.

◆ FORMAT_CH0

#define FORMAT_CH0   0x00000003

Definition at line 61 of file cmireg.hpp.

◆ FORMAT_CH1

#define FORMAT_CH1   0x0000000C

Definition at line 62 of file cmireg.hpp.

◆ INT_CH0

#define INT_CH0   0x00000001

Definition at line 91 of file cmireg.hpp.

◆ INT_CH1

#define INT_CH1   0x00000002

Definition at line 92 of file cmireg.hpp.

◆ INT_CLEAR

#define INT_CLEAR   0x00000001

Definition at line 85 of file cmireg.hpp.

◆ INT_HOLD

#define INT_HOLD   0x00000002

Definition at line 86 of file cmireg.hpp.

◆ INT_PENDING

#define INT_PENDING   0x80000000

Definition at line 96 of file cmireg.hpp.

◆ INT_UART

#define INT_UART   0x00010000

Definition at line 95 of file cmireg.hpp.

◆ INTRM

#define INTRM   0x00000020

Definition at line 48 of file cmireg.hpp.

◆ INV_SPDIFI1

#define INV_SPDIFI1   0x04

Definition at line 149 of file cmireg.hpp.

◆ INV_SPDIFI2

#define INV_SPDIFI2   0x00000080

Definition at line 66 of file cmireg.hpp.

◆ LOOP_SPDF

#define LOOP_SPDF   0x00000080

Definition at line 50 of file cmireg.hpp.

◆ LOOP_SPDF_I

#define LOOP_SPDF_I   0x00100000

Definition at line 116 of file cmireg.hpp.

◆ MUTE_AUX_L

#define MUTE_AUX_L   0x10

Definition at line 141 of file cmireg.hpp.

◆ MUTE_AUX_R

#define MUTE_AUX_R   0x20

Definition at line 142 of file cmireg.hpp.

◆ MUTE_FM

#define MUTE_FM   0x80

Definition at line 137 of file cmireg.hpp.

◆ MUTE_RAUX_L

#define MUTE_RAUX_L   0x40

Definition at line 143 of file cmireg.hpp.

◆ MUTE_RAUX_R

#define MUTE_RAUX_R   0x80

Definition at line 144 of file cmireg.hpp.

◆ MUTE_WAVE

#define MUTE_WAVE   0x40

Definition at line 136 of file cmireg.hpp.

◆ PAUSE_CH0

#define PAUSE_CH0   0x00000004

Definition at line 36 of file cmireg.hpp.

◆ PAUSE_CH1

#define PAUSE_CH1   0x00000008

Definition at line 37 of file cmireg.hpp.

◆ POLVALID

#define POLVALID   0x00000020

Definition at line 64 of file cmireg.hpp.

◆ PWD_CHIP

#define PWD_CHIP   0x80000000

Definition at line 123 of file cmireg.hpp.

◆ REAR2FRONT

#define REAR2FRONT   0x10

Definition at line 134 of file cmireg.hpp.

◆ REAR2LINE

#define REAR2LINE   0x20

Definition at line 135 of file cmireg.hpp.

◆ REG_CH0_FRAME1

#define REG_CH0_FRAME1   0x80

Definition at line 152 of file cmireg.hpp.

◆ REG_CH0_FRAME2

#define REG_CH0_FRAME2   0x84

Definition at line 153 of file cmireg.hpp.

◆ REG_CH1_FRAME1

#define REG_CH1_FRAME1   0x88

Definition at line 154 of file cmireg.hpp.

◆ REG_CH1_FRAME2

#define REG_CH1_FRAME2   0x8C

Definition at line 155 of file cmireg.hpp.

◆ REG_CHFORMAT

#define REG_CHFORMAT   0x08

Definition at line 60 of file cmireg.hpp.

◆ REG_FUNCTRL0

#define REG_FUNCTRL0   0x00

Definition at line 33 of file cmireg.hpp.

◆ REG_FUNCTRL1

#define REG_FUNCTRL1   0x04

Definition at line 43 of file cmireg.hpp.

◆ REG_INT_STAT

#define REG_INT_STAT   0x10

Definition at line 90 of file cmireg.hpp.

◆ REG_INTHLDCLR

#define REG_INTHLDCLR   0x0C

Definition at line 79 of file cmireg.hpp.

◆ REG_LEGACY

#define REG_LEGACY   0x14

Definition at line 98 of file cmireg.hpp.

◆ REG_MISCCTRL

#define REG_MISCCTRL   0x18

Definition at line 111 of file cmireg.hpp.

◆ REG_MISCCTRL2

#define REG_MISCCTRL2   0x92

Definition at line 157 of file cmireg.hpp.

◆ REG_MIXER1

#define REG_MIXER1   0x24

Definition at line 129 of file cmireg.hpp.

◆ REG_MIXER2

#define REG_MIXER2   0x25

Definition at line 139 of file cmireg.hpp.

◆ REG_MIXER3

#define REG_MIXER3   0x26

Definition at line 146 of file cmireg.hpp.

◆ REG_MIXER4

#define REG_MIXER4   0x27

Definition at line 148 of file cmireg.hpp.

◆ REG_SBDATA

#define REG_SBDATA   0x22

Definition at line 126 of file cmireg.hpp.

◆ REG_SBINDEX

#define REG_SBINDEX   0x23

Definition at line 127 of file cmireg.hpp.

◆ RST_CH0

#define RST_CH0   0x00040000

Definition at line 40 of file cmireg.hpp.

◆ RST_CH1

#define RST_CH1   0x00080000

Definition at line 41 of file cmireg.hpp.

◆ RST_CHIP

#define RST_CHIP   0x40000000

Definition at line 122 of file cmireg.hpp.

◆ SBREG_EXTENSION

#define SBREG_EXTENSION   0xF0

Definition at line 170 of file cmireg.hpp.

◆ SBREG_IN_CTRL_L

#define SBREG_IN_CTRL_L   0x3D

Definition at line 167 of file cmireg.hpp.

◆ SBREG_IN_CTRL_R

#define SBREG_IN_CTRL_R   0x3E

Definition at line 168 of file cmireg.hpp.

◆ SBREG_OUTPUTCTRL

#define SBREG_OUTPUTCTRL   0x3C

Definition at line 160 of file cmireg.hpp.

◆ SEL_SPDIFI1

#define SEL_SPDIFI1   0x00080000

Definition at line 71 of file cmireg.hpp.

◆ SEL_SPDIFI2

#define SEL_SPDIFI2   0x00000100

Definition at line 113 of file cmireg.hpp.

◆ SFC_44K_CH0

#define SFC_44K_CH0   0x00000C00

Definition at line 54 of file cmireg.hpp.

◆ SFC_44K_CH1

#define SFC_44K_CH1   0x00006000

Definition at line 57 of file cmireg.hpp.

◆ SFC_48K_CH0

#define SFC_48K_CH0   0x00001C00

Definition at line 55 of file cmireg.hpp.

◆ SFC_48K_CH1

#define SFC_48K_CH1   0x0000E000

Definition at line 58 of file cmireg.hpp.

◆ SFC_CH0_MASK

#define SFC_CH0_MASK   0x00001C00

Definition at line 53 of file cmireg.hpp.

◆ SFC_CH1_MASK

#define SFC_CH1_MASK   0x0000E000

Definition at line 56 of file cmireg.hpp.

◆ SPD24SEL

#define SPD24SEL   0x00200000

Definition at line 74 of file cmireg.hpp.

◆ SPD32SEL

#define SPD32SEL   0x00200000

Definition at line 117 of file cmireg.hpp.

◆ SPD88_CH0

#define SPD88_CH0   0x00000100

Definition at line 67 of file cmireg.hpp.

◆ SPD88_CH1

#define SPD88_CH1   0x00000200

Definition at line 68 of file cmireg.hpp.

◆ SPD96_CH0

#define SPD96_CH0   0x00000400

Definition at line 69 of file cmireg.hpp.

◆ SPD96_CH1

#define SPD96_CH1   0x00000800

Definition at line 70 of file cmireg.hpp.

◆ SPDF_0

#define SPDF_0   0x00000100

Definition at line 51 of file cmireg.hpp.

◆ SPDF_1

#define SPDF_1   0x00000200

Definition at line 52 of file cmireg.hpp.

◆ SPDLOCKED

#define SPDLOCKED   0x00000010

Definition at line 63 of file cmireg.hpp.

◆ SPDO2DAC

#define SPDO2DAC   0x00000040

Definition at line 49 of file cmireg.hpp.

◆ UART_300

#define UART_300   0x60000000

Definition at line 108 of file cmireg.hpp.

◆ UART_310

#define UART_310   0x40000000

Definition at line 107 of file cmireg.hpp.

◆ UART_320

#define UART_320   0x20000000

Definition at line 106 of file cmireg.hpp.

◆ UART_330

#define UART_330   0x00000000

Definition at line 105 of file cmireg.hpp.

◆ VERSION_37

#define VERSION_37   0x01000000

Definition at line 75 of file cmireg.hpp.

◆ VERSION_39

#define VERSION_39   0x04000000

Definition at line 83 of file cmireg.hpp.

◆ VERSION_39_6

#define VERSION_39_6   0x01000000

Definition at line 84 of file cmireg.hpp.

◆ VERSION_55

#define VERSION_55   0x08000000

Definition at line 82 of file cmireg.hpp.

◆ VERSION_68

#define VERSION_68   0x20000000

Definition at line 81 of file cmireg.hpp.

◆ VERSION_MASK

#define VERSION_MASK   0xFF000000

Definition at line 80 of file cmireg.hpp.

◆ XCHG_DAC

#define XCHG_DAC   0x00400000

Definition at line 118 of file cmireg.hpp.