19 DPRINT(
"PciIdeChannelEnabled(%p, %lu)\n", DeviceExtension,
Channel);
28 DPRINT(
"PciIdeSyncAccessRequired %p\n", DeviceExtension);
39 DPRINT(
"PciIdeUseDma(%p %p %p)\n", DeviceExtension, CdbCommand, Slave);
58 ControllerProperties->IgnoreActiveBitForAtaDevice =
FALSE;
59 ControllerProperties->AlwaysClearBusMasterInterrupt =
TRUE;
61 ControllerProperties->AlignmentRequirement = 1;
80 ControllerProperties->SupportedTransferMode[0][0] =
81 ControllerProperties->SupportedTransferMode[0][1] =
82 ControllerProperties->SupportedTransferMode[1][0] =
83 ControllerProperties->SupportedTransferMode[1][1] = SupportedMode;
DRIVER_INITIALIZE DriverEntry
#define STATUS_REVISION_MISMATCH
BOOLEAN NTAPI PciIdeSyncAccessRequired(IN PVOID DeviceExtension)
IDE_CHANNEL_STATE NTAPI PciIdeChannelEnabled(IN PVOID DeviceExtension, IN ULONG Channel)
NTSTATUS NTAPI PciIdeGetControllerProperties(IN PVOID DeviceExtension, OUT PIDE_CONTROLLER_PROPERTIES ControllerProperties)
ULONG NTAPI PciIdeUseDma(IN PVOID DeviceExtension, IN PUCHAR CdbCommand, IN PUCHAR Slave)
NTSTATUS NTAPI PciIdeXInitialize(_In_ PDRIVER_OBJECT DriverObject, _In_ PUNICODE_STRING RegistryPath, _In_ PCONTROLLER_PROPERTIES HwGetControllerProperties, _In_ ULONG ExtensionSize)
NTSTATUS NTAPI PciIdeXGetBusData(_In_ PVOID DeviceExtension, _Out_writes_bytes_all_(BufferLength) PVOID Buffer, _In_ ULONG ConfigDataOffset, _In_ ULONG BufferLength)
#define FIELD_OFFSET(t, f)
_Must_inspect_result_ _In_ PDRIVER_OBJECT _In_ PCUNICODE_STRING RegistryPath
_Must_inspect_result_ _In_ PDRIVER_OBJECT DriverObject
#define PCI_ENABLE_BUS_MASTER