15#if defined(_MSC_VER) && !defined(__clang__)
23 unsigned __int8 m256i_u8[32];
33typedef long long __v4di
__attribute__ ((__vector_size__ (32)));
35typedef long long __m256i
__attribute__((__vector_size__(32), __may_alias__));
62#if defined(_MSC_VER) && !defined(__clang__)
64#pragma intrinsic(_mm256_cmpeq_epi8)
65#pragma intrinsic(_mm256_cmpeq_epi16)
66#pragma intrinsic(_mm256_movemask_epi8)
67#pragma intrinsic(_mm256_setzero_si256)
68#pragma intrinsic(_mm256_zeroupper)
70#pragma intrinsic(_rdrand16_step)
71#pragma intrinsic(_rdrand32_step)
73#pragma intrinsic(_rdrand64_step)
75#pragma intrinsic(_rdseed16_step)
76#pragma intrinsic(_rdseed32_step)
78#pragma intrinsic(_rdseed64_step)
84#define __ATTRIBUTE_SSE2__ __attribute__((__target__("sse2"),__min_vector_width__(128)))
85#define __ATTRIBUTE_AVX__ __attribute__((__target__("avx"),__min_vector_width__(256)))
86#define __ATTRIBUTE_AVX2__ __attribute__((__target__("avx2"),__min_vector_width__(256)))
88#define __ATTRIBUTE_SSE2__ __attribute__((__target__("sse2")))
89#define __ATTRIBUTE_AVX__ __attribute__((__target__("avx")))
90#define __ATTRIBUTE_AVX2__ __attribute__((__target__("avx2")))
92#define __INTRIN_INLINE_SSE2 __INTRIN_INLINE __ATTRIBUTE_SSE2__
93#define __INTRIN_INLINE_AVX __INTRIN_INLINE __ATTRIBUTE_AVX__
94#define __INTRIN_INLINE_AVX2 __INTRIN_INLINE __ATTRIBUTE_AVX2__
98 return (__m256i)((__v32qi)__A == (__v32qi)__B);
103 return (__m256i)((__v16hi)__A == (__v16hi)__B);
108 return __builtin_ia32_pmovmskb256((__v32qi)__A);
113 return __extension__ (__m256i)(__v4di){ 0, 0, 0, 0 };
118 __asm__ __volatile__(
"vzeroupper");
124 __asm__ __volatile__(
"rdrand %0; setc %1" :
"=r"(*random_val),
"=qm"(
ok));
131 __asm__ __volatile__(
"rdrand %0; setc %1" :
"=r"(*random_val),
"=qm"(
ok));
135#if defined(__x86_64__)
139 __asm__ __volatile__(
"rdrand %0; setc %1" :
"=r"(*random_val),
"=qm"(
ok));
147 __asm__ __volatile__(
"rdseed %0; setc %1" :
"=r"(*random_val),
"=qm"(
ok));
154 __asm__ __volatile__(
"rdseed %0; setc %1" :
"=r"(*random_val),
"=qm"(
ok));
158#if defined(__x86_64__)
162 __asm__ __volatile__(
"rdseed %0; setc %1" :
"=r"(*random_val),
"=qm"(
ok));
#define _DECLSPEC_INTRIN_TYPE
int __cdecl _rdseed32_step(unsigned int *random_val)
int __cdecl _rdrand32_step(unsigned int *random_val)
#define __INTRIN_INLINE_AVX
int __cdecl _rdseed16_step(unsigned short *random_val)
__m256i __cdecl _mm256_setzero_si256(void)
int __cdecl _rdrand16_step(unsigned short *random_val)
char __v32qi __attribute__((__vector_size__(32)))
#define __INTRIN_INLINE_AVX2
int __cdecl _mm256_movemask_epi8(__m256i)
__m256i __cdecl _mm256_cmpeq_epi8(__m256i, __m256i)
void __cdecl _mm256_zeroupper(void)
__m256i __cdecl _mm256_cmpeq_epi16(__m256i, __m256i)
__asm__(".p2align 4, 0x90\n" ".seh_proc __seh2_global_filter_func\n" "__seh2_global_filter_func:\n" "\tsub %rbp, %rax\n" "\tpush %rbp\n" "\t.seh_pushreg %rbp\n" "\tsub $32, %rsp\n" "\t.seh_stackalloc 32\n" "\t.seh_endprologue\n" "\tsub %rax, %rdx\n" "\tmov %rdx, %rbp\n" "\tjmp *%r8\n" "__seh2_global_filter_func_exit:\n" "\t.p2align 4\n" "\tadd $32, %rsp\n" "\tpop %rbp\n" "\tret\n" "\t.seh_endproc")