|
| #define | MEM_VGA 0xA0000 |
| |
| #define | MEM_VGA_SIZE 0x20000 |
| |
| #define | MEMORY_MAPPED_IO_OFFSET (0xB8000 - 0xA0000) |
| |
| #define | VGA_BASE_IO_PORT 0x000003B0 |
| |
| #define | VGA_START_BREAK_PORT 0x000003BB |
| |
| #define | VGA_END_BREAK_PORT 0x000003C0 |
| |
| #define | VGA_MAX_IO_PORT 0x000003DF |
| |
| #define | CRTC_ADDRESS_PORT_MONO 0x0004 |
| |
| #define | CRTC_DATA_PORT_MONO 0x0005 |
| |
| #define | FEAT_CTRL_WRITE_PORT_MONO 0x000A |
| |
| #define | INPUT_STATUS_1_MONO 0x000A |
| |
| #define | ATT_INITIALIZE_PORT_MONO INPUT_STATUS_1_MONO |
| |
| #define | ATT_ADDRESS_PORT 0x0010 |
| |
| #define | ATT_DATA_WRITE_PORT 0x0010 |
| |
| #define | ATT_DATA_READ_PORT 0x0011 |
| |
| #define | MISC_OUTPUT_REG_WRITE_PORT 0x0012 |
| |
| #define | INPUT_STATUS_0_PORT 0x0012 |
| |
| #define | VIDEO_SUBSYSTEM_ENABLE_PORT 0x0013 |
| |
| #define | SEQ_ADDRESS_PORT 0x0014 |
| |
| #define | SEQ_DATA_PORT 0x0015 |
| |
| #define | DAC_PIXEL_MASK_PORT 0x0016 |
| |
| #define | DAC_ADDRESS_READ_PORT 0x0017 |
| |
| #define | DAC_STATE_PORT 0x0017 |
| |
| #define | DAC_ADDRESS_WRITE_PORT 0x0018 |
| |
| #define | DAC_DATA_REG_PORT 0x0019 |
| |
| #define | FEAT_CTRL_READ_PORT 0x001A |
| |
| #define | MISC_OUTPUT_REG_READ_PORT 0x001C |
| |
| #define | GRAPH_ADDRESS_PORT 0x001E |
| |
| #define | GRAPH_DATA_PORT 0x001F |
| |
| #define | CRTC_ADDRESS_PORT_COLOR 0x0024 |
| |
| #define | CRTC_DATA_PORT_COLOR 0x0025 |
| |
| #define | FEAT_CTRL_WRITE_PORT_COLOR 0x002A |
| |
| #define | INPUT_STATUS_1_COLOR 0x002A |
| |
| #define | ATT_INITIALIZE_PORT_COLOR INPUT_STATUS_1_COLOR |
| |
| #define | CRTC_ADDRESS_MONO_OFFSET 0x04 |
| |
| #define | FEAT_CTRL_WRITE_MONO_OFFSET 0x0A |
| |
| #define | ATT_ADDRESS_OFFSET 0x10 |
| |
| #define | MISC_OUTPUT_REG_WRITE_OFFSET 0x12 |
| |
| #define | VIDEO_SUBSYSTEM_ENABLE_OFFSET 0x13 |
| |
| #define | SEQ_ADDRESS_OFFSET 0x14 |
| |
| #define | DAC_PIXEL_MASK_OFFSET 0x16 |
| |
| #define | DAC_STATE_OFFSET 0x17 |
| |
| #define | DAC_ADDRESS_WRITE_OFFSET 0x18 |
| |
| #define | GRAPH_ADDRESS_OFFSET 0x1E |
| |
| #define | CRTC_ADDRESS_COLOR_OFFSET 0x24 |
| |
| #define | FEAT_CTRL_WRITE_COLOR_OFFSET 0x2A |
| |
| #define | IND_CL_EXTS_ENB 0x06 |
| |
| #define | IND_NORD_SCRATCH_PAD 0x09 |
| |
| #define | IND_CL_SCRATCH_PAD 0x0A |
| |
| #define | IND_ALP_SCRATCH_PAD 0x15 |
| |
| #define | IND_CL_REV_REG 0x25 |
| |
| #define | IND_CL_ID_REG 0x27 |
| |
| #define | IND_CURSOR_START 0x0A |
| |
| #define | IND_CURSOR_END 0x0B |
| |
| #define | IND_CURSOR_HIGH_LOC 0x0E |
| |
| #define | IND_CURSOR_LOW_LOC 0x0F |
| |
| #define | IND_VSYNC_END 0x11 |
| |
| #define | IND_CR2C 0x2C |
| |
| #define | IND_CR2D 0x2D |
| |
| #define | IND_SET_RESET_ENABLE 0x01 |
| |
| #define | IND_DATA_ROTATE 0x03 |
| |
| #define | IND_READ_MAP 0x04 |
| |
| #define | IND_GRAPH_MODE 0x05 |
| |
| #define | IND_GRAPH_MISC 0x06 |
| |
| #define | IND_BIT_MASK 0x08 |
| |
| #define | IND_SYNC_RESET 0x00 |
| |
| #define | IND_MAP_MASK 0x02 |
| |
| #define | IND_MEMORY_MODE 0x04 |
| |
| #define | IND_CRTC_PROTECT 0x11 |
| |
| #define | IND_CRTC_COMPAT 0x34 |
| |
| #define | IND_PERF_TUNING 0x16 |
| |
| #define | START_SYNC_RESET_VALUE 0x01 |
| |
| #define | END_SYNC_RESET_VALUE 0x03 |
| |
| #define | CL64xx_EXTENSION_ENABLE_INDEX 0x0A |
| |
| #define | CL64xx_EXTENSION_ENABLE_VALUE 0xEC |
| |
| #define | CL64xx_EXTENSION_DISABLE_VALUE 0xCE |
| |
| #define | CL64xx_TRISTATE_CONTROL_REG 0xA1 |
| |
| #define | CL6340_ENABLE_READBACK_REGISTER 0xE0 |
| |
| #define | CL6340_ENABLE_READBACK_ALLSEL_VALUE 0xF0 |
| |
| #define | CL6340_ENABLE_READBACK_OFF_VALUE 0x00 |
| |
| #define | CL6340_IDENTIFICATION_REGISTER 0xE9 |
| |
| #define | VIDEO_DISABLE 0 |
| |
| #define | VIDEO_ENABLE 0x20 |
| |
| #define | INDEX_ENABLE_AUTO_START 0x31 |
| |
| #define | GRAPH_ADDR_MASK 0x0F |
| |
| #define | SEQ_ADDR_MASK 0x07 |
| |
| #define | CHAIN4_MASK 0x08 |
| |
| #define | READ_MAP_TEST_SETTING 0x03 |
| |
| #define | MEMORY_MODE_TEXT_DEFAULT 0x02 |
| |
| #define | BIT_MASK_DEFAULT 0xFF |
| |
| #define | READ_MAP_DEFAULT 0x00 |
| |
| #define | VIDEO_MAX_COLOR_REGISTER 0xFF |
| |
| #define | VIDEO_MAX_PALETTE_REGISTER 0x0F |
| |
| #define | CAPS_NO_HOST_XFER 0x00000002 |
| |
| #define | CAPS_SW_POINTER 0x00000004 |
| |
| #define | CAPS_TRUE_COLOR 0x00000008 |
| |
| #define | CAPS_MM_IO 0x00000010 |
| |
| #define | CAPS_BLT_SUPPORT 0x00000020 |
| |
| #define | CAPS_IS_542x 0x00000040 |
| |
| #define | CAPS_IS_5436 0x00000080 |
| |
| #define | CAPS_CURSOR_VERT_EXP 0x00000100 |
| |
| #define | DEFAULT_MODE 0 |
| |
| #define | VGA_MAX_VALIDATOR_DATA 100 |
| |
| #define | VGA_VALIDATOR_UCHAR_ACCESS 1 |
| |
| #define | VGA_VALIDATOR_USHORT_ACCESS 2 |
| |
| #define | VGA_VALIDATOR_ULONG_ACCESS 3 |
| |
| #define | VGA_PLANE_SIZE 0x10000 |
| |
| #define | VGA_NUM_SEQUENCER_PORTS 5 |
| |
| #define | VGA_NUM_CRTC_PORTS 25 |
| |
| #define | VGA_NUM_GRAPH_CONT_PORTS 9 |
| |
| #define | VGA_NUM_ATTRIB_CONT_PORTS 21 |
| |
| #define | VGA_NUM_DAC_ENTRIES 256 |
| |
| #define | EXT_NUM_GRAPH_CONT_PORTS 0 |
| |
| #define | EXT_NUM_SEQUENCER_PORTS 0 |
| |
| #define | EXT_NUM_CRTC_PORTS 0 |
| |
| #define | EXT_NUM_ATTRIB_CONT_PORTS 0 |
| |
| #define | EXT_NUM_DAC_ENTRIES 0 |
| |
| #define | VGA_HARDWARE_STATE_SIZE sizeof(VIDEO_HARDWARE_STATE_HEADER) |
| |
| #define | VGA_BASIC_SEQUENCER_OFFSET (VGA_HARDWARE_STATE_SIZE + 0) |
| |
| #define | VGA_BASIC_CRTC_OFFSET |
| |
| #define | VGA_BASIC_GRAPH_CONT_OFFSET |
| |
| #define | VGA_BASIC_ATTRIB_CONT_OFFSET |
| |
| #define | VGA_BASIC_DAC_OFFSET |
| |
| #define | VGA_BASIC_LATCHES_OFFSET |
| |
| #define | VGA_EXT_SEQUENCER_OFFSET (VGA_BASIC_LATCHES_OFFSET + 4) |
| |
| #define | VGA_EXT_CRTC_OFFSET |
| |
| #define | VGA_EXT_GRAPH_CONT_OFFSET |
| |
| #define | VGA_EXT_ATTRIB_CONT_OFFSET |
| |
| #define | VGA_EXT_DAC_OFFSET |
| |
| #define | VGA_VALIDATOR_OFFSET (VGA_EXT_DAC_OFFSET + 4 * EXT_NUM_DAC_ENTRIES) |
| |
| #define | VGA_VALIDATOR_AREA_SIZE |
| |
| #define | VGA_MISC_DATA_AREA_OFFSET VGA_VALIDATOR_OFFSET + VGA_VALIDATOR_AREA_SIZE |
| |
| #define | VGA_MISC_DATA_AREA_SIZE 0 |
| |
| #define | VGA_PLANE_0_OFFSET VGA_MISC_DATA_AREA_OFFSET + VGA_MISC_DATA_AREA_SIZE |
| |
| #define | VGA_PLANE_1_OFFSET VGA_PLANE_0_OFFSET + VGA_PLANE_SIZE |
| |
| #define | VGA_PLANE_2_OFFSET VGA_PLANE_1_OFFSET + VGA_PLANE_SIZE |
| |
| #define | VGA_PLANE_3_OFFSET VGA_PLANE_2_OFFSET + VGA_PLANE_SIZE |
| |
| #define | VGA_TOTAL_STATE_SIZE VGA_PLANE_3_OFFSET + VGA_PLANE_SIZE |
| |
| #define | NUM_VGA_ACCESS_RANGES 5 |
| |
| #define | VESA_MAGIC ('V' + ('E' << 8) + ('S' << 16) + ('A' << 24)) |
| |
1.9.6