ReactOS 0.4.15-dev-7918-g2a2556c
cvconst.h File Reference
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Typedefs

typedef enum CV_call_e CV_call_e
 

Enumerations

enum  SymTagEnum {
  SymTagNull , SymTagExe , SymTagCompiland , SymTagCompilandDetails ,
  SymTagCompilandEnv , SymTagFunction , SymTagBlock , SymTagData ,
  SymTagAnnotation , SymTagLabel , SymTagPublicSymbol , SymTagUDT ,
  SymTagEnum , SymTagFunctionType , SymTagPointerType , SymTagArrayType ,
  SymTagBaseType , SymTagTypedef , SymTagBaseClass , SymTagFriend ,
  SymTagFunctionArgType , SymTagFuncDebugStart , SymTagFuncDebugEnd , SymTagUsingNamespace ,
  SymTagVTableShape , SymTagVTable , SymTagCustom , SymTagThunk ,
  SymTagCustomType , SymTagManagedType , SymTagDimension , SymTagMax ,
  SymTagNull , SymTagExe , SymTagCompiland , SymTagCompilandDetails ,
  SymTagCompilandEnv , SymTagFunction , SymTagBlock , SymTagData ,
  SymTagAnnotation , SymTagLabel , SymTagPublicSymbol , SymTagUDT ,
  SymTagEnum , SymTagFunctionType , SymTagPointerType , SymTagArrayType ,
  SymTagBaseType , SymTagTypedef , SymTagBaseClass , SymTagFriend ,
  SymTagFunctionArgType , SymTagFuncDebugStart , SymTagFuncDebugEnd , SymTagUsingNamespace ,
  SymTagVTableShape , SymTagVTable , SymTagCustom , SymTagThunk ,
  SymTagCustomType , SymTagManagedType , SymTagDimension , SymTagMax ,
  SymTagNull , SymTagExe , SymTagCompiland , SymTagCompilandDetails ,
  SymTagCompilandEnv , SymTagFunction , SymTagBlock , SymTagData ,
  SymTagAnnotation , SymTagLabel , SymTagPublicSymbol , SymTagUDT ,
  SymTagEnum , SymTagFunctionType , SymTagPointerType , SymTagArrayType ,
  SymTagBaseType , SymTagTypedef , SymTagBaseClass , SymTagFriend ,
  SymTagFunctionArgType , SymTagFuncDebugStart , SymTagFuncDebugEnd , SymTagUsingNamespace ,
  SymTagVTableShape , SymTagVTable , SymTagCustom , SymTagThunk ,
  SymTagCustomType , SymTagManagedType , SymTagDimension , SymTagMax
}
 
enum  BasicType {
  btNoType = 0 , btVoid = 1 , btChar = 2 , btWChar = 3 ,
  btInt = 6 , btUInt = 7 , btFloat = 8 , btBCD = 9 ,
  btBool = 10 , btLong = 13 , btULong = 14 , btCurrency = 25 ,
  btDate = 26 , btVariant = 27 , btComplex = 28 , btBit = 29 ,
  btBSTR = 30 , btHresult = 31 , btNoType = 0 , btVoid = 1 ,
  btChar = 2 , btWChar = 3 , btInt = 6 , btUInt = 7 ,
  btFloat = 8 , btBCD = 9 , btBool = 10 , btLong = 13 ,
  btULong = 14 , btCurrency = 25 , btDate = 26 , btVariant = 27 ,
  btComplex = 28 , btBit = 29 , btBSTR = 30 , btHresult = 31 ,
  btNoType = 0 , btVoid = 1 , btChar = 2 , btWChar = 3 ,
  btInt = 6 , btUInt = 7 , btFloat = 8 , btBCD = 9 ,
  btBool = 10 , btLong = 13 , btULong = 14 , btCurrency = 25 ,
  btDate = 26 , btVariant = 27 , btComplex = 28 , btBit = 29 ,
  btBSTR = 30 , btHresult = 31 , btNoType = 0 , btVoid = 1 ,
  btChar = 2 , btWChar = 3 , btInt = 6 , btUInt = 7 ,
  btFloat = 8 , btBCD = 9 , btBool = 10 , btLong = 13 ,
  btULong = 14 , btCurrency = 25 , btDate = 26 , btVariant = 27 ,
  btComplex = 28 , btBit = 29 , btBSTR = 30 , btHresult = 31 ,
  btChar16 = 32 , btChar32 = 33
}
 
enum  UdtKind {
  UdtStruct , UdtClass , UdtUnion , UdtStruct ,
  UdtClass , UdtUnion
}
 
enum  LocationType {
  LocIsNull , LocIsStatic , LocIsTLS , LocIsRegRel ,
  LocIsThisRel , LocIsEnregistered , LocIsBitField , LocIsSlot ,
  LocIsIlRel , LocInMetaData , LocIsConstant
}
 
enum  DataKind {
  DataIsUnknown , DataIsLocal , DataIsStaticLocal , DataIsParam ,
  DataIsObjectPtr , DataIsFileStatic , DataIsGlobal , DataIsMember ,
  DataIsStaticMember , DataIsConstant , DataIsUnknown , DataIsLocal ,
  DataIsStaticLocal , DataIsParam , DataIsObjectPtr , DataIsFileStatic ,
  DataIsGlobal , DataIsMember , DataIsStaticMember , DataIsConstant
}
 
enum  CV_HREG_e {
  CV_ALLREG_ERR = 30000 , CV_ALLREG_TEB = 30001 , CV_ALLREG_TIMER = 30002 , CV_ALLREG_EFAD1 = 30003 ,
  CV_ALLREG_EFAD2 = 30004 , CV_ALLREG_EFAD3 = 30005 , CV_ALLREG_VFRAME = 30006 , CV_ALLREG_HANDLE = 30007 ,
  CV_ALLREG_PARAMS = 30008 , CV_ALLREG_LOCALS = 30009 , CV_ALLREG_TID = 30010 , CV_ALLREG_ENV = 30011 ,
  CV_ALLREG_CMDLN = 30012 , CV_REG_NONE = 0 , CV_REG_AL = 1 , CV_REG_CL = 2 ,
  CV_REG_DL = 3 , CV_REG_BL = 4 , CV_REG_AH = 5 , CV_REG_CH = 6 ,
  CV_REG_DH = 7 , CV_REG_BH = 8 , CV_REG_AX = 9 , CV_REG_CX = 10 ,
  CV_REG_DX = 11 , CV_REG_BX = 12 , CV_REG_SP = 13 , CV_REG_BP = 14 ,
  CV_REG_SI = 15 , CV_REG_DI = 16 , CV_REG_EAX = 17 , CV_REG_ECX = 18 ,
  CV_REG_EDX = 19 , CV_REG_EBX = 20 , CV_REG_ESP = 21 , CV_REG_EBP = 22 ,
  CV_REG_ESI = 23 , CV_REG_EDI = 24 , CV_REG_ES = 25 , CV_REG_CS = 26 ,
  CV_REG_SS = 27 , CV_REG_DS = 28 , CV_REG_FS = 29 , CV_REG_GS = 30 ,
  CV_REG_IP = 31 , CV_REG_FLAGS = 32 , CV_REG_EIP = 33 , CV_REG_EFLAGS = 34 ,
  CV_REG_TEMP = 40 , CV_REG_TEMPH = 41 , CV_REG_QUOTE = 42 , CV_REG_PCDR3 = 43 ,
  CV_REG_CR0 = 80 , CV_REG_DR0 = 90 , CV_REG_GDTR = 110 , CV_REG_GDTL = 111 ,
  CV_REG_IDTR = 112 , CV_REG_IDTL = 113 , CV_REG_LDTR = 114 , CV_REG_TR = 115 ,
  CV_REG_PSEUDO1 = 116 , CV_REG_ST0 = 128 , CV_REG_CTRL = 136 , CV_REG_STAT = 137 ,
  CV_REG_TAG = 138 , CV_REG_FPIP = 139 , CV_REG_FPCS = 140 , CV_REG_FPDO = 141 ,
  CV_REG_FPDS = 142 , CV_REG_ISEM = 143 , CV_REG_FPEIP = 144 , CV_REG_FPEDO = 145 ,
  CV_REG_MM0 = 146 , CV_REG_XMM0 = 154 , CV_REG_XMM00 = 162 , CV_REG_XMM0L = 194 ,
  CV_REG_XMM0H = 202 , CV_REG_MXCSR = 211 , CV_REG_EDXEAX = 212 , CV_REG_EMM0L = 220 ,
  CV_REG_EMM0H = 228 , CV_REG_MM00 = 236 , CV_REG_MM01 = 237 , CV_REG_MM10 = 238 ,
  CV_REG_MM11 = 239 , CV_REG_MM20 = 240 , CV_REG_MM21 = 241 , CV_REG_MM30 = 242 ,
  CV_REG_MM31 = 243 , CV_REG_MM40 = 244 , CV_REG_MM41 = 245 , CV_REG_MM50 = 246 ,
  CV_REG_MM51 = 247 , CV_REG_MM60 = 248 , CV_REG_MM61 = 249 , CV_REG_MM70 = 250 ,
  CV_REG_MM71 = 251 , CV_REG_YMM0 = 252 , CV_REG_YMM0H = 260 , CV_REG_YMM0I0 = 268 ,
  CV_REG_YMM1I0 = 272 , CV_REG_YMM2I0 = 276 , CV_REG_YMM3I0 = 280 , CV_REG_YMM4I0 = 284 ,
  CV_REG_YMM5I0 = 288 , CV_REG_YMM6I0 = 292 , CV_REG_YMM7I0 = 296 , CV_REG_YMM0F0 = 300 ,
  CV_REG_YMM1F0 = 308 , CV_REG_YMM2F0 = 316 , CV_REG_YMM3F0 = 324 , CV_REG_YMM4F0 = 332 ,
  CV_REG_YMM5F0 = 340 , CV_REG_YMM6F0 = 348 , CV_REG_YMM7F0 = 356 , CV_REG_YMM0D0 = 364 ,
  CV_REG_YMM1D0 = 368 , CV_REG_YMM2D0 = 372 , CV_REG_YMM3D0 = 376 , CV_REG_YMM4D0 = 380 ,
  CV_REG_YMM5D0 = 384 , CV_REG_YMM6D0 = 388 , CV_REG_YMM7D0 = 392 , CV_R68_D0 = 0 ,
  CV_R68_A0 = 8 , CV_R68_CCR = 16 , CV_R68_SR = 17 , CV_R68_USP = 18 ,
  CV_R68_MSP = 19 , CV_R68_SFC = 20 , CV_R68_DFC = 21 , CV_R68_CACR = 22 ,
  CV_R68_VBR = 23 , CV_R68_CAAR = 24 , CV_R68_ISP = 25 , CV_R68_PC = 26 ,
  CV_R68_FPCR = 28 , CV_R68_FPSR = 29 , CV_R68_FPIAR = 30 , CV_R68_FP0 = 32 ,
  CV_R68_MMUSR030 = 41 , CV_R68_MMUSR = 42 , CV_R68_URP = 43 , CV_R68_DTT0 = 44 ,
  CV_R68_DTT1 = 45 , CV_R68_ITT0 = 46 , CV_R68_ITT1 = 47 , CV_R68_PSR = 51 ,
  CV_R68_PCSR = 52 , CV_R68_VAL = 53 , CV_R68_CRP = 54 , CV_R68_SRP = 55 ,
  CV_R68_DRP = 56 , CV_R68_TC = 57 , CV_R68_AC = 58 , CV_R68_SCC = 59 ,
  CV_R68_CAL = 60 , CV_R68_TT0 = 61 , CV_R68_TT1 = 62 , CV_R68_BAD0 = 64 ,
  CV_R68_BAC0 = 72 , CV_M4_NOREG = CV_REG_NONE , CV_M4_IntZERO = 10 , CV_M4_IntAT = 11 ,
  CV_M4_IntV0 = 12 , CV_M4_IntV1 = 13 , CV_M4_IntA0 = 14 , CV_M4_IntT0 = 18 ,
  CV_M4_IntS0 = 26 , CV_M4_IntT8 = 34 , CV_M4_IntT9 = 35 , CV_M4_IntKT0 = 36 ,
  CV_M4_IntKT1 = 37 , CV_M4_IntGP = 38 , CV_M4_IntSP = 39 , CV_M4_IntS8 = 40 ,
  CV_M4_IntRA = 41 , CV_M4_IntLO = 42 , CV_M4_IntHI = 43 , CV_M4_Fir = 50 ,
  CV_M4_Psr = 51 , CV_M4_FltF0 = 60 , CV_M4_FltFsr = 92 , CV_ALPHA_NOREG = CV_REG_NONE ,
  CV_ALPHA_FltF0 = 10 , CV_ALPHA_IntV0 = 42 , CV_ALPHA_IntT0 = 43 , CV_ALPHA_IntS0 = 51 ,
  CV_ALPHA_IntFP = 57 , CV_ALPHA_IntA0 = 58 , CV_ALPHA_IntT8 = 64 , CV_ALPHA_IntT9 = 65 ,
  CV_ALPHA_IntT10 = 66 , CV_ALPHA_IntT11 = 67 , CV_ALPHA_IntRA = 68 , CV_ALPHA_IntT12 = 69 ,
  CV_ALPHA_IntAT = 70 , CV_ALPHA_IntGP = 71 , CV_ALPHA_IntSP = 72 , CV_ALPHA_IntZERO = 73 ,
  CV_ALPHA_Fpcr = 74 , CV_ALPHA_Fir = 75 , CV_ALPHA_Psr = 76 , CV_ALPHA_FltFsr = 77 ,
  CV_ALPHA_SoftFpcr = 78 , CV_PPC_GPR0 = 1 , CV_PPC_CR = 33 , CV_PPC_CR0 = 34 ,
  CV_PPC_FPR0 = 42 , CV_PPC_FPSCR = 74 , CV_PPC_MSR = 75 , CV_PPC_SR0 = 76 ,
  CV_PPC_PC = 99 , CV_PPC_MQ = 100 , CV_PPC_XER = 101 , CV_PPC_RTCU = 104 ,
  CV_PPC_RTCL = 105 , CV_PPC_LR = 108 , CV_PPC_CTR = 109 , CV_PPC_COMPARE = 110 ,
  CV_PPC_COUNT = 111 , CV_PPC_DSISR = 118 , CV_PPC_DAR = 119 , CV_PPC_DEC = 122 ,
  CV_PPC_SDR1 = 125 , CV_PPC_SRR0 = 126 , CV_PPC_SRR1 = 127 , CV_PPC_SPRG0 = 372 ,
  CV_PPC_ASR = 280 , CV_PPC_EAR = 382 , CV_PPC_PVR = 287 , CV_PPC_BAT0U = 628 ,
  CV_PPC_BAT0L = 629 , CV_PPC_BAT1U = 630 , CV_PPC_BAT1L = 631 , CV_PPC_BAT2U = 632 ,
  CV_PPC_BAT2L = 633 , CV_PPC_BAT3U = 634 , CV_PPC_BAT3L = 635 , CV_PPC_DBAT0U = 636 ,
  CV_PPC_DBAT0L = 637 , CV_PPC_DBAT1U = 638 , CV_PPC_DBAT1L = 639 , CV_PPC_DBAT2U = 640 ,
  CV_PPC_DBAT2L = 641 , CV_PPC_DBAT3U = 642 , CV_PPC_DBAT3L = 643 , CV_PPC_PMR0 = 1044 ,
  CV_PPC_DMISS = 1076 , CV_PPC_DCMP = 1077 , CV_PPC_HASH1 = 1078 , CV_PPC_HASH2 = 1079 ,
  CV_PPC_IMISS = 1080 , CV_PPC_ICMP = 1081 , CV_PPC_RPA = 1082 , CV_PPC_HID0 = 1108 ,
  CV_JAVA_PC = 1 , CV_SH3_NOREG = CV_REG_NONE , CV_SH3_IntR0 = 10 , CV_SH3_IntFp = 24 ,
  CV_SH3_IntSp = 25 , CV_SH3_Gbr = 38 , CV_SH3_Pr = 39 , CV_SH3_Mach = 40 ,
  CV_SH3_Macl = 41 , CV_SH3_Pc = 50 , CV_SH3_Sr = 51 , CV_SH3_BarA = 60 ,
  CV_SH3_BasrA = 61 , CV_SH3_BamrA = 62 , CV_SH3_BbrA = 63 , CV_SH3_BarB = 64 ,
  CV_SH3_BasrB = 65 , CV_SH3_BamrB = 66 , CV_SH3_BbrB = 67 , CV_SH3_BdrB = 68 ,
  CV_SH3_BdmrB = 69 , CV_SH3_Brcr = 70 , CV_SH_Fpscr = 75 , CV_SH_Fpul = 76 ,
  CV_SH_FpR0 = 80 , CV_SH_XFpR0 = 96 , CV_ARM_NOREG = CV_REG_NONE , CV_ARM_R0 = 10 ,
  CV_ARM_SP = 23 , CV_ARM_LR = 24 , CV_ARM_PC = 25 , CV_ARM_CPSR = 26 ,
  CV_ARM_ACC0 = 27 , CV_ARM_FPSCR = 40 , CV_ARM_FPEXC = 41 , CV_ARM_FS0 = 50 ,
  CV_ARM_FPEXTRA0 = 90 , CV_ARM_WR0 = 128 , CV_ARM_WCID = 144 , CV_ARM_WCON = 145 ,
  CV_ARM_WCSSF = 146 , CV_ARM_WCASF = 147 , CV_ARM_WC4 = 148 , CV_ARM_WC5 = 149 ,
  CV_ARM_WC6 = 150 , CV_ARM_WC7 = 151 , CV_ARM_WCGR0 = 152 , CV_ARM_WC12 = 156 ,
  CV_ARM_WC13 = 157 , CV_ARM_WC14 = 158 , CV_ARM_WC15 = 159 , CV_ARM_FS32 = 200 ,
  CV_ARM_ND0 = 300 , CV_ARM_NQ0 = 400 , CV_IA64_NOREG = CV_REG_NONE , CV_IA64_Br0 = 512 ,
  CV_IA64_P0 = 704 , CV_IA64_Preds = 768 , CV_IA64_IntH0 = 832 , CV_IA64_Ip = 1016 ,
  CV_IA64_Umask = 1017 , CV_IA64_Cfm = 1018 , CV_IA64_Psr = 1019 , CV_IA64_Nats = 1020 ,
  CV_IA64_Nats2 = 1021 , CV_IA64_Nats3 = 1022 , CV_IA64_IntR0 = 1024 , CV_IA64_FltF0 = 2048 ,
  CV_TRI_NOREG = CV_REG_NONE , CV_TRI_D0 = 10 , CV_TRI_A0 = 26 , CV_TRI_E0 = 42 ,
  CV_TRI_E2 = 43 , CV_TRI_E4 = 44 , CV_TRI_E6 = 45 , CV_TRI_E8 = 46 ,
  CV_TRI_E10 = 47 , CV_TRI_E12 = 48 , CV_TRI_E14 = 49 , CV_TRI_EA0 = 50 ,
  CV_TRI_EA2 = 51 , CV_TRI_EA4 = 52 , CV_TRI_EA6 = 53 , CV_TRI_EA8 = 54 ,
  CV_TRI_EA10 = 55 , CV_TRI_EA12 = 56 , CV_TRI_EA14 = 57 , CV_TRI_PSW = 58 ,
  CV_TRI_PCXI = 59 , CV_TRI_PC = 60 , CV_TRI_FCX = 61 , CV_TRI_LCX = 62 ,
  CV_TRI_ISP = 63 , CV_TRI_ICR = 64 , CV_TRI_BIV = 65 , CV_TRI_BTV = 66 ,
  CV_TRI_SYSCON = 67 , CV_TRI_DPRx_0 = 68 , CV_TRI_CPRx_0 = 68 , CV_TRI_DPMx_0 = 68 ,
  CV_TRI_CPMx_0 = 68 , CV_TRI_DBGSSR = 72 , CV_TRI_EXEVT = 73 , CV_TRI_SWEVT = 74 ,
  CV_TRI_CREVT = 75 , CV_TRI_TRnEVT = 76 , CV_TRI_MMUCON = 77 , CV_TRI_ASI = 78 ,
  CV_TRI_TVA = 79 , CV_TRI_TPA = 80 , CV_TRI_TPX = 81 , CV_TRI_TFA = 82 ,
  CV_AM33_NOREG = CV_REG_NONE , CV_AM33_E0 = 10 , CV_AM33_A0 = 20 , CV_AM33_D0 = 30 ,
  CV_AM33_FS0 = 40 , CV_AM33_SP = 80 , CV_AM33_PC = 81 , CV_AM33_MDR = 82 ,
  CV_AM33_MDRQ = 83 , CV_AM33_MCRH = 84 , CV_AM33_MCRL = 85 , CV_AM33_MCVF = 86 ,
  CV_AM33_EPSW = 87 , CV_AM33_FPCR = 88 , CV_AM33_LIR = 89 , CV_AM33_LAR = 90 ,
  CV_M32R_NOREG = CV_REG_NONE , CV_M32R_R0 = 10 , CV_M32R_R12 = 22 , CV_M32R_R13 = 23 ,
  CV_M32R_R14 = 24 , CV_M32R_R15 = 25 , CV_M32R_PSW = 26 , CV_M32R_CBR = 27 ,
  CV_M32R_SPI = 28 , CV_M32R_SPU = 29 , CV_M32R_SPO = 30 , CV_M32R_BPC = 31 ,
  CV_M32R_ACHI = 32 , CV_M32R_ACLO = 33 , CV_M32R_PC = 34 , CV_AMD64_NONE = CV_REG_NONE ,
  CV_AMD64_AL = CV_REG_AL , CV_AMD64_CL = CV_REG_CL , CV_AMD64_DL = CV_REG_DL , CV_AMD64_BL = CV_REG_BL ,
  CV_AMD64_AH = CV_REG_AH , CV_AMD64_CH = CV_REG_CH , CV_AMD64_DH = CV_REG_DH , CV_AMD64_BH = CV_REG_BH ,
  CV_AMD64_AX = CV_REG_AX , CV_AMD64_CX = CV_REG_CX , CV_AMD64_DX = CV_REG_DX , CV_AMD64_BX = CV_REG_BX ,
  CV_AMD64_SP = CV_REG_SP , CV_AMD64_BP = CV_REG_BP , CV_AMD64_SI = CV_REG_SI , CV_AMD64_DI = CV_REG_DI ,
  CV_AMD64_EAX = CV_REG_EAX , CV_AMD64_ECX = CV_REG_ECX , CV_AMD64_EDX = CV_REG_EDX , CV_AMD64_EBX = CV_REG_EBX ,
  CV_AMD64_ESP = CV_REG_ESP , CV_AMD64_EBP = CV_REG_EBP , CV_AMD64_ESI = CV_REG_ESI , CV_AMD64_EDI = CV_REG_EDI ,
  CV_AMD64_ES = CV_REG_ES , CV_AMD64_CS = CV_REG_CS , CV_AMD64_SS = CV_REG_SS , CV_AMD64_DS = CV_REG_DS ,
  CV_AMD64_FS = CV_REG_FS , CV_AMD64_GS = CV_REG_GS , CV_AMD64_FLAGS = CV_REG_FLAGS , CV_AMD64_RIP = CV_REG_EIP ,
  CV_AMD64_EFLAGS = CV_REG_EFLAGS , CV_AMD64_TEMP = CV_REG_TEMP , CV_AMD64_TEMPH = CV_REG_TEMPH , CV_AMD64_QUOTE = CV_REG_QUOTE ,
  CV_AMD64_PCDR3 = CV_REG_PCDR3 , CV_AMD64_CR0 = CV_REG_CR0 , CV_AMD64_DR0 = CV_REG_DR0 , CV_AMD64_GDTR = CV_REG_GDTR ,
  CV_AMD64_GDTL = CV_REG_GDTL , CV_AMD64_IDTR = CV_REG_IDTR , CV_AMD64_IDTL = CV_REG_IDTL , CV_AMD64_LDTR = CV_REG_LDTR ,
  CV_AMD64_TR = CV_REG_TR , CV_AMD64_PSEUDO1 = CV_REG_PSEUDO1 , CV_AMD64_ST0 = CV_REG_ST0 , CV_AMD64_CTRL = CV_REG_CTRL ,
  CV_AMD64_STAT = CV_REG_STAT , CV_AMD64_TAG = CV_REG_TAG , CV_AMD64_FPIP = CV_REG_FPIP , CV_AMD64_FPCS = CV_REG_FPCS ,
  CV_AMD64_FPDO = CV_REG_FPDO , CV_AMD64_FPDS = CV_REG_FPDS , CV_AMD64_ISEM = CV_REG_ISEM , CV_AMD64_FPEIP = CV_REG_FPEIP ,
  CV_AMD64_FPEDO = CV_REG_FPEDO , CV_AMD64_MM0 = CV_REG_MM0 , CV_AMD64_XMM0 = CV_REG_XMM0 , CV_AMD64_XMM00 = CV_REG_XMM00 ,
  CV_AMD64_XMM0L = CV_REG_XMM0L , CV_AMD64_XMM0H = CV_REG_XMM0H , CV_AMD64_MXCSR = CV_REG_MXCSR , CV_AMD64_EDXEAX = CV_REG_EDXEAX ,
  CV_AMD64_EMM0L = CV_REG_EMM0L , CV_AMD64_EMM0H = CV_REG_EMM0H , CV_AMD64_MM00 = CV_REG_MM00 , CV_AMD64_MM01 = CV_REG_MM01 ,
  CV_AMD64_MM10 = CV_REG_MM10 , CV_AMD64_MM11 = CV_REG_MM11 , CV_AMD64_MM20 = CV_REG_MM20 , CV_AMD64_MM21 = CV_REG_MM21 ,
  CV_AMD64_MM30 = CV_REG_MM30 , CV_AMD64_MM31 = CV_REG_MM31 , CV_AMD64_MM40 = CV_REG_MM40 , CV_AMD64_MM41 = CV_REG_MM41 ,
  CV_AMD64_MM50 = CV_REG_MM50 , CV_AMD64_MM51 = CV_REG_MM51 , CV_AMD64_MM60 = CV_REG_MM60 , CV_AMD64_MM61 = CV_REG_MM61 ,
  CV_AMD64_MM70 = CV_REG_MM70 , CV_AMD64_MM71 = CV_REG_MM71 , CV_AMD64_XMM8 = 252 , CV_AMD64_RAX = 328 ,
  CV_AMD64_RBX = 329 , CV_AMD64_RCX = 330 , CV_AMD64_RDX = 331 , CV_AMD64_RSI = 332 ,
  CV_AMD64_RDI = 333 , CV_AMD64_RBP = 334 , CV_AMD64_RSP = 335 , CV_AMD64_R8 = 336 ,
  CV_AMD64_R9 = 337 , CV_AMD64_R10 = 338 , CV_AMD64_R11 = 339 , CV_AMD64_R12 = 340 ,
  CV_AMD64_R13 = 341 , CV_AMD64_R14 = 342 , CV_AMD64_R15 = 343 , CV_ARM64_NOREG = CV_REG_NONE ,
  CV_ARM64_X0 = 10 , CV_ARM64_SP = 41 , CV_ARM64_PC = 42 , CV_ARM64_PSTATE = 43 ,
  CV_ALLREG_ERR = 30000 , CV_ALLREG_TEB = 30001 , CV_ALLREG_TIMER = 30002 , CV_ALLREG_EFAD1 = 30003 ,
  CV_ALLREG_EFAD2 = 30004 , CV_ALLREG_EFAD3 = 30005 , CV_ALLREG_VFRAME = 30006 , CV_ALLREG_HANDLE = 30007 ,
  CV_ALLREG_PARAMS = 30008 , CV_ALLREG_LOCALS = 30009 , CV_ALLREG_TID = 30010 , CV_ALLREG_ENV = 30011 ,
  CV_ALLREG_CMDLN = 30012 , CV_REG_NONE = 0 , CV_REG_AL = 1 , CV_REG_CL = 2 ,
  CV_REG_DL = 3 , CV_REG_BL = 4 , CV_REG_AH = 5 , CV_REG_CH = 6 ,
  CV_REG_DH = 7 , CV_REG_BH = 8 , CV_REG_AX = 9 , CV_REG_CX = 10 ,
  CV_REG_DX = 11 , CV_REG_BX = 12 , CV_REG_SP = 13 , CV_REG_BP = 14 ,
  CV_REG_SI = 15 , CV_REG_DI = 16 , CV_REG_EAX = 17 , CV_REG_ECX = 18 ,
  CV_REG_EDX = 19 , CV_REG_EBX = 20 , CV_REG_ESP = 21 , CV_REG_EBP = 22 ,
  CV_REG_ESI = 23 , CV_REG_EDI = 24 , CV_REG_ES = 25 , CV_REG_CS = 26 ,
  CV_REG_SS = 27 , CV_REG_DS = 28 , CV_REG_FS = 29 , CV_REG_GS = 30 ,
  CV_REG_IP = 31 , CV_REG_FLAGS = 32 , CV_REG_EIP = 33 , CV_REG_EFLAGS = 34 ,
  CV_REG_TEMP = 40 , CV_REG_TEMPH = 41 , CV_REG_QUOTE = 42 , CV_REG_PCDR3 = 43 ,
  CV_REG_CR0 = 80 , CV_REG_DR0 = 90 , CV_REG_GDTR = 110 , CV_REG_GDTL = 111 ,
  CV_REG_IDTR = 112 , CV_REG_IDTL = 113 , CV_REG_LDTR = 114 , CV_REG_TR = 115 ,
  CV_REG_PSEUDO1 = 116 , CV_REG_ST0 = 128 , CV_REG_CTRL = 136 , CV_REG_STAT = 137 ,
  CV_REG_TAG = 138 , CV_REG_FPIP = 139 , CV_REG_FPCS = 140 , CV_REG_FPDO = 141 ,
  CV_REG_FPDS = 142 , CV_REG_ISEM = 143 , CV_REG_FPEIP = 144 , CV_REG_FPEDO = 145 ,
  CV_REG_MM0 = 146 , CV_REG_XMM0 = 154 , CV_REG_XMM00 = 162 , CV_REG_XMM0L = 194 ,
  CV_REG_XMM0H = 202 , CV_REG_MXCSR = 211 , CV_REG_EDXEAX = 212 , CV_REG_EMM0L = 220 ,
  CV_REG_EMM0H = 228 , CV_REG_MM00 = 236 , CV_REG_MM01 = 237 , CV_REG_MM10 = 238 ,
  CV_REG_MM11 = 239 , CV_REG_MM20 = 240 , CV_REG_MM21 = 241 , CV_REG_MM30 = 242 ,
  CV_REG_MM31 = 243 , CV_REG_MM40 = 244 , CV_REG_MM41 = 245 , CV_REG_MM50 = 246 ,
  CV_REG_MM51 = 247 , CV_REG_MM60 = 248 , CV_REG_MM61 = 249 , CV_REG_MM70 = 250 ,
  CV_REG_MM71 = 251 , CV_REG_YMM0 = 252 , CV_REG_YMM0H = 260 , CV_REG_YMM0I0 = 268 ,
  CV_REG_YMM1I0 = 272 , CV_REG_YMM2I0 = 276 , CV_REG_YMM3I0 = 280 , CV_REG_YMM4I0 = 284 ,
  CV_REG_YMM5I0 = 288 , CV_REG_YMM6I0 = 292 , CV_REG_YMM7I0 = 296 , CV_REG_YMM0F0 = 300 ,
  CV_REG_YMM1F0 = 308 , CV_REG_YMM2F0 = 316 , CV_REG_YMM3F0 = 324 , CV_REG_YMM4F0 = 332 ,
  CV_REG_YMM5F0 = 340 , CV_REG_YMM6F0 = 348 , CV_REG_YMM7F0 = 356 , CV_REG_YMM0D0 = 364 ,
  CV_REG_YMM1D0 = 368 , CV_REG_YMM2D0 = 372 , CV_REG_YMM3D0 = 376 , CV_REG_YMM4D0 = 380 ,
  CV_REG_YMM5D0 = 384 , CV_REG_YMM6D0 = 388 , CV_REG_YMM7D0 = 392 , CV_R68_D0 = 0 ,
  CV_R68_A0 = 8 , CV_R68_CCR = 16 , CV_R68_SR = 17 , CV_R68_USP = 18 ,
  CV_R68_MSP = 19 , CV_R68_SFC = 20 , CV_R68_DFC = 21 , CV_R68_CACR = 22 ,
  CV_R68_VBR = 23 , CV_R68_CAAR = 24 , CV_R68_ISP = 25 , CV_R68_PC = 26 ,
  CV_R68_FPCR = 28 , CV_R68_FPSR = 29 , CV_R68_FPIAR = 30 , CV_R68_FP0 = 32 ,
  CV_R68_MMUSR030 = 41 , CV_R68_MMUSR = 42 , CV_R68_URP = 43 , CV_R68_DTT0 = 44 ,
  CV_R68_DTT1 = 45 , CV_R68_ITT0 = 46 , CV_R68_ITT1 = 47 , CV_R68_PSR = 51 ,
  CV_R68_PCSR = 52 , CV_R68_VAL = 53 , CV_R68_CRP = 54 , CV_R68_SRP = 55 ,
  CV_R68_DRP = 56 , CV_R68_TC = 57 , CV_R68_AC = 58 , CV_R68_SCC = 59 ,
  CV_R68_CAL = 60 , CV_R68_TT0 = 61 , CV_R68_TT1 = 62 , CV_R68_BAD0 = 64 ,
  CV_R68_BAC0 = 72 , CV_M4_NOREG = CV_REG_NONE , CV_M4_IntZERO = 10 , CV_M4_IntAT = 11 ,
  CV_M4_IntV0 = 12 , CV_M4_IntV1 = 13 , CV_M4_IntA0 = 14 , CV_M4_IntT0 = 18 ,
  CV_M4_IntS0 = 26 , CV_M4_IntT8 = 34 , CV_M4_IntT9 = 35 , CV_M4_IntKT0 = 36 ,
  CV_M4_IntKT1 = 37 , CV_M4_IntGP = 38 , CV_M4_IntSP = 39 , CV_M4_IntS8 = 40 ,
  CV_M4_IntRA = 41 , CV_M4_IntLO = 42 , CV_M4_IntHI = 43 , CV_M4_Fir = 50 ,
  CV_M4_Psr = 51 , CV_M4_FltF0 = 60 , CV_M4_FltFsr = 92 , CV_ALPHA_NOREG = CV_REG_NONE ,
  CV_ALPHA_FltF0 = 10 , CV_ALPHA_IntV0 = 42 , CV_ALPHA_IntT0 = 43 , CV_ALPHA_IntS0 = 51 ,
  CV_ALPHA_IntFP = 57 , CV_ALPHA_IntA0 = 58 , CV_ALPHA_IntT8 = 64 , CV_ALPHA_IntT9 = 65 ,
  CV_ALPHA_IntT10 = 66 , CV_ALPHA_IntT11 = 67 , CV_ALPHA_IntRA = 68 , CV_ALPHA_IntT12 = 69 ,
  CV_ALPHA_IntAT = 70 , CV_ALPHA_IntGP = 71 , CV_ALPHA_IntSP = 72 , CV_ALPHA_IntZERO = 73 ,
  CV_ALPHA_Fpcr = 74 , CV_ALPHA_Fir = 75 , CV_ALPHA_Psr = 76 , CV_ALPHA_FltFsr = 77 ,
  CV_ALPHA_SoftFpcr = 78 , CV_PPC_GPR0 = 1 , CV_PPC_CR = 33 , CV_PPC_CR0 = 34 ,
  CV_PPC_FPR0 = 42 , CV_PPC_FPSCR = 74 , CV_PPC_MSR = 75 , CV_PPC_SR0 = 76 ,
  CV_PPC_PC = 99 , CV_PPC_MQ = 100 , CV_PPC_XER = 101 , CV_PPC_RTCU = 104 ,
  CV_PPC_RTCL = 105 , CV_PPC_LR = 108 , CV_PPC_CTR = 109 , CV_PPC_COMPARE = 110 ,
  CV_PPC_COUNT = 111 , CV_PPC_DSISR = 118 , CV_PPC_DAR = 119 , CV_PPC_DEC = 122 ,
  CV_PPC_SDR1 = 125 , CV_PPC_SRR0 = 126 , CV_PPC_SRR1 = 127 , CV_PPC_SPRG0 = 372 ,
  CV_PPC_ASR = 280 , CV_PPC_EAR = 382 , CV_PPC_PVR = 287 , CV_PPC_BAT0U = 628 ,
  CV_PPC_BAT0L = 629 , CV_PPC_BAT1U = 630 , CV_PPC_BAT1L = 631 , CV_PPC_BAT2U = 632 ,
  CV_PPC_BAT2L = 633 , CV_PPC_BAT3U = 634 , CV_PPC_BAT3L = 635 , CV_PPC_DBAT0U = 636 ,
  CV_PPC_DBAT0L = 637 , CV_PPC_DBAT1U = 638 , CV_PPC_DBAT1L = 639 , CV_PPC_DBAT2U = 640 ,
  CV_PPC_DBAT2L = 641 , CV_PPC_DBAT3U = 642 , CV_PPC_DBAT3L = 643 , CV_PPC_PMR0 = 1044 ,
  CV_PPC_DMISS = 1076 , CV_PPC_DCMP = 1077 , CV_PPC_HASH1 = 1078 , CV_PPC_HASH2 = 1079 ,
  CV_PPC_IMISS = 1080 , CV_PPC_ICMP = 1081 , CV_PPC_RPA = 1082 , CV_PPC_HID0 = 1108 ,
  CV_JAVA_PC = 1 , CV_SH3_NOREG = CV_REG_NONE , CV_SH3_IntR0 = 10 , CV_SH3_IntFp = 24 ,
  CV_SH3_IntSp = 25 , CV_SH3_Gbr = 38 , CV_SH3_Pr = 39 , CV_SH3_Mach = 40 ,
  CV_SH3_Macl = 41 , CV_SH3_Pc = 50 , CV_SH3_Sr = 51 , CV_SH3_BarA = 60 ,
  CV_SH3_BasrA = 61 , CV_SH3_BamrA = 62 , CV_SH3_BbrA = 63 , CV_SH3_BarB = 64 ,
  CV_SH3_BasrB = 65 , CV_SH3_BamrB = 66 , CV_SH3_BbrB = 67 , CV_SH3_BdrB = 68 ,
  CV_SH3_BdmrB = 69 , CV_SH3_Brcr = 70 , CV_SH_Fpscr = 75 , CV_SH_Fpul = 76 ,
  CV_SH_FpR0 = 80 , CV_SH_XFpR0 = 96 , CV_ARM_NOREG = CV_REG_NONE , CV_ARM_R0 = 10 ,
  CV_ARM_SP = 23 , CV_ARM_LR = 24 , CV_ARM_PC = 25 , CV_ARM_CPSR = 26 ,
  CV_ARM_ACC0 = 27 , CV_ARM_FPSCR = 40 , CV_ARM_FPEXC = 41 , CV_ARM_FS0 = 50 ,
  CV_ARM_FPEXTRA0 = 90 , CV_ARM_WR0 = 128 , CV_ARM_WCID = 144 , CV_ARM_WCON = 145 ,
  CV_ARM_WCSSF = 146 , CV_ARM_WCASF = 147 , CV_ARM_WC4 = 148 , CV_ARM_WC5 = 149 ,
  CV_ARM_WC6 = 150 , CV_ARM_WC7 = 151 , CV_ARM_WCGR0 = 152 , CV_ARM_WC12 = 156 ,
  CV_ARM_WC13 = 157 , CV_ARM_WC14 = 158 , CV_ARM_WC15 = 159 , CV_ARM_FS32 = 200 ,
  CV_ARM_ND0 = 300 , CV_ARM_NQ0 = 400 , CV_ARM64_NOREG = CV_REG_NONE , CV_ARM64_W0 = 10 ,
  CV_ARM64_WZR = 41 , CV_ARM64_PC = 42 , CV_ARM64_PSTATE = 43 , CV_ARM64_X0 = 50 ,
  CV_ARM64_IP0 = 66 , CV_ARM64_IP1 = 67 , CV_ARM64_FP = 79 , CV_ARM64_LR = 80 ,
  CV_ARM64_SP = 81 , CV_ARM64_ZR = 82 , CV_ARM64_NZCV = 90 , CV_ARM64_S0 = 100 ,
  CV_ARM64_D0 = 140 , CV_ARM64_Q0 = 180 , CV_ARM64_FPSR = 220 , CV_IA64_NOREG = CV_REG_NONE ,
  CV_IA64_Br0 = 512 , CV_IA64_P0 = 704 , CV_IA64_Preds = 768 , CV_IA64_IntH0 = 832 ,
  CV_IA64_Ip = 1016 , CV_IA64_Umask = 1017 , CV_IA64_Cfm = 1018 , CV_IA64_Psr = 1019 ,
  CV_IA64_Nats = 1020 , CV_IA64_Nats2 = 1021 , CV_IA64_Nats3 = 1022 , CV_IA64_IntR0 = 1024 ,
  CV_IA64_FltF0 = 2048 , CV_TRI_NOREG = CV_REG_NONE , CV_TRI_D0 = 10 , CV_TRI_A0 = 26 ,
  CV_TRI_E0 = 42 , CV_TRI_E2 = 43 , CV_TRI_E4 = 44 , CV_TRI_E6 = 45 ,
  CV_TRI_E8 = 46 , CV_TRI_E10 = 47 , CV_TRI_E12 = 48 , CV_TRI_E14 = 49 ,
  CV_TRI_EA0 = 50 , CV_TRI_EA2 = 51 , CV_TRI_EA4 = 52 , CV_TRI_EA6 = 53 ,
  CV_TRI_EA8 = 54 , CV_TRI_EA10 = 55 , CV_TRI_EA12 = 56 , CV_TRI_EA14 = 57 ,
  CV_TRI_PSW = 58 , CV_TRI_PCXI = 59 , CV_TRI_PC = 60 , CV_TRI_FCX = 61 ,
  CV_TRI_LCX = 62 , CV_TRI_ISP = 63 , CV_TRI_ICR = 64 , CV_TRI_BIV = 65 ,
  CV_TRI_BTV = 66 , CV_TRI_SYSCON = 67 , CV_TRI_DPRx_0 = 68 , CV_TRI_CPRx_0 = 68 ,
  CV_TRI_DPMx_0 = 68 , CV_TRI_CPMx_0 = 68 , CV_TRI_DBGSSR = 72 , CV_TRI_EXEVT = 73 ,
  CV_TRI_SWEVT = 74 , CV_TRI_CREVT = 75 , CV_TRI_TRnEVT = 76 , CV_TRI_MMUCON = 77 ,
  CV_TRI_ASI = 78 , CV_TRI_TVA = 79 , CV_TRI_TPA = 80 , CV_TRI_TPX = 81 ,
  CV_TRI_TFA = 82 , CV_AM33_NOREG = CV_REG_NONE , CV_AM33_E0 = 10 , CV_AM33_A0 = 20 ,
  CV_AM33_D0 = 30 , CV_AM33_FS0 = 40 , CV_AM33_SP = 80 , CV_AM33_PC = 81 ,
  CV_AM33_MDR = 82 , CV_AM33_MDRQ = 83 , CV_AM33_MCRH = 84 , CV_AM33_MCRL = 85 ,
  CV_AM33_MCVF = 86 , CV_AM33_EPSW = 87 , CV_AM33_FPCR = 88 , CV_AM33_LIR = 89 ,
  CV_AM33_LAR = 90 , CV_M32R_NOREG = CV_REG_NONE , CV_M32R_R0 = 10 , CV_M32R_R12 = 22 ,
  CV_M32R_R13 = 23 , CV_M32R_R14 = 24 , CV_M32R_R15 = 25 , CV_M32R_PSW = 26 ,
  CV_M32R_CBR = 27 , CV_M32R_SPI = 28 , CV_M32R_SPU = 29 , CV_M32R_SPO = 30 ,
  CV_M32R_BPC = 31 , CV_M32R_ACHI = 32 , CV_M32R_ACLO = 33 , CV_M32R_PC = 34 ,
  CV_AMD64_NONE = CV_REG_NONE , CV_AMD64_AL = CV_REG_AL , CV_AMD64_CL = CV_REG_CL , CV_AMD64_DL = CV_REG_DL ,
  CV_AMD64_BL = CV_REG_BL , CV_AMD64_AH = CV_REG_AH , CV_AMD64_CH = CV_REG_CH , CV_AMD64_DH = CV_REG_DH ,
  CV_AMD64_BH = CV_REG_BH , CV_AMD64_AX = CV_REG_AX , CV_AMD64_CX = CV_REG_CX , CV_AMD64_DX = CV_REG_DX ,
  CV_AMD64_BX = CV_REG_BX , CV_AMD64_SP = CV_REG_SP , CV_AMD64_BP = CV_REG_BP , CV_AMD64_SI = CV_REG_SI ,
  CV_AMD64_DI = CV_REG_DI , CV_AMD64_EAX = CV_REG_EAX , CV_AMD64_ECX = CV_REG_ECX , CV_AMD64_EDX = CV_REG_EDX ,
  CV_AMD64_EBX = CV_REG_EBX , CV_AMD64_ESP = CV_REG_ESP , CV_AMD64_EBP = CV_REG_EBP , CV_AMD64_ESI = CV_REG_ESI ,
  CV_AMD64_EDI = CV_REG_EDI , CV_AMD64_ES = CV_REG_ES , CV_AMD64_CS = CV_REG_CS , CV_AMD64_SS = CV_REG_SS ,
  CV_AMD64_DS = CV_REG_DS , CV_AMD64_FS = CV_REG_FS , CV_AMD64_GS = CV_REG_GS , CV_AMD64_FLAGS = CV_REG_FLAGS ,
  CV_AMD64_RIP = CV_REG_EIP , CV_AMD64_EFLAGS = CV_REG_EFLAGS , CV_AMD64_TEMP = CV_REG_TEMP , CV_AMD64_TEMPH = CV_REG_TEMPH ,
  CV_AMD64_QUOTE = CV_REG_QUOTE , CV_AMD64_PCDR3 = CV_REG_PCDR3 , CV_AMD64_CR0 = CV_REG_CR0 , CV_AMD64_DR0 = CV_REG_DR0 ,
  CV_AMD64_GDTR = CV_REG_GDTR , CV_AMD64_GDTL = CV_REG_GDTL , CV_AMD64_IDTR = CV_REG_IDTR , CV_AMD64_IDTL = CV_REG_IDTL ,
  CV_AMD64_LDTR = CV_REG_LDTR , CV_AMD64_TR = CV_REG_TR , CV_AMD64_PSEUDO1 = CV_REG_PSEUDO1 , CV_AMD64_ST0 = CV_REG_ST0 ,
  CV_AMD64_CTRL = CV_REG_CTRL , CV_AMD64_STAT = CV_REG_STAT , CV_AMD64_TAG = CV_REG_TAG , CV_AMD64_FPIP = CV_REG_FPIP ,
  CV_AMD64_FPCS = CV_REG_FPCS , CV_AMD64_FPDO = CV_REG_FPDO , CV_AMD64_FPDS = CV_REG_FPDS , CV_AMD64_ISEM = CV_REG_ISEM ,
  CV_AMD64_FPEIP = CV_REG_FPEIP , CV_AMD64_FPEDO = CV_REG_FPEDO , CV_AMD64_MM0 = CV_REG_MM0 , CV_AMD64_XMM0 = CV_REG_XMM0 ,
  CV_AMD64_XMM00 = CV_REG_XMM00 , CV_AMD64_XMM0L = CV_REG_XMM0L , CV_AMD64_XMM0H = CV_REG_XMM0H , CV_AMD64_MXCSR = CV_REG_MXCSR ,
  CV_AMD64_EDXEAX = CV_REG_EDXEAX , CV_AMD64_EMM0L = CV_REG_EMM0L , CV_AMD64_EMM0H = CV_REG_EMM0H , CV_AMD64_MM00 = CV_REG_MM00 ,
  CV_AMD64_MM01 = CV_REG_MM01 , CV_AMD64_MM10 = CV_REG_MM10 , CV_AMD64_MM11 = CV_REG_MM11 , CV_AMD64_MM20 = CV_REG_MM20 ,
  CV_AMD64_MM21 = CV_REG_MM21 , CV_AMD64_MM30 = CV_REG_MM30 , CV_AMD64_MM31 = CV_REG_MM31 , CV_AMD64_MM40 = CV_REG_MM40 ,
  CV_AMD64_MM41 = CV_REG_MM41 , CV_AMD64_MM50 = CV_REG_MM50 , CV_AMD64_MM51 = CV_REG_MM51 , CV_AMD64_MM60 = CV_REG_MM60 ,
  CV_AMD64_MM61 = CV_REG_MM61 , CV_AMD64_MM70 = CV_REG_MM70 , CV_AMD64_MM71 = CV_REG_MM71 , CV_AMD64_XMM8 = 252 ,
  CV_AMD64_RAX = 328 , CV_AMD64_RBX = 329 , CV_AMD64_RCX = 330 , CV_AMD64_RDX = 331 ,
  CV_AMD64_RSI = 332 , CV_AMD64_RDI = 333 , CV_AMD64_RBP = 334 , CV_AMD64_RSP = 335 ,
  CV_AMD64_R8 = 336 , CV_AMD64_R9 = 337 , CV_AMD64_R10 = 338 , CV_AMD64_R11 = 339 ,
  CV_AMD64_R12 = 340 , CV_AMD64_R13 = 341 , CV_AMD64_R14 = 342 , CV_AMD64_R15 = 343
}
 
enum  THUNK_ORDINAL {
  THUNK_ORDINAL_NOTYPE , THUNK_ORDINAL_ADJUSTOR , THUNK_ORDINAL_VCALL , THUNK_ORDINAL_PCODE ,
  THUNK_ORDINAL_LOAD , THUNK_ORDINAL_NOTYPE , THUNK_ORDINAL_ADJUSTOR , THUNK_ORDINAL_VCALL ,
  THUNK_ORDINAL_PCODE , THUNK_ORDINAL_LOAD
}
 
enum  CV_call_e {
  CV_CALL_NEAR_C , CV_CALL_FAR_C , CV_CALL_NEAR_PASCAL , CV_CALL_FAR_PASCAL ,
  CV_CALL_NEAR_FAST , CV_CALL_FAR_FAST , CV_CALL_SKIPPED , CV_CALL_NEAR_STD ,
  CV_CALL_FAR_STD , CV_CALL_NEAR_SYS , CV_CALL_FAR_SYS , CV_CALL_THISCALL ,
  CV_CALL_MIPSCALL , CV_CALL_GENERIC , CV_CALL_ALPHACALL , CV_CALL_PPCCALL ,
  CV_CALL_SHCALL , CV_CALL_ARMCALL , CV_CALL_AM33CALL , CV_CALL_TRICALL ,
  CV_CALL_SH5CALL , CV_CALL_M32RCALL , CV_CALL_RESERVED , CV_CALL_NEAR_C = 0x00 ,
  CV_CALL_NEAR_FAST = 0x04 , CV_CALL_NEAR_STD = 0x07 , CV_CALL_NEAR_SYS = 0x09 , CV_CALL_THISCALL = 0x0b ,
  CV_CALL_CLRCALL = 0x16 , CV_CALL_NEAR_C , CV_CALL_FAR_C , CV_CALL_NEAR_PASCAL ,
  CV_CALL_FAR_PASCAL , CV_CALL_NEAR_FAST , CV_CALL_FAR_FAST , CV_CALL_SKIPPED ,
  CV_CALL_NEAR_STD , CV_CALL_FAR_STD , CV_CALL_NEAR_SYS , CV_CALL_FAR_SYS ,
  CV_CALL_THISCALL , CV_CALL_MIPSCALL , CV_CALL_GENERIC , CV_CALL_ALPHACALL ,
  CV_CALL_PPCCALL , CV_CALL_SHCALL , CV_CALL_ARMCALL , CV_CALL_AM33CALL ,
  CV_CALL_TRICALL , CV_CALL_SH5CALL , CV_CALL_M32RCALL , CV_CALL_RESERVED
}
 

Typedef Documentation

◆ CV_call_e

Enumeration Type Documentation

◆ BasicType

Enumerator
btNoType 
btVoid 
btChar 
btWChar 
btInt 
btUInt 
btFloat 
btBCD 
btBool 
btLong 
btULong 
btCurrency 
btDate 
btVariant 
btComplex 
btBit 
btBSTR 
btHresult 
btNoType 
btVoid 
btChar 
btWChar 
btInt 
btUInt 
btFloat 
btBCD 
btBool 
btLong 
btULong 
btCurrency 
btDate 
btVariant 
btComplex 
btBit 
btBSTR 
btHresult 
btNoType 
btVoid 
btChar 
btWChar 
btInt 
btUInt 
btFloat 
btBCD 
btBool 
btLong 
btULong 
btCurrency 
btDate 
btVariant 
btComplex 
btBit 
btBSTR 
btHresult 
btNoType 
btVoid 
btChar 
btWChar 
btInt 
btUInt 
btFloat 
btBCD 
btBool 
btLong 
btULong 
btCurrency 
btDate 
btVariant 
btComplex 
btBit 
btBSTR 
btHresult 
btChar16 
btChar32 

Definition at line 61 of file cvconst.h.

62{
63 btNoType = 0,
64 btVoid = 1,
65 btChar = 2,
66 btWChar = 3,
67 btInt = 6,
68 btUInt = 7,
69 btFloat = 8,
70 btBCD = 9,
71 btBool = 10,
72 btLong = 13,
73 btULong = 14,
74 btCurrency = 25,
75 btDate = 26,
76 btVariant = 27,
77 btComplex = 28,
78 btBit = 29,
79 btBSTR = 30,
80 btHresult = 31,
81 btChar16 = 32,
82 btChar32 = 33
83};
@ btVoid
Definition: cvconst.h:64
@ btVariant
Definition: cvconst.h:76
@ btBCD
Definition: cvconst.h:70
@ btBSTR
Definition: cvconst.h:79
@ btUInt
Definition: cvconst.h:68
@ btULong
Definition: cvconst.h:73
@ btLong
Definition: cvconst.h:72
@ btChar32
Definition: cvconst.h:82
@ btChar16
Definition: cvconst.h:81
@ btChar
Definition: cvconst.h:65
@ btBit
Definition: cvconst.h:78
@ btNoType
Definition: cvconst.h:63
@ btDate
Definition: cvconst.h:75
@ btComplex
Definition: cvconst.h:77
@ btBool
Definition: cvconst.h:71
@ btInt
Definition: cvconst.h:67
@ btCurrency
Definition: cvconst.h:74
@ btHresult
Definition: cvconst.h:80
@ btWChar
Definition: cvconst.h:66
@ btFloat
Definition: cvconst.h:69

◆ CV_call_e

Enumerator
CV_CALL_NEAR_C 
CV_CALL_FAR_C 
CV_CALL_NEAR_PASCAL 
CV_CALL_FAR_PASCAL 
CV_CALL_NEAR_FAST 
CV_CALL_FAR_FAST 
CV_CALL_SKIPPED 
CV_CALL_NEAR_STD 
CV_CALL_FAR_STD 
CV_CALL_NEAR_SYS 
CV_CALL_FAR_SYS 
CV_CALL_THISCALL 
CV_CALL_MIPSCALL 
CV_CALL_GENERIC 
CV_CALL_ALPHACALL 
CV_CALL_PPCCALL 
CV_CALL_SHCALL 
CV_CALL_ARMCALL 
CV_CALL_AM33CALL 
CV_CALL_TRICALL 
CV_CALL_SH5CALL 
CV_CALL_M32RCALL 
CV_CALL_RESERVED 
CV_CALL_NEAR_C 
CV_CALL_NEAR_FAST 
CV_CALL_NEAR_STD 
CV_CALL_NEAR_SYS 
CV_CALL_THISCALL 
CV_CALL_CLRCALL 
CV_CALL_NEAR_C 
CV_CALL_FAR_C 
CV_CALL_NEAR_PASCAL 
CV_CALL_FAR_PASCAL 
CV_CALL_NEAR_FAST 
CV_CALL_FAR_FAST 
CV_CALL_SKIPPED 
CV_CALL_NEAR_STD 
CV_CALL_FAR_STD 
CV_CALL_NEAR_SYS 
CV_CALL_FAR_SYS 
CV_CALL_THISCALL 
CV_CALL_MIPSCALL 
CV_CALL_GENERIC 
CV_CALL_ALPHACALL 
CV_CALL_PPCCALL 
CV_CALL_SHCALL 
CV_CALL_ARMCALL 
CV_CALL_AM33CALL 
CV_CALL_TRICALL 
CV_CALL_SH5CALL 
CV_CALL_M32RCALL 
CV_CALL_RESERVED 

Definition at line 699 of file cvconst.h.

700{
724} CV_call_e;
CV_call_e
Definition: cvconst.h:700
@ CV_CALL_TRICALL
Definition: cvconst.h:720
@ CV_CALL_NEAR_STD
Definition: cvconst.h:708
@ CV_CALL_ALPHACALL
Definition: cvconst.h:715
@ CV_CALL_NEAR_FAST
Definition: cvconst.h:705
@ CV_CALL_AM33CALL
Definition: cvconst.h:719
@ CV_CALL_SHCALL
Definition: cvconst.h:717
@ CV_CALL_FAR_FAST
Definition: cvconst.h:706
@ CV_CALL_FAR_STD
Definition: cvconst.h:709
@ CV_CALL_M32RCALL
Definition: cvconst.h:722
@ CV_CALL_NEAR_SYS
Definition: cvconst.h:710
@ CV_CALL_FAR_C
Definition: cvconst.h:702
@ CV_CALL_SH5CALL
Definition: cvconst.h:721
@ CV_CALL_GENERIC
Definition: cvconst.h:714
@ CV_CALL_PPCCALL
Definition: cvconst.h:716
@ CV_CALL_THISCALL
Definition: cvconst.h:712
@ CV_CALL_FAR_PASCAL
Definition: cvconst.h:704
@ CV_CALL_SKIPPED
Definition: cvconst.h:707
@ CV_CALL_RESERVED
Definition: cvconst.h:723
@ CV_CALL_MIPSCALL
Definition: cvconst.h:713
@ CV_CALL_NEAR_C
Definition: cvconst.h:701
@ CV_CALL_FAR_SYS
Definition: cvconst.h:711
@ CV_CALL_ARMCALL
Definition: cvconst.h:718
@ CV_CALL_NEAR_PASCAL
Definition: cvconst.h:703

◆ CV_HREG_e

Enumerator
CV_ALLREG_ERR 
CV_ALLREG_TEB 
CV_ALLREG_TIMER 
CV_ALLREG_EFAD1 
CV_ALLREG_EFAD2 
CV_ALLREG_EFAD3 
CV_ALLREG_VFRAME 
CV_ALLREG_HANDLE 
CV_ALLREG_PARAMS 
CV_ALLREG_LOCALS 
CV_ALLREG_TID 
CV_ALLREG_ENV 
CV_ALLREG_CMDLN 
CV_REG_NONE 
CV_REG_AL 
CV_REG_CL 
CV_REG_DL 
CV_REG_BL 
CV_REG_AH 
CV_REG_CH 
CV_REG_DH 
CV_REG_BH 
CV_REG_AX 
CV_REG_CX 
CV_REG_DX 
CV_REG_BX 
CV_REG_SP 
CV_REG_BP 
CV_REG_SI 
CV_REG_DI 
CV_REG_EAX 
CV_REG_ECX 
CV_REG_EDX 
CV_REG_EBX 
CV_REG_ESP 
CV_REG_EBP 
CV_REG_ESI 
CV_REG_EDI 
CV_REG_ES 
CV_REG_CS 
CV_REG_SS 
CV_REG_DS 
CV_REG_FS 
CV_REG_GS 
CV_REG_IP 
CV_REG_FLAGS 
CV_REG_EIP 
CV_REG_EFLAGS 
CV_REG_TEMP 
CV_REG_TEMPH 
CV_REG_QUOTE 
CV_REG_PCDR3 
CV_REG_CR0 
CV_REG_DR0 
CV_REG_GDTR 
CV_REG_GDTL 
CV_REG_IDTR 
CV_REG_IDTL 
CV_REG_LDTR 
CV_REG_TR 
CV_REG_PSEUDO1 
CV_REG_ST0 
CV_REG_CTRL 
CV_REG_STAT 
CV_REG_TAG 
CV_REG_FPIP 
CV_REG_FPCS 
CV_REG_FPDO 
CV_REG_FPDS 
CV_REG_ISEM 
CV_REG_FPEIP 
CV_REG_FPEDO 
CV_REG_MM0 
CV_REG_XMM0 
CV_REG_XMM00 
CV_REG_XMM0L 
CV_REG_XMM0H 
CV_REG_MXCSR 
CV_REG_EDXEAX 
CV_REG_EMM0L 
CV_REG_EMM0H 
CV_REG_MM00 
CV_REG_MM01 
CV_REG_MM10 
CV_REG_MM11 
CV_REG_MM20 
CV_REG_MM21 
CV_REG_MM30 
CV_REG_MM31 
CV_REG_MM40 
CV_REG_MM41 
CV_REG_MM50 
CV_REG_MM51 
CV_REG_MM60 
CV_REG_MM61 
CV_REG_MM70 
CV_REG_MM71 
CV_REG_YMM0 
CV_REG_YMM0H 
CV_REG_YMM0I0 
CV_REG_YMM1I0 
CV_REG_YMM2I0 
CV_REG_YMM3I0 
CV_REG_YMM4I0 
CV_REG_YMM5I0 
CV_REG_YMM6I0 
CV_REG_YMM7I0 
CV_REG_YMM0F0 
CV_REG_YMM1F0 
CV_REG_YMM2F0 
CV_REG_YMM3F0 
CV_REG_YMM4F0 
CV_REG_YMM5F0 
CV_REG_YMM6F0 
CV_REG_YMM7F0 
CV_REG_YMM0D0 
CV_REG_YMM1D0 
CV_REG_YMM2D0 
CV_REG_YMM3D0 
CV_REG_YMM4D0 
CV_REG_YMM5D0 
CV_REG_YMM6D0 
CV_REG_YMM7D0 
CV_R68_D0 
CV_R68_A0 
CV_R68_CCR 
CV_R68_SR 
CV_R68_USP 
CV_R68_MSP 
CV_R68_SFC 
CV_R68_DFC 
CV_R68_CACR 
CV_R68_VBR 
CV_R68_CAAR 
CV_R68_ISP 
CV_R68_PC 
CV_R68_FPCR 
CV_R68_FPSR 
CV_R68_FPIAR 
CV_R68_FP0 
CV_R68_MMUSR030 
CV_R68_MMUSR 
CV_R68_URP 
CV_R68_DTT0 
CV_R68_DTT1 
CV_R68_ITT0 
CV_R68_ITT1 
CV_R68_PSR 
CV_R68_PCSR 
CV_R68_VAL 
CV_R68_CRP 
CV_R68_SRP 
CV_R68_DRP 
CV_R68_TC 
CV_R68_AC 
CV_R68_SCC 
CV_R68_CAL 
CV_R68_TT0 
CV_R68_TT1 
CV_R68_BAD0 
CV_R68_BAC0 
CV_M4_NOREG 
CV_M4_IntZERO 
CV_M4_IntAT 
CV_M4_IntV0 
CV_M4_IntV1 
CV_M4_IntA0 
CV_M4_IntT0 
CV_M4_IntS0 
CV_M4_IntT8 
CV_M4_IntT9 
CV_M4_IntKT0 
CV_M4_IntKT1 
CV_M4_IntGP 
CV_M4_IntSP 
CV_M4_IntS8 
CV_M4_IntRA 
CV_M4_IntLO 
CV_M4_IntHI 
CV_M4_Fir 
CV_M4_Psr 
CV_M4_FltF0 
CV_M4_FltFsr 
CV_ALPHA_NOREG 
CV_ALPHA_FltF0 
CV_ALPHA_IntV0 
CV_ALPHA_IntT0 
CV_ALPHA_IntS0 
CV_ALPHA_IntFP 
CV_ALPHA_IntA0 
CV_ALPHA_IntT8 
CV_ALPHA_IntT9 
CV_ALPHA_IntT10 
CV_ALPHA_IntT11 
CV_ALPHA_IntRA 
CV_ALPHA_IntT12 
CV_ALPHA_IntAT 
CV_ALPHA_IntGP 
CV_ALPHA_IntSP 
CV_ALPHA_IntZERO 
CV_ALPHA_Fpcr 
CV_ALPHA_Fir 
CV_ALPHA_Psr 
CV_ALPHA_FltFsr 
CV_ALPHA_SoftFpcr 
CV_PPC_GPR0 
CV_PPC_CR 
CV_PPC_CR0 
CV_PPC_FPR0 
CV_PPC_FPSCR 
CV_PPC_MSR 
CV_PPC_SR0 
CV_PPC_PC 
CV_PPC_MQ 
CV_PPC_XER 
CV_PPC_RTCU 
CV_PPC_RTCL 
CV_PPC_LR 
CV_PPC_CTR 
CV_PPC_COMPARE 
CV_PPC_COUNT 
CV_PPC_DSISR 
CV_PPC_DAR 
CV_PPC_DEC 
CV_PPC_SDR1 
CV_PPC_SRR0 
CV_PPC_SRR1 
CV_PPC_SPRG0 
CV_PPC_ASR 
CV_PPC_EAR 
CV_PPC_PVR 
CV_PPC_BAT0U 
CV_PPC_BAT0L 
CV_PPC_BAT1U 
CV_PPC_BAT1L 
CV_PPC_BAT2U 
CV_PPC_BAT2L 
CV_PPC_BAT3U 
CV_PPC_BAT3L 
CV_PPC_DBAT0U 
CV_PPC_DBAT0L 
CV_PPC_DBAT1U 
CV_PPC_DBAT1L 
CV_PPC_DBAT2U 
CV_PPC_DBAT2L 
CV_PPC_DBAT3U 
CV_PPC_DBAT3L 
CV_PPC_PMR0 
CV_PPC_DMISS 
CV_PPC_DCMP 
CV_PPC_HASH1 
CV_PPC_HASH2 
CV_PPC_IMISS 
CV_PPC_ICMP 
CV_PPC_RPA 
CV_PPC_HID0 
CV_JAVA_PC 
CV_SH3_NOREG 
CV_SH3_IntR0 
CV_SH3_IntFp 
CV_SH3_IntSp 
CV_SH3_Gbr 
CV_SH3_Pr 
CV_SH3_Mach 
CV_SH3_Macl 
CV_SH3_Pc 
CV_SH3_Sr 
CV_SH3_BarA 
CV_SH3_BasrA 
CV_SH3_BamrA 
CV_SH3_BbrA 
CV_SH3_BarB 
CV_SH3_BasrB 
CV_SH3_BamrB 
CV_SH3_BbrB 
CV_SH3_BdrB 
CV_SH3_BdmrB 
CV_SH3_Brcr 
CV_SH_Fpscr 
CV_SH_Fpul 
CV_SH_FpR0 
CV_SH_XFpR0 
CV_ARM_NOREG 
CV_ARM_R0 
CV_ARM_SP 
CV_ARM_LR 
CV_ARM_PC 
CV_ARM_CPSR 
CV_ARM_ACC0 
CV_ARM_FPSCR 
CV_ARM_FPEXC 
CV_ARM_FS0 
CV_ARM_FPEXTRA0 
CV_ARM_WR0 
CV_ARM_WCID 
CV_ARM_WCON 
CV_ARM_WCSSF 
CV_ARM_WCASF 
CV_ARM_WC4 
CV_ARM_WC5 
CV_ARM_WC6 
CV_ARM_WC7 
CV_ARM_WCGR0 
CV_ARM_WC12 
CV_ARM_WC13 
CV_ARM_WC14 
CV_ARM_WC15 
CV_ARM_FS32 
CV_ARM_ND0 
CV_ARM_NQ0 
CV_IA64_NOREG 
CV_IA64_Br0 
CV_IA64_P0 
CV_IA64_Preds 
CV_IA64_IntH0 
CV_IA64_Ip 
CV_IA64_Umask 
CV_IA64_Cfm 
CV_IA64_Psr 
CV_IA64_Nats 
CV_IA64_Nats2 
CV_IA64_Nats3 
CV_IA64_IntR0 
CV_IA64_FltF0 
CV_TRI_NOREG 
CV_TRI_D0 
CV_TRI_A0 
CV_TRI_E0 
CV_TRI_E2 
CV_TRI_E4 
CV_TRI_E6 
CV_TRI_E8 
CV_TRI_E10 
CV_TRI_E12 
CV_TRI_E14 
CV_TRI_EA0 
CV_TRI_EA2 
CV_TRI_EA4 
CV_TRI_EA6 
CV_TRI_EA8 
CV_TRI_EA10 
CV_TRI_EA12 
CV_TRI_EA14 
CV_TRI_PSW 
CV_TRI_PCXI 
CV_TRI_PC 
CV_TRI_FCX 
CV_TRI_LCX 
CV_TRI_ISP 
CV_TRI_ICR 
CV_TRI_BIV 
CV_TRI_BTV 
CV_TRI_SYSCON 
CV_TRI_DPRx_0 
CV_TRI_CPRx_0 
CV_TRI_DPMx_0 
CV_TRI_CPMx_0 
CV_TRI_DBGSSR 
CV_TRI_EXEVT 
CV_TRI_SWEVT 
CV_TRI_CREVT 
CV_TRI_TRnEVT 
CV_TRI_MMUCON 
CV_TRI_ASI 
CV_TRI_TVA 
CV_TRI_TPA 
CV_TRI_TPX 
CV_TRI_TFA 
CV_AM33_NOREG 
CV_AM33_E0 
CV_AM33_A0 
CV_AM33_D0 
CV_AM33_FS0 
CV_AM33_SP 
CV_AM33_PC 
CV_AM33_MDR 
CV_AM33_MDRQ 
CV_AM33_MCRH 
CV_AM33_MCRL 
CV_AM33_MCVF 
CV_AM33_EPSW 
CV_AM33_FPCR 
CV_AM33_LIR 
CV_AM33_LAR 
CV_M32R_NOREG 
CV_M32R_R0 
CV_M32R_R12 
CV_M32R_R13 
CV_M32R_R14 
CV_M32R_R15 
CV_M32R_PSW 
CV_M32R_CBR 
CV_M32R_SPI 
CV_M32R_SPU 
CV_M32R_SPO 
CV_M32R_BPC 
CV_M32R_ACHI 
CV_M32R_ACLO 
CV_M32R_PC 
CV_AMD64_NONE 
CV_AMD64_AL 
CV_AMD64_CL 
CV_AMD64_DL 
CV_AMD64_BL 
CV_AMD64_AH 
CV_AMD64_CH 
CV_AMD64_DH 
CV_AMD64_BH 
CV_AMD64_AX 
CV_AMD64_CX 
CV_AMD64_DX 
CV_AMD64_BX 
CV_AMD64_SP 
CV_AMD64_BP 
CV_AMD64_SI 
CV_AMD64_DI 
CV_AMD64_EAX 
CV_AMD64_ECX 
CV_AMD64_EDX 
CV_AMD64_EBX 
CV_AMD64_ESP 
CV_AMD64_EBP 
CV_AMD64_ESI 
CV_AMD64_EDI 
CV_AMD64_ES 
CV_AMD64_CS 
CV_AMD64_SS 
CV_AMD64_DS 
CV_AMD64_FS 
CV_AMD64_GS 
CV_AMD64_FLAGS 
CV_AMD64_RIP 
CV_AMD64_EFLAGS 
CV_AMD64_TEMP 
CV_AMD64_TEMPH 
CV_AMD64_QUOTE 
CV_AMD64_PCDR3 
CV_AMD64_CR0 
CV_AMD64_DR0 
CV_AMD64_GDTR 
CV_AMD64_GDTL 
CV_AMD64_IDTR 
CV_AMD64_IDTL 
CV_AMD64_LDTR 
CV_AMD64_TR 
CV_AMD64_PSEUDO1 
CV_AMD64_ST0 
CV_AMD64_CTRL 
CV_AMD64_STAT 
CV_AMD64_TAG 
CV_AMD64_FPIP 
CV_AMD64_FPCS 
CV_AMD64_FPDO 
CV_AMD64_FPDS 
CV_AMD64_ISEM 
CV_AMD64_FPEIP 
CV_AMD64_FPEDO 
CV_AMD64_MM0 
CV_AMD64_XMM0 
CV_AMD64_XMM00 
CV_AMD64_XMM0L 
CV_AMD64_XMM0H 
CV_AMD64_MXCSR 
CV_AMD64_EDXEAX 
CV_AMD64_EMM0L 
CV_AMD64_EMM0H 
CV_AMD64_MM00 
CV_AMD64_MM01 
CV_AMD64_MM10 
CV_AMD64_MM11 
CV_AMD64_MM20 
CV_AMD64_MM21 
CV_AMD64_MM30 
CV_AMD64_MM31 
CV_AMD64_MM40 
CV_AMD64_MM41 
CV_AMD64_MM50 
CV_AMD64_MM51 
CV_AMD64_MM60 
CV_AMD64_MM61 
CV_AMD64_MM70 
CV_AMD64_MM71 
CV_AMD64_XMM8 
CV_AMD64_RAX 
CV_AMD64_RBX 
CV_AMD64_RCX 
CV_AMD64_RDX 
CV_AMD64_RSI 
CV_AMD64_RDI 
CV_AMD64_RBP 
CV_AMD64_RSP 
CV_AMD64_R8 
CV_AMD64_R9 
CV_AMD64_R10 
CV_AMD64_R11 
CV_AMD64_R12 
CV_AMD64_R13 
CV_AMD64_R14 
CV_AMD64_R15 
CV_ARM64_NOREG 
CV_ARM64_X0 
CV_ARM64_SP 
CV_ARM64_PC 
CV_ARM64_PSTATE 
CV_ALLREG_ERR 
CV_ALLREG_TEB 
CV_ALLREG_TIMER 
CV_ALLREG_EFAD1 
CV_ALLREG_EFAD2 
CV_ALLREG_EFAD3 
CV_ALLREG_VFRAME 
CV_ALLREG_HANDLE 
CV_ALLREG_PARAMS 
CV_ALLREG_LOCALS 
CV_ALLREG_TID 
CV_ALLREG_ENV 
CV_ALLREG_CMDLN 
CV_REG_NONE 
CV_REG_AL 
CV_REG_CL 
CV_REG_DL 
CV_REG_BL 
CV_REG_AH 
CV_REG_CH 
CV_REG_DH 
CV_REG_BH 
CV_REG_AX 
CV_REG_CX 
CV_REG_DX 
CV_REG_BX 
CV_REG_SP 
CV_REG_BP 
CV_REG_SI 
CV_REG_DI 
CV_REG_EAX 
CV_REG_ECX 
CV_REG_EDX 
CV_REG_EBX 
CV_REG_ESP 
CV_REG_EBP 
CV_REG_ESI 
CV_REG_EDI 
CV_REG_ES 
CV_REG_CS 
CV_REG_SS 
CV_REG_DS 
CV_REG_FS 
CV_REG_GS 
CV_REG_IP 
CV_REG_FLAGS 
CV_REG_EIP 
CV_REG_EFLAGS 
CV_REG_TEMP 
CV_REG_TEMPH 
CV_REG_QUOTE 
CV_REG_PCDR3 
CV_REG_CR0 
CV_REG_DR0 
CV_REG_GDTR 
CV_REG_GDTL 
CV_REG_IDTR 
CV_REG_IDTL 
CV_REG_LDTR 
CV_REG_TR 
CV_REG_PSEUDO1 
CV_REG_ST0 
CV_REG_CTRL 
CV_REG_STAT 
CV_REG_TAG 
CV_REG_FPIP 
CV_REG_FPCS 
CV_REG_FPDO 
CV_REG_FPDS 
CV_REG_ISEM 
CV_REG_FPEIP 
CV_REG_FPEDO 
CV_REG_MM0 
CV_REG_XMM0 
CV_REG_XMM00 
CV_REG_XMM0L 
CV_REG_XMM0H 
CV_REG_MXCSR 
CV_REG_EDXEAX 
CV_REG_EMM0L 
CV_REG_EMM0H 
CV_REG_MM00 
CV_REG_MM01 
CV_REG_MM10 
CV_REG_MM11 
CV_REG_MM20 
CV_REG_MM21 
CV_REG_MM30 
CV_REG_MM31 
CV_REG_MM40 
CV_REG_MM41 
CV_REG_MM50 
CV_REG_MM51 
CV_REG_MM60 
CV_REG_MM61 
CV_REG_MM70 
CV_REG_MM71 
CV_REG_YMM0 
CV_REG_YMM0H 
CV_REG_YMM0I0 
CV_REG_YMM1I0 
CV_REG_YMM2I0 
CV_REG_YMM3I0 
CV_REG_YMM4I0 
CV_REG_YMM5I0 
CV_REG_YMM6I0 
CV_REG_YMM7I0 
CV_REG_YMM0F0 
CV_REG_YMM1F0 
CV_REG_YMM2F0 
CV_REG_YMM3F0 
CV_REG_YMM4F0 
CV_REG_YMM5F0 
CV_REG_YMM6F0 
CV_REG_YMM7F0 
CV_REG_YMM0D0 
CV_REG_YMM1D0 
CV_REG_YMM2D0 
CV_REG_YMM3D0 
CV_REG_YMM4D0 
CV_REG_YMM5D0 
CV_REG_YMM6D0 
CV_REG_YMM7D0 
CV_R68_D0 
CV_R68_A0 
CV_R68_CCR 
CV_R68_SR 
CV_R68_USP 
CV_R68_MSP 
CV_R68_SFC 
CV_R68_DFC 
CV_R68_CACR 
CV_R68_VBR 
CV_R68_CAAR 
CV_R68_ISP 
CV_R68_PC 
CV_R68_FPCR 
CV_R68_FPSR 
CV_R68_FPIAR 
CV_R68_FP0 
CV_R68_MMUSR030 
CV_R68_MMUSR 
CV_R68_URP 
CV_R68_DTT0 
CV_R68_DTT1 
CV_R68_ITT0 
CV_R68_ITT1 
CV_R68_PSR 
CV_R68_PCSR 
CV_R68_VAL 
CV_R68_CRP 
CV_R68_SRP 
CV_R68_DRP 
CV_R68_TC 
CV_R68_AC 
CV_R68_SCC 
CV_R68_CAL 
CV_R68_TT0 
CV_R68_TT1 
CV_R68_BAD0 
CV_R68_BAC0 
CV_M4_NOREG 
CV_M4_IntZERO 
CV_M4_IntAT 
CV_M4_IntV0 
CV_M4_IntV1 
CV_M4_IntA0 
CV_M4_IntT0 
CV_M4_IntS0 
CV_M4_IntT8 
CV_M4_IntT9 
CV_M4_IntKT0 
CV_M4_IntKT1 
CV_M4_IntGP 
CV_M4_IntSP 
CV_M4_IntS8 
CV_M4_IntRA 
CV_M4_IntLO 
CV_M4_IntHI 
CV_M4_Fir 
CV_M4_Psr 
CV_M4_FltF0 
CV_M4_FltFsr 
CV_ALPHA_NOREG 
CV_ALPHA_FltF0 
CV_ALPHA_IntV0 
CV_ALPHA_IntT0 
CV_ALPHA_IntS0 
CV_ALPHA_IntFP 
CV_ALPHA_IntA0 
CV_ALPHA_IntT8 
CV_ALPHA_IntT9 
CV_ALPHA_IntT10 
CV_ALPHA_IntT11 
CV_ALPHA_IntRA 
CV_ALPHA_IntT12 
CV_ALPHA_IntAT 
CV_ALPHA_IntGP 
CV_ALPHA_IntSP 
CV_ALPHA_IntZERO 
CV_ALPHA_Fpcr 
CV_ALPHA_Fir 
CV_ALPHA_Psr 
CV_ALPHA_FltFsr 
CV_ALPHA_SoftFpcr 
CV_PPC_GPR0 
CV_PPC_CR 
CV_PPC_CR0 
CV_PPC_FPR0 
CV_PPC_FPSCR 
CV_PPC_MSR 
CV_PPC_SR0 
CV_PPC_PC 
CV_PPC_MQ 
CV_PPC_XER 
CV_PPC_RTCU 
CV_PPC_RTCL 
CV_PPC_LR 
CV_PPC_CTR 
CV_PPC_COMPARE 
CV_PPC_COUNT 
CV_PPC_DSISR 
CV_PPC_DAR 
CV_PPC_DEC 
CV_PPC_SDR1 
CV_PPC_SRR0 
CV_PPC_SRR1 
CV_PPC_SPRG0 
CV_PPC_ASR 
CV_PPC_EAR 
CV_PPC_PVR 
CV_PPC_BAT0U 
CV_PPC_BAT0L 
CV_PPC_BAT1U 
CV_PPC_BAT1L 
CV_PPC_BAT2U 
CV_PPC_BAT2L 
CV_PPC_BAT3U 
CV_PPC_BAT3L 
CV_PPC_DBAT0U 
CV_PPC_DBAT0L 
CV_PPC_DBAT1U 
CV_PPC_DBAT1L 
CV_PPC_DBAT2U 
CV_PPC_DBAT2L 
CV_PPC_DBAT3U 
CV_PPC_DBAT3L 
CV_PPC_PMR0 
CV_PPC_DMISS 
CV_PPC_DCMP 
CV_PPC_HASH1 
CV_PPC_HASH2 
CV_PPC_IMISS 
CV_PPC_ICMP 
CV_PPC_RPA 
CV_PPC_HID0 
CV_JAVA_PC 
CV_SH3_NOREG 
CV_SH3_IntR0 
CV_SH3_IntFp 
CV_SH3_IntSp 
CV_SH3_Gbr 
CV_SH3_Pr 
CV_SH3_Mach 
CV_SH3_Macl 
CV_SH3_Pc 
CV_SH3_Sr 
CV_SH3_BarA 
CV_SH3_BasrA 
CV_SH3_BamrA 
CV_SH3_BbrA 
CV_SH3_BarB 
CV_SH3_BasrB 
CV_SH3_BamrB 
CV_SH3_BbrB 
CV_SH3_BdrB 
CV_SH3_BdmrB 
CV_SH3_Brcr 
CV_SH_Fpscr 
CV_SH_Fpul 
CV_SH_FpR0 
CV_SH_XFpR0 
CV_ARM_NOREG 
CV_ARM_R0 
CV_ARM_SP 
CV_ARM_LR 
CV_ARM_PC 
CV_ARM_CPSR 
CV_ARM_ACC0 
CV_ARM_FPSCR 
CV_ARM_FPEXC 
CV_ARM_FS0 
CV_ARM_FPEXTRA0 
CV_ARM_WR0 
CV_ARM_WCID 
CV_ARM_WCON 
CV_ARM_WCSSF 
CV_ARM_WCASF 
CV_ARM_WC4 
CV_ARM_WC5 
CV_ARM_WC6 
CV_ARM_WC7 
CV_ARM_WCGR0 
CV_ARM_WC12 
CV_ARM_WC13 
CV_ARM_WC14 
CV_ARM_WC15 
CV_ARM_FS32 
CV_ARM_ND0 
CV_ARM_NQ0 
CV_ARM64_NOREG 
CV_ARM64_W0 
CV_ARM64_WZR 
CV_ARM64_PC 
CV_ARM64_PSTATE 
CV_ARM64_X0 
CV_ARM64_IP0 
CV_ARM64_IP1 
CV_ARM64_FP 
CV_ARM64_LR 
CV_ARM64_SP 
CV_ARM64_ZR 
CV_ARM64_NZCV 
CV_ARM64_S0 
CV_ARM64_D0 
CV_ARM64_Q0 
CV_ARM64_FPSR 
CV_IA64_NOREG 
CV_IA64_Br0 
CV_IA64_P0 
CV_IA64_Preds 
CV_IA64_IntH0 
CV_IA64_Ip 
CV_IA64_Umask 
CV_IA64_Cfm 
CV_IA64_Psr 
CV_IA64_Nats 
CV_IA64_Nats2 
CV_IA64_Nats3 
CV_IA64_IntR0 
CV_IA64_FltF0 
CV_TRI_NOREG 
CV_TRI_D0 
CV_TRI_A0 
CV_TRI_E0 
CV_TRI_E2 
CV_TRI_E4 
CV_TRI_E6 
CV_TRI_E8 
CV_TRI_E10 
CV_TRI_E12 
CV_TRI_E14 
CV_TRI_EA0 
CV_TRI_EA2 
CV_TRI_EA4 
CV_TRI_EA6 
CV_TRI_EA8 
CV_TRI_EA10 
CV_TRI_EA12 
CV_TRI_EA14 
CV_TRI_PSW 
CV_TRI_PCXI 
CV_TRI_PC 
CV_TRI_FCX 
CV_TRI_LCX 
CV_TRI_ISP 
CV_TRI_ICR 
CV_TRI_BIV 
CV_TRI_BTV 
CV_TRI_SYSCON 
CV_TRI_DPRx_0 
CV_TRI_CPRx_0 
CV_TRI_DPMx_0 
CV_TRI_CPMx_0 
CV_TRI_DBGSSR 
CV_TRI_EXEVT 
CV_TRI_SWEVT 
CV_TRI_CREVT 
CV_TRI_TRnEVT 
CV_TRI_MMUCON 
CV_TRI_ASI 
CV_TRI_TVA 
CV_TRI_TPA 
CV_TRI_TPX 
CV_TRI_TFA 
CV_AM33_NOREG 
CV_AM33_E0 
CV_AM33_A0 
CV_AM33_D0 
CV_AM33_FS0 
CV_AM33_SP 
CV_AM33_PC 
CV_AM33_MDR 
CV_AM33_MDRQ 
CV_AM33_MCRH 
CV_AM33_MCRL 
CV_AM33_MCVF 
CV_AM33_EPSW 
CV_AM33_FPCR 
CV_AM33_LIR 
CV_AM33_LAR 
CV_M32R_NOREG 
CV_M32R_R0 
CV_M32R_R12 
CV_M32R_R13 
CV_M32R_R14 
CV_M32R_R15 
CV_M32R_PSW 
CV_M32R_CBR 
CV_M32R_SPI 
CV_M32R_SPU 
CV_M32R_SPO 
CV_M32R_BPC 
CV_M32R_ACHI 
CV_M32R_ACLO 
CV_M32R_PC 
CV_AMD64_NONE 
CV_AMD64_AL 
CV_AMD64_CL 
CV_AMD64_DL 
CV_AMD64_BL 
CV_AMD64_AH 
CV_AMD64_CH 
CV_AMD64_DH 
CV_AMD64_BH 
CV_AMD64_AX 
CV_AMD64_CX 
CV_AMD64_DX 
CV_AMD64_BX 
CV_AMD64_SP 
CV_AMD64_BP 
CV_AMD64_SI 
CV_AMD64_DI 
CV_AMD64_EAX 
CV_AMD64_ECX 
CV_AMD64_EDX 
CV_AMD64_EBX 
CV_AMD64_ESP 
CV_AMD64_EBP 
CV_AMD64_ESI 
CV_AMD64_EDI 
CV_AMD64_ES 
CV_AMD64_CS 
CV_AMD64_SS 
CV_AMD64_DS 
CV_AMD64_FS 
CV_AMD64_GS 
CV_AMD64_FLAGS 
CV_AMD64_RIP 
CV_AMD64_EFLAGS 
CV_AMD64_TEMP 
CV_AMD64_TEMPH 
CV_AMD64_QUOTE 
CV_AMD64_PCDR3 
CV_AMD64_CR0 
CV_AMD64_DR0 
CV_AMD64_GDTR 
CV_AMD64_GDTL 
CV_AMD64_IDTR 
CV_AMD64_IDTL 
CV_AMD64_LDTR 
CV_AMD64_TR 
CV_AMD64_PSEUDO1 
CV_AMD64_ST0 
CV_AMD64_CTRL 
CV_AMD64_STAT 
CV_AMD64_TAG 
CV_AMD64_FPIP 
CV_AMD64_FPCS 
CV_AMD64_FPDO 
CV_AMD64_FPDS 
CV_AMD64_ISEM 
CV_AMD64_FPEIP 
CV_AMD64_FPEDO 
CV_AMD64_MM0 
CV_AMD64_XMM0 
CV_AMD64_XMM00 
CV_AMD64_XMM0L 
CV_AMD64_XMM0H 
CV_AMD64_MXCSR 
CV_AMD64_EDXEAX 
CV_AMD64_EMM0L 
CV_AMD64_EMM0H 
CV_AMD64_MM00 
CV_AMD64_MM01 
CV_AMD64_MM10 
CV_AMD64_MM11 
CV_AMD64_MM20 
CV_AMD64_MM21 
CV_AMD64_MM30 
CV_AMD64_MM31 
CV_AMD64_MM40 
CV_AMD64_MM41 
CV_AMD64_MM50 
CV_AMD64_MM51 
CV_AMD64_MM60 
CV_AMD64_MM61 
CV_AMD64_MM70 
CV_AMD64_MM71 
CV_AMD64_XMM8 
CV_AMD64_RAX 
CV_AMD64_RBX 
CV_AMD64_RCX 
CV_AMD64_RDX 
CV_AMD64_RSI 
CV_AMD64_RDI 
CV_AMD64_RBP 
CV_AMD64_RSP 
CV_AMD64_R8 
CV_AMD64_R9 
CV_AMD64_R10 
CV_AMD64_R11 
CV_AMD64_R12 
CV_AMD64_R13 
CV_AMD64_R14 
CV_AMD64_R15 

Definition at line 125 of file cvconst.h.

126{
127 /* those values are common to all supported CPUs (and CPU independent) */
128 CV_ALLREG_ERR = 30000,
129 CV_ALLREG_TEB = 30001,
130 CV_ALLREG_TIMER = 30002,
131 CV_ALLREG_EFAD1 = 30003,
132 CV_ALLREG_EFAD2 = 30004,
133 CV_ALLREG_EFAD3 = 30005,
134 CV_ALLREG_VFRAME = 30006,
135 CV_ALLREG_HANDLE = 30007,
136 CV_ALLREG_PARAMS = 30008,
137 CV_ALLREG_LOCALS = 30009,
138 CV_ALLREG_TID = 30010,
139 CV_ALLREG_ENV = 30011,
140 CV_ALLREG_CMDLN = 30012,
141
142 /* Intel x86 CPU */
143 CV_REG_NONE = 0,
144 CV_REG_AL = 1,
145 CV_REG_CL = 2,
146 CV_REG_DL = 3,
147 CV_REG_BL = 4,
148 CV_REG_AH = 5,
149 CV_REG_CH = 6,
150 CV_REG_DH = 7,
151 CV_REG_BH = 8,
152 CV_REG_AX = 9,
153 CV_REG_CX = 10,
154 CV_REG_DX = 11,
155 CV_REG_BX = 12,
156 CV_REG_SP = 13,
157 CV_REG_BP = 14,
158 CV_REG_SI = 15,
159 CV_REG_DI = 16,
160 CV_REG_EAX = 17,
161 CV_REG_ECX = 18,
162 CV_REG_EDX = 19,
163 CV_REG_EBX = 20,
164 CV_REG_ESP = 21,
165 CV_REG_EBP = 22,
166 CV_REG_ESI = 23,
167 CV_REG_EDI = 24,
168 CV_REG_ES = 25,
169 CV_REG_CS = 26,
170 CV_REG_SS = 27,
171 CV_REG_DS = 28,
172 CV_REG_FS = 29,
173 CV_REG_GS = 30,
174 CV_REG_IP = 31,
175 CV_REG_FLAGS = 32,
176 CV_REG_EIP = 33,
177 CV_REG_EFLAGS = 34,
178
179 /* <pcode> */
180 CV_REG_TEMP = 40,
181 CV_REG_TEMPH = 41,
182 CV_REG_QUOTE = 42,
183 CV_REG_PCDR3 = 43, /* this includes PCDR4 to PCDR7 */
184 CV_REG_CR0 = 80, /* this includes CR1 to CR4 */
185 CV_REG_DR0 = 90, /* this includes DR1 to DR7 */
186 /* </pcode> */
187
188 CV_REG_GDTR = 110,
189 CV_REG_GDTL = 111,
190 CV_REG_IDTR = 112,
191 CV_REG_IDTL = 113,
192 CV_REG_LDTR = 114,
193 CV_REG_TR = 115,
194
195 CV_REG_PSEUDO1 = 116, /* this includes Pseudo02 to Pseudo09 */
196 CV_REG_ST0 = 128, /* this includes ST1 to ST7 */
197 CV_REG_CTRL = 136,
198 CV_REG_STAT = 137,
199 CV_REG_TAG = 138,
200 CV_REG_FPIP = 139,
201 CV_REG_FPCS = 140,
202 CV_REG_FPDO = 141,
203 CV_REG_FPDS = 142,
204 CV_REG_ISEM = 143,
205 CV_REG_FPEIP = 144,
206 CV_REG_FPEDO = 145,
207 CV_REG_MM0 = 146, /* this includes MM1 to MM7 */
208 CV_REG_XMM0 = 154, /* this includes XMM1 to XMM7 */
209 CV_REG_XMM00 = 162,
210 CV_REG_XMM0L = 194, /* this includes XMM1L to XMM7L */
211 CV_REG_XMM0H = 202, /* this includes XMM1H to XMM7H */
212 CV_REG_MXCSR = 211,
213 CV_REG_EDXEAX = 212,
214 CV_REG_EMM0L = 220,
215 CV_REG_EMM0H = 228,
216 CV_REG_MM00 = 236,
217 CV_REG_MM01 = 237,
218 CV_REG_MM10 = 238,
219 CV_REG_MM11 = 239,
220 CV_REG_MM20 = 240,
221 CV_REG_MM21 = 241,
222 CV_REG_MM30 = 242,
223 CV_REG_MM31 = 243,
224 CV_REG_MM40 = 244,
225 CV_REG_MM41 = 245,
226 CV_REG_MM50 = 246,
227 CV_REG_MM51 = 247,
228 CV_REG_MM60 = 248,
229 CV_REG_MM61 = 249,
230 CV_REG_MM70 = 250,
231 CV_REG_MM71 = 251,
232
233 CV_REG_YMM0 = 252, /* this includes YMM1 to YMM7 */
234 CV_REG_YMM0H = 260, /* this includes YMM1H to YMM7H */
235 CV_REG_YMM0I0 = 268, /* this includes YMM0I1 to YMM0I3 */
236 CV_REG_YMM1I0 = 272, /* this includes YMM1I1 to YMM1I3 */
237 CV_REG_YMM2I0 = 276, /* this includes YMM2I1 to YMM2I3 */
238 CV_REG_YMM3I0 = 280, /* this includes YMM3I1 to YMM3I3 */
239 CV_REG_YMM4I0 = 284, /* this includes YMM4I1 to YMM4I3 */
240 CV_REG_YMM5I0 = 288, /* this includes YMM5I1 to YMM5I3 */
241 CV_REG_YMM6I0 = 292, /* this includes YMM6I1 to YMM6I3 */
242 CV_REG_YMM7I0 = 296, /* this includes YMM7I1 to YMM7I3 */
243 CV_REG_YMM0F0 = 300, /* this includes YMM0F1 to YMM0F7 */
244 CV_REG_YMM1F0 = 308, /* this includes YMM1F1 to YMM1F7 */
245 CV_REG_YMM2F0 = 316, /* this includes YMM2F1 to YMM2F7 */
246 CV_REG_YMM3F0 = 324, /* this includes YMM3F1 to YMM3F7 */
247 CV_REG_YMM4F0 = 332, /* this includes YMM4F1 to YMM4F7 */
248 CV_REG_YMM5F0 = 340, /* this includes YMM5F1 to YMM5F7 */
249 CV_REG_YMM6F0 = 348, /* this includes YMM6F1 to YMM6F7 */
250 CV_REG_YMM7F0 = 356, /* this includes YMM7F1 to YMM7F7 */
251 CV_REG_YMM0D0 = 364, /* this includes YMM0D1 to YMM0D3 */
252 CV_REG_YMM1D0 = 368, /* this includes YMM1D1 to YMM1D3 */
253 CV_REG_YMM2D0 = 372, /* this includes YMM2D1 to YMM2D3 */
254 CV_REG_YMM3D0 = 376, /* this includes YMM3D1 to YMM3D3 */
255 CV_REG_YMM4D0 = 380, /* this includes YMM4D1 to YMM4D3 */
256 CV_REG_YMM5D0 = 384, /* this includes YMM5D1 to YMM5D3 */
257 CV_REG_YMM6D0 = 388, /* this includes YMM6D1 to YMM6D3 */
258 CV_REG_YMM7D0 = 392, /* this includes YMM7D1 to YMM7D3 */
259
260 /* Motorola 68K CPU */
261 CV_R68_D0 = 0, /* this includes D1 to D7 too */
262 CV_R68_A0 = 8, /* this includes A1 to A7 too */
263 CV_R68_CCR = 16,
264 CV_R68_SR = 17,
265 CV_R68_USP = 18,
266 CV_R68_MSP = 19,
267 CV_R68_SFC = 20,
268 CV_R68_DFC = 21,
269 CV_R68_CACR = 22,
270 CV_R68_VBR = 23,
271 CV_R68_CAAR = 24,
272 CV_R68_ISP = 25,
273 CV_R68_PC = 26,
274 CV_R68_FPCR = 28,
275 CV_R68_FPSR = 29,
276 CV_R68_FPIAR = 30,
277 CV_R68_FP0 = 32, /* this includes FP1 to FP7 */
278 CV_R68_MMUSR030 = 41,
279 CV_R68_MMUSR = 42,
280 CV_R68_URP = 43,
281 CV_R68_DTT0 = 44,
282 CV_R68_DTT1 = 45,
283 CV_R68_ITT0 = 46,
284 CV_R68_ITT1 = 47,
285 CV_R68_PSR = 51,
286 CV_R68_PCSR = 52,
287 CV_R68_VAL = 53,
288 CV_R68_CRP = 54,
289 CV_R68_SRP = 55,
290 CV_R68_DRP = 56,
291 CV_R68_TC = 57,
292 CV_R68_AC = 58,
293 CV_R68_SCC = 59,
294 CV_R68_CAL = 60,
295 CV_R68_TT0 = 61,
296 CV_R68_TT1 = 62,
297 CV_R68_BAD0 = 64, /* this includes BAD1 to BAD7 */
298 CV_R68_BAC0 = 72, /* this includes BAC1 to BAC7 */
299
300 /* MIPS 4000 CPU */
302 CV_M4_IntZERO = 10,
303 CV_M4_IntAT = 11,
304 CV_M4_IntV0 = 12,
305 CV_M4_IntV1 = 13,
306 CV_M4_IntA0 = 14, /* this includes IntA1 to IntA3 */
307 CV_M4_IntT0 = 18, /* this includes IntT1 to IntT7 */
308 CV_M4_IntS0 = 26, /* this includes IntS1 to IntS7 */
309 CV_M4_IntT8 = 34,
310 CV_M4_IntT9 = 35,
311 CV_M4_IntKT0 = 36,
312 CV_M4_IntKT1 = 37,
313 CV_M4_IntGP = 38,
314 CV_M4_IntSP = 39,
315 CV_M4_IntS8 = 40,
316 CV_M4_IntRA = 41,
317 CV_M4_IntLO = 42,
318 CV_M4_IntHI = 43,
319 CV_M4_Fir = 50,
320 CV_M4_Psr = 51,
321 CV_M4_FltF0 = 60, /* this includes FltF1 to Flt31 */
322 CV_M4_FltFsr = 92,
323
324 /* Alpha AXP CPU */
326 CV_ALPHA_FltF0 = 10, /* this includes FltF1 to FltF31 */
327 CV_ALPHA_IntV0 = 42,
328 CV_ALPHA_IntT0 = 43, /* this includes T1 to T7 */
329 CV_ALPHA_IntS0 = 51, /* this includes S1 to S5 */
330 CV_ALPHA_IntFP = 57,
331 CV_ALPHA_IntA0 = 58, /* this includes A1 to A5 */
332 CV_ALPHA_IntT8 = 64,
333 CV_ALPHA_IntT9 = 65,
334 CV_ALPHA_IntT10 = 66,
335 CV_ALPHA_IntT11 = 67,
336 CV_ALPHA_IntRA = 68,
337 CV_ALPHA_IntT12 = 69,
338 CV_ALPHA_IntAT = 70,
339 CV_ALPHA_IntGP = 71,
340 CV_ALPHA_IntSP = 72,
341 CV_ALPHA_IntZERO = 73,
342 CV_ALPHA_Fpcr = 74,
343 CV_ALPHA_Fir = 75,
344 CV_ALPHA_Psr = 76,
345 CV_ALPHA_FltFsr = 77,
347
348 /* Motorola & IBM PowerPC CPU */
349 CV_PPC_GPR0 = 1, /* this includes GPR1 to GPR31 */
350 CV_PPC_CR = 33,
351 CV_PPC_CR0 = 34, /* this includes CR1 to CR7 */
352 CV_PPC_FPR0 = 42, /* this includes FPR1 to FPR31 */
353
354 CV_PPC_FPSCR = 74,
355 CV_PPC_MSR = 75,
356 CV_PPC_SR0 = 76, /* this includes SR1 to SR15 */
357 CV_PPC_PC = 99,
358 CV_PPC_MQ = 100,
359 CV_PPC_XER = 101,
360 CV_PPC_RTCU = 104,
361 CV_PPC_RTCL = 105,
362 CV_PPC_LR = 108,
363 CV_PPC_CTR = 109,
364 CV_PPC_COMPARE = 110,
365 CV_PPC_COUNT = 111,
366 CV_PPC_DSISR = 118,
367 CV_PPC_DAR = 119,
368 CV_PPC_DEC = 122,
369 CV_PPC_SDR1 = 125,
370 CV_PPC_SRR0 = 126,
371 CV_PPC_SRR1 = 127,
372 CV_PPC_SPRG0 = 372, /* this includes SPRG1 to SPRG3 */
373 CV_PPC_ASR = 280,
374 CV_PPC_EAR = 382,
375 CV_PPC_PVR = 287,
376 CV_PPC_BAT0U = 628,
377 CV_PPC_BAT0L = 629,
378 CV_PPC_BAT1U = 630,
379 CV_PPC_BAT1L = 631,
380 CV_PPC_BAT2U = 632,
381 CV_PPC_BAT2L = 633,
382 CV_PPC_BAT3U = 634,
383 CV_PPC_BAT3L = 635,
384 CV_PPC_DBAT0U = 636,
385 CV_PPC_DBAT0L = 637,
386 CV_PPC_DBAT1U = 638,
387 CV_PPC_DBAT1L = 639,
388 CV_PPC_DBAT2U = 640,
389 CV_PPC_DBAT2L = 641,
390 CV_PPC_DBAT3U = 642,
391 CV_PPC_DBAT3L = 643,
392 CV_PPC_PMR0 = 1044, /* this includes PMR1 to PMR15 */
393 CV_PPC_DMISS = 1076,
394 CV_PPC_DCMP = 1077,
395 CV_PPC_HASH1 = 1078,
396 CV_PPC_HASH2 = 1079,
397 CV_PPC_IMISS = 1080,
398 CV_PPC_ICMP = 1081,
399 CV_PPC_RPA = 1082,
400 CV_PPC_HID0 = 1108, /* this includes HID1 to HID15 */
401
402 /* Java */
403 CV_JAVA_PC = 1,
404
405 /* Hitachi SH3 CPU */
407 CV_SH3_IntR0 = 10, /* this include R1 to R13 */
408 CV_SH3_IntFp = 24,
409 CV_SH3_IntSp = 25,
410 CV_SH3_Gbr = 38,
411 CV_SH3_Pr = 39,
412 CV_SH3_Mach = 40,
413 CV_SH3_Macl = 41,
414 CV_SH3_Pc = 50,
415 CV_SH3_Sr = 51,
416 CV_SH3_BarA = 60,
417 CV_SH3_BasrA = 61,
418 CV_SH3_BamrA = 62,
419 CV_SH3_BbrA = 63,
420 CV_SH3_BarB = 64,
421 CV_SH3_BasrB = 65,
422 CV_SH3_BamrB = 66,
423 CV_SH3_BbrB = 67,
424 CV_SH3_BdrB = 68,
425 CV_SH3_BdmrB = 69,
426 CV_SH3_Brcr = 70,
427 CV_SH_Fpscr = 75,
428 CV_SH_Fpul = 76,
429 CV_SH_FpR0 = 80, /* this includes FpR1 to FpR15 */
430 CV_SH_XFpR0 = 96, /* this includes XFpR1 to XXFpR15 */
431
432 /* ARM CPU */
434 CV_ARM_R0 = 10, /* this includes R1 to R12 */
435 CV_ARM_SP = 23,
436 CV_ARM_LR = 24,
437 CV_ARM_PC = 25,
438 CV_ARM_CPSR = 26,
439 CV_ARM_ACC0 = 27,
440 CV_ARM_FPSCR = 40,
441 CV_ARM_FPEXC = 41,
442 CV_ARM_FS0 = 50, /* this includes FS1 to FS31 */
443 CV_ARM_FPEXTRA0 = 90, /* this includes FPEXTRA1 to FPEXTRA7 */
444 CV_ARM_WR0 = 128, /* this includes WR1 to WR15 */
445 CV_ARM_WCID = 144,
446 CV_ARM_WCON = 145,
447 CV_ARM_WCSSF = 146,
448 CV_ARM_WCASF = 147,
449 CV_ARM_WC4 = 148,
450 CV_ARM_WC5 = 149,
451 CV_ARM_WC6 = 150,
452 CV_ARM_WC7 = 151,
453 CV_ARM_WCGR0 = 152, /* this includes WCGR1 to WCGR3 */
454 CV_ARM_WC12 = 156,
455 CV_ARM_WC13 = 157,
456 CV_ARM_WC14 = 158,
457 CV_ARM_WC15 = 159,
458 CV_ARM_FS32 = 200, /* this includes FS33 to FS63 */
459 CV_ARM_ND0 = 300, /* this includes ND1 to ND31 */
460 CV_ARM_NQ0 = 400, /* this includes NQ1 to NQ15 */
461
462 /* ARM64 CPU */
464 CV_ARM64_W0 = 10, /* this includes W0 to W30 */
465 CV_ARM64_WZR = 41,
466 CV_ARM64_PC = 42, /* Wine extension */
467 CV_ARM64_PSTATE = 43, /* Wine extension */
468 CV_ARM64_X0 = 50, /* this includes X0 to X28 */
469 CV_ARM64_IP0 = 66, /* Same as X16 */
470 CV_ARM64_IP1 = 67, /* Same as X17 */
471 CV_ARM64_FP = 79,
472 CV_ARM64_LR = 80,
473 CV_ARM64_SP = 81,
474 CV_ARM64_ZR = 82,
475 CV_ARM64_NZCV = 90,
476 CV_ARM64_S0 = 100, /* this includes S0 to S31 */
477 CV_ARM64_D0 = 140, /* this includes D0 to D31 */
478 CV_ARM64_Q0 = 180, /* this includes Q0 to Q31 */
479 CV_ARM64_FPSR = 220,
480
481 /* Intel IA64 CPU */
483 CV_IA64_Br0 = 512, /* this includes Br1 to Br7 */
484 CV_IA64_P0 = 704, /* this includes P1 to P63 */
485 CV_IA64_Preds = 768,
486 CV_IA64_IntH0 = 832, /* this includes H1 to H15 */
487 CV_IA64_Ip = 1016,
488 CV_IA64_Umask = 1017,
489 CV_IA64_Cfm = 1018,
490 CV_IA64_Psr = 1019,
491 CV_IA64_Nats = 1020,
492 CV_IA64_Nats2 = 1021,
493 CV_IA64_Nats3 = 1022,
494 CV_IA64_IntR0 = 1024, /* this includes R1 to R127 */
495 CV_IA64_FltF0 = 2048, /* this includes FltF1 to FltF127 */
496 /* some IA64 registers missing */
497
498 /* TriCore CPU */
500 CV_TRI_D0 = 10, /* includes D1 to D15 */
501 CV_TRI_A0 = 26, /* includes A1 to A15 */
502 CV_TRI_E0 = 42,
503 CV_TRI_E2 = 43,
504 CV_TRI_E4 = 44,
505 CV_TRI_E6 = 45,
506 CV_TRI_E8 = 46,
507 CV_TRI_E10 = 47,
508 CV_TRI_E12 = 48,
509 CV_TRI_E14 = 49,
510 CV_TRI_EA0 = 50,
511 CV_TRI_EA2 = 51,
512 CV_TRI_EA4 = 52,
513 CV_TRI_EA6 = 53,
514 CV_TRI_EA8 = 54,
515 CV_TRI_EA10 = 55,
516 CV_TRI_EA12 = 56,
517 CV_TRI_EA14 = 57,
518 CV_TRI_PSW = 58,
519 CV_TRI_PCXI = 59,
520 CV_TRI_PC = 60,
521 CV_TRI_FCX = 61,
522 CV_TRI_LCX = 62,
523 CV_TRI_ISP = 63,
524 CV_TRI_ICR = 64,
525 CV_TRI_BIV = 65,
526 CV_TRI_BTV = 66,
527 CV_TRI_SYSCON = 67,
528 CV_TRI_DPRx_0 = 68, /* includes DPRx_1 to DPRx_3 */
529 CV_TRI_CPRx_0 = 68, /* includes CPRx_1 to CPRx_3 */
530 CV_TRI_DPMx_0 = 68, /* includes DPMx_1 to DPMx_3 */
531 CV_TRI_CPMx_0 = 68, /* includes CPMx_1 to CPMx_3 */
532 CV_TRI_DBGSSR = 72,
533 CV_TRI_EXEVT = 73,
534 CV_TRI_SWEVT = 74,
535 CV_TRI_CREVT = 75,
536 CV_TRI_TRnEVT = 76,
537 CV_TRI_MMUCON = 77,
538 CV_TRI_ASI = 78,
539 CV_TRI_TVA = 79,
540 CV_TRI_TPA = 80,
541 CV_TRI_TPX = 81,
542 CV_TRI_TFA = 82,
543
544 /* AM33 (and the likes) CPU */
546 CV_AM33_E0 = 10, /* this includes E1 to E7 */
547 CV_AM33_A0 = 20, /* this includes A1 to A3 */
548 CV_AM33_D0 = 30, /* this includes D1 to D3 */
549 CV_AM33_FS0 = 40, /* this includes FS1 to FS31 */
550 CV_AM33_SP = 80,
551 CV_AM33_PC = 81,
552 CV_AM33_MDR = 82,
553 CV_AM33_MDRQ = 83,
554 CV_AM33_MCRH = 84,
555 CV_AM33_MCRL = 85,
556 CV_AM33_MCVF = 86,
557 CV_AM33_EPSW = 87,
558 CV_AM33_FPCR = 88,
559 CV_AM33_LIR = 89,
560 CV_AM33_LAR = 90,
561
562 /* Mitsubishi M32R CPU */
564 CV_M32R_R0 = 10, /* this includes R1 to R11 */
565 CV_M32R_R12 = 22,
566 CV_M32R_R13 = 23,
567 CV_M32R_R14 = 24,
568 CV_M32R_R15 = 25,
569 CV_M32R_PSW = 26,
570 CV_M32R_CBR = 27,
571 CV_M32R_SPI = 28,
572 CV_M32R_SPU = 29,
573 CV_M32R_SPO = 30,
574 CV_M32R_BPC = 31,
575 CV_M32R_ACHI = 32,
576 CV_M32R_ACLO = 33,
577 CV_M32R_PC = 34,
578
579 /* AMD/Intel x86_64 CPU */
614
615 /* <pcode> */
619 CV_AMD64_PCDR3 = CV_REG_PCDR3, /* this includes PCDR4 to PCDR7 */
620 CV_AMD64_CR0 = CV_REG_CR0, /* this includes CR1 to CR4 */
621 CV_AMD64_DR0 = CV_REG_DR0, /* this includes DR1 to DR7 */
622 /* </pcode> */
623
630
631 CV_AMD64_PSEUDO1 = CV_REG_PSEUDO1, /* this includes Pseudo02 to Pseudo09 */
632 CV_AMD64_ST0 = CV_REG_ST0, /* this includes ST1 to ST7 */
643 CV_AMD64_MM0 = CV_REG_MM0, /* this includes MM1 to MM7 */
644 CV_AMD64_XMM0 = CV_REG_XMM0, /* this includes XMM1 to XMM7 */
646 CV_AMD64_XMM0L = CV_REG_XMM0L, /* this includes XMM1L to XMM7L */
647 CV_AMD64_XMM0H = CV_REG_XMM0H, /* this includes XMM1H to XMM7H */
668
669 CV_AMD64_XMM8 = 252, /* this includes XMM9 to XMM15 */
670
671 CV_AMD64_RAX = 328,
672 CV_AMD64_RBX = 329,
673 CV_AMD64_RCX = 330,
674 CV_AMD64_RDX = 331,
675 CV_AMD64_RSI = 332,
676 CV_AMD64_RDI = 333,
677 CV_AMD64_RBP = 334,
678 CV_AMD64_RSP = 335,
679
680 CV_AMD64_R8 = 336,
681 CV_AMD64_R9 = 337,
682 CV_AMD64_R10 = 338,
683 CV_AMD64_R11 = 339,
684 CV_AMD64_R12 = 340,
685 CV_AMD64_R13 = 341,
686 CV_AMD64_R14 = 342,
687 CV_AMD64_R15 = 343,
688};
@ CV_AMD64_MM21
Definition: cvconst.h:657
@ CV_REG_FPEDO
Definition: cvconst.h:206
@ CV_TRI_E0
Definition: cvconst.h:502
@ CV_AMD64_XMM8
Definition: cvconst.h:669
@ CV_R68_FPCR
Definition: cvconst.h:274
@ CV_AM33_MCRL
Definition: cvconst.h:555
@ CV_REG_FLAGS
Definition: cvconst.h:175
@ CV_REG_MM51
Definition: cvconst.h:227
@ CV_REG_MXCSR
Definition: cvconst.h:212
@ CV_IA64_P0
Definition: cvconst.h:484
@ CV_R68_ISP
Definition: cvconst.h:272
@ CV_ARM64_WZR
Definition: cvconst.h:465
@ CV_AMD64_DL
Definition: cvconst.h:583
@ CV_ARM_WCON
Definition: cvconst.h:446
@ CV_AMD64_EDXEAX
Definition: cvconst.h:649
@ CV_ARM_WC7
Definition: cvconst.h:452
@ CV_AMD64_FPCS
Definition: cvconst.h:637
@ CV_ALPHA_IntS0
Definition: cvconst.h:329
@ CV_AMD64_RSI
Definition: cvconst.h:675
@ CV_REG_MM50
Definition: cvconst.h:226
@ CV_REG_MM10
Definition: cvconst.h:218
@ CV_REG_SI
Definition: cvconst.h:158
@ CV_TRI_SWEVT
Definition: cvconst.h:534
@ CV_AMD64_XMM0
Definition: cvconst.h:644
@ CV_M32R_R13
Definition: cvconst.h:566
@ CV_TRI_ISP
Definition: cvconst.h:523
@ CV_AMD64_EMM0L
Definition: cvconst.h:650
@ CV_REG_AX
Definition: cvconst.h:152
@ CV_TRI_EA4
Definition: cvconst.h:512
@ CV_AMD64_MM51
Definition: cvconst.h:663
@ CV_TRI_NOREG
Definition: cvconst.h:499
@ CV_PPC_BAT0U
Definition: cvconst.h:376
@ CV_TRI_EA6
Definition: cvconst.h:513
@ CV_REG_YMM0D0
Definition: cvconst.h:251
@ CV_REG_XMM0L
Definition: cvconst.h:210
@ CV_SH3_Pr
Definition: cvconst.h:411
@ CV_ARM_WC5
Definition: cvconst.h:450
@ CV_AMD64_RIP
Definition: cvconst.h:612
@ CV_M4_IntV1
Definition: cvconst.h:305
@ CV_R68_DFC
Definition: cvconst.h:268
@ CV_AMD64_CH
Definition: cvconst.h:586
@ CV_AMD64_CX
Definition: cvconst.h:590
@ CV_TRI_PSW
Definition: cvconst.h:518
@ CV_AMD64_MM71
Definition: cvconst.h:667
@ CV_AMD64_EAX
Definition: cvconst.h:597
@ CV_AMD64_PSEUDO1
Definition: cvconst.h:631
@ CV_TRI_CREVT
Definition: cvconst.h:535
@ CV_AMD64_R9
Definition: cvconst.h:681
@ CV_REG_TEMP
Definition: cvconst.h:180
@ CV_R68_DTT1
Definition: cvconst.h:282
@ CV_SH3_BdrB
Definition: cvconst.h:424
@ CV_TRI_E8
Definition: cvconst.h:506
@ CV_AMD64_LDTR
Definition: cvconst.h:628
@ CV_SH3_Brcr
Definition: cvconst.h:426
@ CV_REG_MM61
Definition: cvconst.h:229
@ CV_AMD64_ST0
Definition: cvconst.h:632
@ CV_REG_YMM2I0
Definition: cvconst.h:237
@ CV_M32R_R14
Definition: cvconst.h:567
@ CV_SH_XFpR0
Definition: cvconst.h:430
@ CV_ARM_FPEXTRA0
Definition: cvconst.h:443
@ CV_REG_BP
Definition: cvconst.h:157
@ CV_AM33_MCRH
Definition: cvconst.h:554
@ CV_REG_TEMPH
Definition: cvconst.h:181
@ CV_M4_IntT0
Definition: cvconst.h:307
@ CV_PPC_BAT2L
Definition: cvconst.h:381
@ CV_ARM64_IP1
Definition: cvconst.h:470
@ CV_ARM64_SP
Definition: cvconst.h:473
@ CV_REG_MM70
Definition: cvconst.h:230
@ CV_REG_MM20
Definition: cvconst.h:220
@ CV_REG_IDTR
Definition: cvconst.h:190
@ CV_R68_DRP
Definition: cvconst.h:290
@ CV_REG_EFLAGS
Definition: cvconst.h:177
@ CV_AMD64_CS
Definition: cvconst.h:606
@ CV_TRI_E4
Definition: cvconst.h:504
@ CV_REG_YMM3F0
Definition: cvconst.h:246
@ CV_REG_SS
Definition: cvconst.h:170
@ CV_AMD64_MM70
Definition: cvconst.h:666
@ CV_ARM_NQ0
Definition: cvconst.h:460
@ CV_M32R_NOREG
Definition: cvconst.h:563
@ CV_REG_PCDR3
Definition: cvconst.h:183
@ CV_AM33_MDR
Definition: cvconst.h:552
@ CV_REG_AH
Definition: cvconst.h:148
@ CV_IA64_IntH0
Definition: cvconst.h:486
@ CV_AMD64_MM31
Definition: cvconst.h:659
@ CV_REG_EBX
Definition: cvconst.h:163
@ CV_AMD64_FPEDO
Definition: cvconst.h:642
@ CV_PPC_RTCL
Definition: cvconst.h:361
@ CV_SH3_IntR0
Definition: cvconst.h:407
@ CV_PPC_SRR1
Definition: cvconst.h:371
@ CV_REG_DH
Definition: cvconst.h:150
@ CV_M4_IntZERO
Definition: cvconst.h:302
@ CV_AMD64_R13
Definition: cvconst.h:685
@ CV_M32R_CBR
Definition: cvconst.h:570
@ CV_PPC_PVR
Definition: cvconst.h:375
@ CV_REG_YMM6D0
Definition: cvconst.h:257
@ CV_TRI_E12
Definition: cvconst.h:508
@ CV_IA64_Psr
Definition: cvconst.h:490
@ CV_ALPHA_IntGP
Definition: cvconst.h:339
@ CV_SH3_NOREG
Definition: cvconst.h:406
@ CV_R68_CAL
Definition: cvconst.h:294
@ CV_AMD64_FPDO
Definition: cvconst.h:638
@ CV_REG_LDTR
Definition: cvconst.h:192
@ CV_ALPHA_IntRA
Definition: cvconst.h:336
@ CV_REG_YMM2F0
Definition: cvconst.h:245
@ CV_ALPHA_IntT8
Definition: cvconst.h:332
@ CV_AMD64_DH
Definition: cvconst.h:587
@ CV_ARM_FPEXC
Definition: cvconst.h:441
@ CV_AM33_EPSW
Definition: cvconst.h:557
@ CV_PPC_DSISR
Definition: cvconst.h:366
@ CV_PPC_BAT2U
Definition: cvconst.h:380
@ CV_AMD64_MXCSR
Definition: cvconst.h:648
@ CV_PPC_BAT1L
Definition: cvconst.h:379
@ CV_TRI_EA14
Definition: cvconst.h:517
@ CV_ARM64_FPSR
Definition: cvconst.h:479
@ CV_R68_CAAR
Definition: cvconst.h:271
@ CV_SH3_Sr
Definition: cvconst.h:415
@ CV_REG_YMM1I0
Definition: cvconst.h:236
@ CV_ARM_WC15
Definition: cvconst.h:457
@ CV_R68_SFC
Definition: cvconst.h:267
@ CV_AMD64_DR0
Definition: cvconst.h:621
@ CV_REG_XMM0
Definition: cvconst.h:208
@ CV_M4_IntS0
Definition: cvconst.h:308
@ CV_AMD64_RBX
Definition: cvconst.h:672
@ CV_REG_MM01
Definition: cvconst.h:217
@ CV_TRI_ICR
Definition: cvconst.h:524
@ CV_TRI_SYSCON
Definition: cvconst.h:527
@ CV_PPC_EAR
Definition: cvconst.h:374
@ CV_PPC_SRR0
Definition: cvconst.h:370
@ CV_R68_FPIAR
Definition: cvconst.h:276
@ CV_ARM_NOREG
Definition: cvconst.h:433
@ CV_AMD64_AH
Definition: cvconst.h:585
@ CV_ARM_WC13
Definition: cvconst.h:455
@ CV_R68_URP
Definition: cvconst.h:280
@ CV_PPC_MQ
Definition: cvconst.h:358
@ CV_AMD64_RDI
Definition: cvconst.h:676
@ CV_ALLREG_TIMER
Definition: cvconst.h:130
@ CV_REG_XMM0H
Definition: cvconst.h:211
@ CV_REG_MM30
Definition: cvconst.h:222
@ CV_PPC_SDR1
Definition: cvconst.h:369
@ CV_AMD64_ISEM
Definition: cvconst.h:640
@ CV_TRI_DPMx_0
Definition: cvconst.h:530
@ CV_M4_IntKT1
Definition: cvconst.h:312
@ CV_PPC_IMISS
Definition: cvconst.h:397
@ CV_SH3_IntFp
Definition: cvconst.h:408
@ CV_M4_IntT9
Definition: cvconst.h:310
@ CV_ALPHA_NOREG
Definition: cvconst.h:325
@ CV_PPC_SR0
Definition: cvconst.h:356
@ CV_AMD64_MM20
Definition: cvconst.h:656
@ CV_TRI_EXEVT
Definition: cvconst.h:533
@ CV_ARM64_NOREG
Definition: cvconst.h:463
@ CV_ARM64_D0
Definition: cvconst.h:477
@ CV_SH3_BbrB
Definition: cvconst.h:423
@ CV_SH3_BbrA
Definition: cvconst.h:419
@ CV_AMD64_XMM0H
Definition: cvconst.h:647
@ CV_REG_ESI
Definition: cvconst.h:166
@ CV_PPC_DBAT3L
Definition: cvconst.h:391
@ CV_REG_TAG
Definition: cvconst.h:199
@ CV_AMD64_FS
Definition: cvconst.h:609
@ CV_IA64_Nats3
Definition: cvconst.h:493
@ CV_M4_NOREG
Definition: cvconst.h:301
@ CV_TRI_E2
Definition: cvconst.h:503
@ CV_REG_EIP
Definition: cvconst.h:176
@ CV_ALLREG_ERR
Definition: cvconst.h:128
@ CV_ARM_WCASF
Definition: cvconst.h:448
@ CV_TRI_EA10
Definition: cvconst.h:515
@ CV_AMD64_AX
Definition: cvconst.h:589
@ CV_PPC_HASH1
Definition: cvconst.h:395
@ CV_REG_YMM4I0
Definition: cvconst.h:239
@ CV_REG_YMM3D0
Definition: cvconst.h:254
@ CV_IA64_Nats
Definition: cvconst.h:491
@ CV_IA64_NOREG
Definition: cvconst.h:482
@ CV_AMD64_CL
Definition: cvconst.h:582
@ CV_R68_SCC
Definition: cvconst.h:293
@ CV_REG_YMM0H
Definition: cvconst.h:234
@ CV_AMD64_NONE
Definition: cvconst.h:580
@ CV_REG_YMM5F0
Definition: cvconst.h:248
@ CV_M4_FltFsr
Definition: cvconst.h:322
@ CV_PPC_BAT3L
Definition: cvconst.h:383
@ CV_REG_FPDS
Definition: cvconst.h:203
@ CV_AMD64_CTRL
Definition: cvconst.h:633
@ CV_JAVA_PC
Definition: cvconst.h:403
@ CV_AMD64_EBX
Definition: cvconst.h:600
@ CV_REG_GDTL
Definition: cvconst.h:189
@ CV_REG_BX
Definition: cvconst.h:155
@ CV_PPC_CR0
Definition: cvconst.h:351
@ CV_AMD64_IDTR
Definition: cvconst.h:626
@ CV_TRI_TVA
Definition: cvconst.h:539
@ CV_REG_MM40
Definition: cvconst.h:224
@ CV_R68_D0
Definition: cvconst.h:261
@ CV_AMD64_FPIP
Definition: cvconst.h:636
@ CV_ARM_WR0
Definition: cvconst.h:444
@ CV_REG_PSEUDO1
Definition: cvconst.h:195
@ CV_SH3_IntSp
Definition: cvconst.h:409
@ CV_ARM_R0
Definition: cvconst.h:434
@ CV_ALPHA_IntT0
Definition: cvconst.h:328
@ CV_AMD64_ESP
Definition: cvconst.h:601
@ CV_TRI_CPRx_0
Definition: cvconst.h:529
@ CV_REG_ECX
Definition: cvconst.h:161
@ CV_ARM_ND0
Definition: cvconst.h:459
@ CV_PPC_ASR
Definition: cvconst.h:373
@ CV_REG_MM31
Definition: cvconst.h:223
@ CV_R68_TT1
Definition: cvconst.h:296
@ CV_ALLREG_CMDLN
Definition: cvconst.h:140
@ CV_ALPHA_Fir
Definition: cvconst.h:343
@ CV_REG_EDXEAX
Definition: cvconst.h:213
@ CV_ALPHA_IntAT
Definition: cvconst.h:338
@ CV_PPC_PC
Definition: cvconst.h:357
@ CV_ALLREG_PARAMS
Definition: cvconst.h:136
@ CV_AM33_LAR
Definition: cvconst.h:560
@ CV_PPC_GPR0
Definition: cvconst.h:349
@ CV_AMD64_STAT
Definition: cvconst.h:634
@ CV_R68_BAD0
Definition: cvconst.h:297
@ CV_REG_ST0
Definition: cvconst.h:196
@ CV_AMD64_DI
Definition: cvconst.h:596
@ CV_TRI_E10
Definition: cvconst.h:507
@ CV_TRI_MMUCON
Definition: cvconst.h:537
@ CV_ALLREG_EFAD1
Definition: cvconst.h:131
@ CV_AMD64_ESI
Definition: cvconst.h:603
@ CV_REG_EBP
Definition: cvconst.h:165
@ CV_TRI_BIV
Definition: cvconst.h:525
@ CV_AMD64_MM01
Definition: cvconst.h:653
@ CV_PPC_RTCU
Definition: cvconst.h:360
@ CV_ALLREG_TEB
Definition: cvconst.h:129
@ CV_R68_SR
Definition: cvconst.h:264
@ CV_SH_Fpul
Definition: cvconst.h:428
@ CV_AMD64_ES
Definition: cvconst.h:605
@ CV_M4_IntAT
Definition: cvconst.h:303
@ CV_TRI_E6
Definition: cvconst.h:505
@ CV_REG_YMM7D0
Definition: cvconst.h:258
@ CV_AM33_NOREG
Definition: cvconst.h:545
@ CV_PPC_HID0
Definition: cvconst.h:400
@ CV_TRI_TPA
Definition: cvconst.h:540
@ CV_REG_YMM5D0
Definition: cvconst.h:256
@ CV_M32R_R0
Definition: cvconst.h:564
@ CV_ALLREG_ENV
Definition: cvconst.h:139
@ CV_ARM_CPSR
Definition: cvconst.h:438
@ CV_REG_CS
Definition: cvconst.h:169
@ CV_AMD64_TEMPH
Definition: cvconst.h:617
@ CV_PPC_COUNT
Definition: cvconst.h:365
@ CV_M4_IntS8
Definition: cvconst.h:315
@ CV_PPC_DMISS
Definition: cvconst.h:393
@ CV_REG_EAX
Definition: cvconst.h:160
@ CV_ARM64_LR
Definition: cvconst.h:472
@ CV_REG_DI
Definition: cvconst.h:159
@ CV_ARM_PC
Definition: cvconst.h:437
@ CV_REG_YMM4F0
Definition: cvconst.h:247
@ CV_M32R_PC
Definition: cvconst.h:577
@ CV_ALPHA_FltFsr
Definition: cvconst.h:345
@ CV_AMD64_BL
Definition: cvconst.h:584
@ CV_R68_TC
Definition: cvconst.h:291
@ CV_AMD64_EFLAGS
Definition: cvconst.h:613
@ CV_ARM_WC12
Definition: cvconst.h:454
@ CV_AMD64_MM60
Definition: cvconst.h:664
@ CV_TRI_BTV
Definition: cvconst.h:526
@ CV_ALLREG_EFAD2
Definition: cvconst.h:132
@ CV_AMD64_FLAGS
Definition: cvconst.h:611
@ CV_AMD64_SS
Definition: cvconst.h:607
@ CV_REG_DR0
Definition: cvconst.h:185
@ CV_PPC_XER
Definition: cvconst.h:359
@ CV_AM33_D0
Definition: cvconst.h:548
@ CV_AMD64_EDX
Definition: cvconst.h:599
@ CV_AMD64_SP
Definition: cvconst.h:593
@ CV_R68_ITT0
Definition: cvconst.h:283
@ CV_M4_IntT8
Definition: cvconst.h:309
@ CV_ARM64_PSTATE
Definition: cvconst.h:467
@ CV_M4_Fir
Definition: cvconst.h:319
@ CV_R68_USP
Definition: cvconst.h:265
@ CV_IA64_Preds
Definition: cvconst.h:485
@ CV_AMD64_R15
Definition: cvconst.h:687
@ CV_PPC_LR
Definition: cvconst.h:362
@ CV_AMD64_R14
Definition: cvconst.h:686
@ CV_SH3_BamrB
Definition: cvconst.h:422
@ CV_REG_YMM0
Definition: cvconst.h:233
@ CV_PPC_DEC
Definition: cvconst.h:368
@ CV_M32R_R15
Definition: cvconst.h:568
@ CV_REG_MM41
Definition: cvconst.h:225
@ CV_TRI_TRnEVT
Definition: cvconst.h:536
@ CV_AMD64_MM41
Definition: cvconst.h:661
@ CV_REG_YMM1D0
Definition: cvconst.h:252
@ CV_AMD64_ECX
Definition: cvconst.h:598
@ CV_TRI_ASI
Definition: cvconst.h:538
@ CV_M32R_BPC
Definition: cvconst.h:574
@ CV_REG_XMM00
Definition: cvconst.h:209
@ CV_REG_DL
Definition: cvconst.h:146
@ CV_AMD64_FPEIP
Definition: cvconst.h:641
@ CV_PPC_CR
Definition: cvconst.h:350
@ CV_REG_FS
Definition: cvconst.h:172
@ CV_TRI_DBGSSR
Definition: cvconst.h:532
@ CV_ARM_WC14
Definition: cvconst.h:456
@ CV_PPC_DBAT1L
Definition: cvconst.h:387
@ CV_ALLREG_EFAD3
Definition: cvconst.h:133
@ CV_IA64_Nats2
Definition: cvconst.h:492
@ CV_TRI_EA2
Definition: cvconst.h:511
@ CV_REG_MM00
Definition: cvconst.h:216
@ CV_REG_QUOTE
Definition: cvconst.h:182
@ CV_AMD64_MM40
Definition: cvconst.h:660
@ CV_REG_STAT
Definition: cvconst.h:198
@ CV_ARM64_X0
Definition: cvconst.h:468
@ CV_ARM_FPSCR
Definition: cvconst.h:440
@ CV_M32R_SPI
Definition: cvconst.h:571
@ CV_ARM_WCID
Definition: cvconst.h:445
@ CV_REG_YMM4D0
Definition: cvconst.h:255
@ CV_M32R_SPO
Definition: cvconst.h:573
@ CV_AM33_PC
Definition: cvconst.h:551
@ CV_PPC_HASH2
Definition: cvconst.h:396
@ CV_ALPHA_Fpcr
Definition: cvconst.h:342
@ CV_ALPHA_IntT11
Definition: cvconst.h:335
@ CV_ARM_FS32
Definition: cvconst.h:458
@ CV_R68_CCR
Definition: cvconst.h:263
@ CV_PPC_DBAT1U
Definition: cvconst.h:386
@ CV_AMD64_CR0
Definition: cvconst.h:620
@ CV_PPC_DBAT2L
Definition: cvconst.h:389
@ CV_PPC_DBAT0U
Definition: cvconst.h:384
@ CV_REG_YMM2D0
Definition: cvconst.h:253
@ CV_AM33_LIR
Definition: cvconst.h:559
@ CV_AMD64_QUOTE
Definition: cvconst.h:618
@ CV_TRI_FCX
Definition: cvconst.h:521
@ CV_REG_CH
Definition: cvconst.h:149
@ CV_ARM64_FP
Definition: cvconst.h:471
@ CV_M4_IntLO
Definition: cvconst.h:317
@ CV_SH3_Macl
Definition: cvconst.h:413
@ CV_SH3_Mach
Definition: cvconst.h:412
@ CV_TRI_D0
Definition: cvconst.h:500
@ CV_ARM_ACC0
Definition: cvconst.h:439
@ CV_REG_CX
Definition: cvconst.h:153
@ CV_REG_BH
Definition: cvconst.h:151
@ CV_ALLREG_LOCALS
Definition: cvconst.h:137
@ CV_REG_MM71
Definition: cvconst.h:231
@ CV_AMD64_GDTR
Definition: cvconst.h:624
@ CV_REG_YMM0I0
Definition: cvconst.h:235
@ CV_REG_CL
Definition: cvconst.h:145
@ CV_AMD64_BX
Definition: cvconst.h:592
@ CV_REG_YMM5I0
Definition: cvconst.h:240
@ CV_AM33_E0
Definition: cvconst.h:546
@ CV_AMD64_R12
Definition: cvconst.h:684
@ CV_M4_IntV0
Definition: cvconst.h:304
@ CV_AMD64_TEMP
Definition: cvconst.h:616
@ CV_R68_CACR
Definition: cvconst.h:269
@ CV_AMD64_MM11
Definition: cvconst.h:655
@ CV_R68_VAL
Definition: cvconst.h:287
@ CV_SH3_BamrA
Definition: cvconst.h:418
@ CV_AMD64_RDX
Definition: cvconst.h:674
@ CV_R68_PCSR
Definition: cvconst.h:286
@ CV_REG_CTRL
Definition: cvconst.h:197
@ CV_AMD64_BH
Definition: cvconst.h:588
@ CV_ALPHA_IntV0
Definition: cvconst.h:327
@ CV_IA64_Br0
Definition: cvconst.h:483
@ CV_ARM64_S0
Definition: cvconst.h:476
@ CV_TRI_CPMx_0
Definition: cvconst.h:531
@ CV_ALPHA_IntT10
Definition: cvconst.h:334
@ CV_AMD64_R11
Definition: cvconst.h:683
@ CV_REG_EDI
Definition: cvconst.h:167
@ CV_REG_YMM1F0
Definition: cvconst.h:244
@ CV_ALPHA_IntA0
Definition: cvconst.h:331
@ CV_SH3_BasrA
Definition: cvconst.h:417
@ CV_PPC_PMR0
Definition: cvconst.h:392
@ CV_AMD64_EMM0H
Definition: cvconst.h:651
@ CV_REG_MM0
Definition: cvconst.h:207
@ CV_AM33_FPCR
Definition: cvconst.h:558
@ CV_PPC_BAT3U
Definition: cvconst.h:382
@ CV_PPC_BAT0L
Definition: cvconst.h:377
@ CV_REG_ES
Definition: cvconst.h:168
@ CV_PPC_RPA
Definition: cvconst.h:399
@ CV_ALPHA_IntT9
Definition: cvconst.h:333
@ CV_M4_IntKT0
Definition: cvconst.h:311
@ CV_AMD64_XMM00
Definition: cvconst.h:645
@ CV_AMD64_FPDS
Definition: cvconst.h:639
@ CV_ALPHA_IntT12
Definition: cvconst.h:337
@ CV_M4_IntHI
Definition: cvconst.h:318
@ CV_R68_MSP
Definition: cvconst.h:266
@ CV_AMD64_R8
Definition: cvconst.h:680
@ CV_REG_ESP
Definition: cvconst.h:164
@ CV_AMD64_GDTL
Definition: cvconst.h:625
@ CV_AMD64_SI
Definition: cvconst.h:595
@ CV_R68_DTT0
Definition: cvconst.h:281
@ CV_AMD64_TR
Definition: cvconst.h:629
@ CV_PPC_BAT1U
Definition: cvconst.h:378
@ CV_TRI_EA12
Definition: cvconst.h:516
@ CV_R68_VBR
Definition: cvconst.h:270
@ CV_AMD64_RBP
Definition: cvconst.h:677
@ CV_ARM64_Q0
Definition: cvconst.h:478
@ CV_ALPHA_SoftFpcr
Definition: cvconst.h:346
@ CV_PPC_ICMP
Definition: cvconst.h:398
@ CV_AMD64_RAX
Definition: cvconst.h:671
@ CV_REG_FPCS
Definition: cvconst.h:201
@ CV_REG_YMM6I0
Definition: cvconst.h:241
@ CV_M4_IntGP
Definition: cvconst.h:313
@ CV_SH3_Gbr
Definition: cvconst.h:410
@ CV_AMD64_GS
Definition: cvconst.h:610
@ CV_ARM64_NZCV
Definition: cvconst.h:475
@ CV_ARM_WCSSF
Definition: cvconst.h:447
@ CV_IA64_Ip
Definition: cvconst.h:487
@ CV_AM33_SP
Definition: cvconst.h:550
@ CV_M32R_ACLO
Definition: cvconst.h:576
@ CV_REG_MM21
Definition: cvconst.h:221
@ CV_AMD64_RCX
Definition: cvconst.h:673
@ CV_R68_MMUSR
Definition: cvconst.h:279
@ CV_REG_FPEIP
Definition: cvconst.h:205
@ CV_M32R_PSW
Definition: cvconst.h:569
@ CV_TRI_TPX
Definition: cvconst.h:541
@ CV_PPC_DBAT0L
Definition: cvconst.h:385
@ CV_R68_AC
Definition: cvconst.h:292
@ CV_SH3_BarA
Definition: cvconst.h:416
@ CV_IA64_Cfm
Definition: cvconst.h:489
@ CV_REG_YMM7F0
Definition: cvconst.h:250
@ CV_REG_TR
Definition: cvconst.h:193
@ CV_REG_ISEM
Definition: cvconst.h:204
@ CV_SH3_Pc
Definition: cvconst.h:414
@ CV_M4_IntRA
Definition: cvconst.h:316
@ CV_M32R_SPU
Definition: cvconst.h:572
@ CV_R68_ITT1
Definition: cvconst.h:284
@ CV_TRI_DPRx_0
Definition: cvconst.h:528
@ CV_ARM_WC6
Definition: cvconst.h:451
@ CV_IA64_FltF0
Definition: cvconst.h:495
@ CV_REG_GDTR
Definition: cvconst.h:188
@ CV_AMD64_RSP
Definition: cvconst.h:678
@ CV_AMD64_PCDR3
Definition: cvconst.h:619
@ CV_REG_CR0
Definition: cvconst.h:184
@ CV_M32R_R12
Definition: cvconst.h:565
@ CV_IA64_IntR0
Definition: cvconst.h:494
@ CV_SH_Fpscr
Definition: cvconst.h:427
@ CV_ARM64_ZR
Definition: cvconst.h:474
@ CV_AM33_A0
Definition: cvconst.h:547
@ CV_REG_AL
Definition: cvconst.h:144
@ CV_REG_MM11
Definition: cvconst.h:219
@ CV_M4_Psr
Definition: cvconst.h:320
@ CV_REG_YMM0F0
Definition: cvconst.h:243
@ CV_PPC_DAR
Definition: cvconst.h:367
@ CV_PPC_DBAT3U
Definition: cvconst.h:390
@ CV_ARM64_W0
Definition: cvconst.h:464
@ CV_TRI_E14
Definition: cvconst.h:509
@ CV_R68_FP0
Definition: cvconst.h:277
@ CV_TRI_EA0
Definition: cvconst.h:510
@ CV_R68_A0
Definition: cvconst.h:262
@ CV_REG_DX
Definition: cvconst.h:154
@ CV_AMD64_BP
Definition: cvconst.h:594
@ CV_REG_IDTL
Definition: cvconst.h:191
@ CV_AMD64_DX
Definition: cvconst.h:591
@ CV_AM33_MCVF
Definition: cvconst.h:556
@ CV_AMD64_MM30
Definition: cvconst.h:658
@ CV_R68_BAC0
Definition: cvconst.h:298
@ CV_AMD64_TAG
Definition: cvconst.h:635
@ CV_AMD64_MM0
Definition: cvconst.h:643
@ CV_ARM_FS0
Definition: cvconst.h:442
@ CV_PPC_SPRG0
Definition: cvconst.h:372
@ CV_SH3_BasrB
Definition: cvconst.h:421
@ CV_AMD64_EBP
Definition: cvconst.h:602
@ CV_ALLREG_VFRAME
Definition: cvconst.h:134
@ CV_REG_YMM3I0
Definition: cvconst.h:238
@ CV_REG_GS
Definition: cvconst.h:173
@ CV_REG_YMM7I0
Definition: cvconst.h:242
@ CV_AMD64_IDTL
Definition: cvconst.h:627
@ CV_AM33_FS0
Definition: cvconst.h:549
@ CV_M4_IntSP
Definition: cvconst.h:314
@ CV_AMD64_XMM0L
Definition: cvconst.h:646
@ CV_R68_PSR
Definition: cvconst.h:285
@ CV_REG_BL
Definition: cvconst.h:147
@ CV_TRI_LCX
Definition: cvconst.h:522
@ CV_PPC_COMPARE
Definition: cvconst.h:364
@ CV_ARM64_PC
Definition: cvconst.h:466
@ CV_ARM_WCGR0
Definition: cvconst.h:453
@ CV_PPC_FPSCR
Definition: cvconst.h:354
@ CV_REG_SP
Definition: cvconst.h:156
@ CV_ALPHA_IntSP
Definition: cvconst.h:340
@ CV_PPC_CTR
Definition: cvconst.h:363
@ CV_REG_DS
Definition: cvconst.h:171
@ CV_PPC_DBAT2U
Definition: cvconst.h:388
@ CV_REG_EDX
Definition: cvconst.h:162
@ CV_ARM_LR
Definition: cvconst.h:436
@ CV_TRI_EA8
Definition: cvconst.h:514
@ CV_IA64_Umask
Definition: cvconst.h:488
@ CV_ALPHA_Psr
Definition: cvconst.h:344
@ CV_R68_PC
Definition: cvconst.h:273
@ CV_ALPHA_IntFP
Definition: cvconst.h:330
@ CV_ALPHA_FltF0
Definition: cvconst.h:326
@ CV_TRI_PC
Definition: cvconst.h:520
@ CV_R68_CRP
Definition: cvconst.h:288
@ CV_AMD64_R10
Definition: cvconst.h:682
@ CV_ARM64_IP0
Definition: cvconst.h:469
@ CV_REG_MM60
Definition: cvconst.h:228
@ CV_ALPHA_IntZERO
Definition: cvconst.h:341
@ CV_REG_YMM6F0
Definition: cvconst.h:249
@ CV_AM33_MDRQ
Definition: cvconst.h:553
@ CV_R68_TT0
Definition: cvconst.h:295
@ CV_PPC_FPR0
Definition: cvconst.h:352
@ CV_TRI_PCXI
Definition: cvconst.h:519
@ CV_TRI_A0
Definition: cvconst.h:501
@ CV_AMD64_MM10
Definition: cvconst.h:654
@ CV_R68_SRP
Definition: cvconst.h:289
@ CV_ALLREG_TID
Definition: cvconst.h:138
@ CV_SH3_BdmrB
Definition: cvconst.h:425
@ CV_REG_FPIP
Definition: cvconst.h:200
@ CV_M4_IntA0
Definition: cvconst.h:306
@ CV_TRI_TFA
Definition: cvconst.h:542
@ CV_AMD64_DS
Definition: cvconst.h:608
@ CV_REG_IP
Definition: cvconst.h:174
@ CV_AMD64_EDI
Definition: cvconst.h:604
@ CV_ARM_SP
Definition: cvconst.h:435
@ CV_REG_EMM0L
Definition: cvconst.h:214
@ CV_R68_FPSR
Definition: cvconst.h:275
@ CV_SH3_BarB
Definition: cvconst.h:420
@ CV_AMD64_AL
Definition: cvconst.h:581
@ CV_AMD64_MM00
Definition: cvconst.h:652
@ CV_PPC_MSR
Definition: cvconst.h:355
@ CV_R68_MMUSR030
Definition: cvconst.h:278
@ CV_AMD64_MM61
Definition: cvconst.h:665
@ CV_AMD64_MM50
Definition: cvconst.h:662
@ CV_ALLREG_HANDLE
Definition: cvconst.h:135
@ CV_REG_EMM0H
Definition: cvconst.h:215
@ CV_M4_FltF0
Definition: cvconst.h:321
@ CV_SH_FpR0
Definition: cvconst.h:429
@ CV_PPC_DCMP
Definition: cvconst.h:394
@ CV_REG_FPDO
Definition: cvconst.h:202
@ CV_M32R_ACHI
Definition: cvconst.h:575
@ CV_ARM_WC4
Definition: cvconst.h:449
@ CV_REG_NONE
Definition: cvconst.h:143

◆ DataKind

Enumerator
DataIsUnknown 
DataIsLocal 
DataIsStaticLocal 
DataIsParam 
DataIsObjectPtr 
DataIsFileStatic 
DataIsGlobal 
DataIsMember 
DataIsStaticMember 
DataIsConstant 
DataIsUnknown 
DataIsLocal 
DataIsStaticLocal 
DataIsParam 
DataIsObjectPtr 
DataIsFileStatic 
DataIsGlobal 
DataIsMember 
DataIsStaticMember 
DataIsConstant 

Definition at line 110 of file cvconst.h.

111{
122};
@ DataIsUnknown
Definition: cvconst.h:112
@ DataIsLocal
Definition: cvconst.h:113
@ DataIsStaticMember
Definition: cvconst.h:120
@ DataIsGlobal
Definition: cvconst.h:118
@ DataIsStaticLocal
Definition: cvconst.h:114
@ DataIsMember
Definition: cvconst.h:119
@ DataIsObjectPtr
Definition: cvconst.h:116
@ DataIsConstant
Definition: cvconst.h:121
@ DataIsFileStatic
Definition: cvconst.h:117
@ DataIsParam
Definition: cvconst.h:115

◆ LocationType

Enumerator
LocIsNull 
LocIsStatic 
LocIsTLS 
LocIsRegRel 
LocIsThisRel 
LocIsEnregistered 
LocIsBitField 
LocIsSlot 
LocIsIlRel 
LocInMetaData 
LocIsConstant 

Definition at line 94 of file cvconst.h.

95{
103 LocIsSlot,
107};
@ LocIsConstant
Definition: cvconst.h:106
@ LocIsIlRel
Definition: cvconst.h:104
@ LocIsNull
Definition: cvconst.h:96
@ LocIsBitField
Definition: cvconst.h:102
@ LocIsEnregistered
Definition: cvconst.h:101
@ LocIsStatic
Definition: cvconst.h:97
@ LocIsRegRel
Definition: cvconst.h:99
@ LocIsTLS
Definition: cvconst.h:98
@ LocIsSlot
Definition: cvconst.h:103
@ LocInMetaData
Definition: cvconst.h:105
@ LocIsThisRel
Definition: cvconst.h:100

◆ SymTagEnum

Enumerator
SymTagNull 
SymTagExe 
SymTagCompiland 
SymTagCompilandDetails 
SymTagCompilandEnv 
SymTagFunction 
SymTagBlock 
SymTagData 
SymTagAnnotation 
SymTagLabel 
SymTagPublicSymbol 
SymTagUDT 
SymTagEnum 
SymTagFunctionType 
SymTagPointerType 
SymTagArrayType 
SymTagBaseType 
SymTagTypedef 
SymTagBaseClass 
SymTagFriend 
SymTagFunctionArgType 
SymTagFuncDebugStart 
SymTagFuncDebugEnd 
SymTagUsingNamespace 
SymTagVTableShape 
SymTagVTable 
SymTagCustom 
SymTagThunk 
SymTagCustomType 
SymTagManagedType 
SymTagDimension 
SymTagMax 
SymTagNull 
SymTagExe 
SymTagCompiland 
SymTagCompilandDetails 
SymTagCompilandEnv 
SymTagFunction 
SymTagBlock 
SymTagData 
SymTagAnnotation 
SymTagLabel 
SymTagPublicSymbol 
SymTagUDT 
SymTagEnum 
SymTagFunctionType 
SymTagPointerType 
SymTagArrayType 
SymTagBaseType 
SymTagTypedef 
SymTagBaseClass 
SymTagFriend 
SymTagFunctionArgType 
SymTagFuncDebugStart 
SymTagFuncDebugEnd 
SymTagUsingNamespace 
SymTagVTableShape 
SymTagVTable 
SymTagCustom 
SymTagThunk 
SymTagCustomType 
SymTagManagedType 
SymTagDimension 
SymTagMax 
SymTagNull 
SymTagExe 
SymTagCompiland 
SymTagCompilandDetails 
SymTagCompilandEnv 
SymTagFunction 
SymTagBlock 
SymTagData 
SymTagAnnotation 
SymTagLabel 
SymTagPublicSymbol 
SymTagUDT 
SymTagEnum 
SymTagFunctionType 
SymTagPointerType 
SymTagArrayType 
SymTagBaseType 
SymTagTypedef 
SymTagBaseClass 
SymTagFriend 
SymTagFunctionArgType 
SymTagFuncDebugStart 
SymTagFuncDebugEnd 
SymTagUsingNamespace 
SymTagVTableShape 
SymTagVTable 
SymTagCustom 
SymTagThunk 
SymTagCustomType 
SymTagManagedType 
SymTagDimension 
SymTagMax 

Definition at line 25 of file cvconst.h.

26{
59};
SymTagEnum
Definition: cvconst.h:26
@ SymTagArrayType
Definition: cvconst.h:42
@ SymTagVTable
Definition: cvconst.h:52
@ SymTagFunction
Definition: cvconst.h:32
@ SymTagThunk
Definition: cvconst.h:54
@ SymTagVTableShape
Definition: cvconst.h:51
@ SymTagFunctionArgType
Definition: cvconst.h:47
@ SymTagNull
Definition: cvconst.h:27
@ SymTagCustom
Definition: cvconst.h:53
@ SymTagExe
Definition: cvconst.h:28
@ SymTagPointerType
Definition: cvconst.h:41
@ SymTagFuncDebugEnd
Definition: cvconst.h:49
@ SymTagAnnotation
Definition: cvconst.h:35
@ SymTagCompilandEnv
Definition: cvconst.h:31
@ SymTagCustomType
Definition: cvconst.h:55
@ SymTagPublicSymbol
Definition: cvconst.h:37
@ SymTagCompilandDetails
Definition: cvconst.h:30
@ SymTagFuncDebugStart
Definition: cvconst.h:48
@ SymTagTypedef
Definition: cvconst.h:44
@ SymTagBaseType
Definition: cvconst.h:43
@ SymTagData
Definition: cvconst.h:34
@ SymTagBlock
Definition: cvconst.h:33
@ SymTagManagedType
Definition: cvconst.h:56
@ SymTagUDT
Definition: cvconst.h:38
@ SymTagMax
Definition: cvconst.h:58
@ SymTagDimension
Definition: cvconst.h:57
@ SymTagLabel
Definition: cvconst.h:36
@ SymTagFunctionType
Definition: cvconst.h:40
@ SymTagCompiland
Definition: cvconst.h:29
@ SymTagBaseClass
Definition: cvconst.h:45
@ SymTagUsingNamespace
Definition: cvconst.h:50
@ SymTagFriend
Definition: cvconst.h:46

◆ THUNK_ORDINAL

Enumerator
THUNK_ORDINAL_NOTYPE 
THUNK_ORDINAL_ADJUSTOR 
THUNK_ORDINAL_VCALL 
THUNK_ORDINAL_PCODE 
THUNK_ORDINAL_LOAD 
THUNK_ORDINAL_NOTYPE 
THUNK_ORDINAL_ADJUSTOR 
THUNK_ORDINAL_VCALL 
THUNK_ORDINAL_PCODE 
THUNK_ORDINAL_LOAD 

Definition at line 690 of file cvconst.h.

691{
THUNK_ORDINAL
Definition: cvconst.h:691
@ THUNK_ORDINAL_VCALL
Definition: cvconst.h:694
@ THUNK_ORDINAL_PCODE
Definition: cvconst.h:695
@ THUNK_ORDINAL_NOTYPE
Definition: cvconst.h:692
@ THUNK_ORDINAL_LOAD
Definition: cvconst.h:696
@ THUNK_ORDINAL_ADJUSTOR
Definition: cvconst.h:693

◆ UdtKind

Enumerator
UdtStruct 
UdtClass 
UdtUnion 
UdtStruct 
UdtClass 
UdtUnion 

Definition at line 86 of file cvconst.h.

87{
91};
@ UdtStruct
Definition: cvconst.h:88
@ UdtClass
Definition: cvconst.h:89
@ UdtUnion
Definition: cvconst.h:90