ReactOS 0.4.15-dev-8131-g4988de4
hwuart.c
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1/*
2 * PROJECT: ReactOS Boot Loader
3 * LICENSE: BSD - See COPYING.ARM in the top level directory
4 * FILE: boot/armllb/hw/versatile/hwuart.c
5 * PURPOSE: LLB UART Initialization Routines for Versatile
6 * PROGRAMMERS: ReactOS Portable Systems Group
7 */
8
9#include "precomp.h"
10
11//
12// UART Registers
13//
14#define UART_PL01x_DR (LlbHwVersaUartBase + 0x00)
15#define UART_PL01x_RSR (LlbHwVersaUartBase + 0x04)
16#define UART_PL01x_ECR (LlbHwVersaUartBase + 0x04)
17#define UART_PL01x_FR (LlbHwVersaUartBase + 0x18)
18#define UART_PL011_IBRD (LlbHwVersaUartBase + 0x24)
19#define UART_PL011_FBRD (LlbHwVersaUartBase + 0x28)
20#define UART_PL011_LCRH (LlbHwVersaUartBase + 0x2C)
21#define UART_PL011_CR (LlbHwVersaUartBase + 0x30)
22#define UART_PL011_IMSC (LlbHwVersaUartBase + 0x38)
23
24//
25// LCR Values
26//
27#define UART_PL011_LCRH_WLEN_8 0x60
28#define UART_PL011_LCRH_FEN 0x10
29
30//
31// FCR Values
32//
33#define UART_PL011_CR_UARTEN 0x01
34#define UART_PL011_CR_TXE 0x100
35#define UART_PL011_CR_RXE 0x200
36
37//
38// LSR Values
39//
40#define UART_PL01x_FR_RXFE 0x10
41#define UART_PL01x_FR_TXFF 0x20
42
43static const ULONG LlbHwVersaUartBase = 0x101F1000;
44
45/* FUNCTIONS ******************************************************************/
46
47VOID
50{
51 ULONG Divider, Remainder, Fraction, ClockRate, Baudrate;
52
53 /* Query peripheral rate, hardcore baudrate */
54 ClockRate = LlbHwGetPClk();
55 Baudrate = 115200;
56
57 /* Calculate baudrate clock divider and remainder */
58 Divider = ClockRate / (16 * Baudrate);
59 Remainder = ClockRate % (16 * Baudrate);
60
61 /* Calculate the fractional part */
62 Fraction = (8 * Remainder / Baudrate) >> 1;
63 Fraction += (8 * Remainder / Baudrate) & 1;
64
65 /* Disable interrupts */
67
68 /* Set the baud rate to 115200 bps */
71
72 /* Set 8 bits for data, 1 stop bit, no parity, FIFO enabled */
75
76 /* Clear and enable FIFO */
81}
82
83VOID
86{
87 /* Send the character */
89}
90
94{
95 /* TX output buffer is ready? */
97}
98
100NTAPI
102{
103 if (Port == 0)
104 {
105 return 0x101F1000;
106 }
107 else if (Port == 1)
108 {
109 return 0x101F2000;
110 }
111
112 return 0;
113}
114
115/* EOF */
unsigned char BOOLEAN
#define WRITE_REGISTER_ULONG(r, v)
Definition: arm.h:27
#define READ_REGISTER_ULONG(r)
Definition: arm.h:26
CPPORT Port[4]
Definition: headless.c:35
ULONG NTAPI LlbHwGetPClk(VOID)
Definition: hwinfo.c:20
VOID NTAPI LlbHwUartSendChar(IN CHAR Char)
Definition: hwuart.c:22
ULONG NTAPI LlbHwGetUartBase(IN ULONG Port)
Definition: hwuart.c:36
BOOLEAN NTAPI LlbHwUartTxReady(VOID)
Definition: hwuart.c:29
#define NTAPI
Definition: typedefs.h:36
#define IN
Definition: typedefs.h:39
uint32_t ULONG
Definition: typedefs.h:59
#define UART_PL011_LCRH_FEN
Definition: hwuart.c:28
static const ULONG LlbHwVersaUartBase
Definition: hwuart.c:43
#define UART_PL011_IBRD
Definition: hwuart.c:18
#define UART_PL01x_DR
Definition: hwuart.c:14
#define UART_PL011_CR_RXE
Definition: hwuart.c:35
VOID NTAPI LlbHwVersaUartInitialize(VOID)
Definition: hwuart.c:49
#define UART_PL011_LCRH
Definition: hwuart.c:20
#define UART_PL011_LCRH_WLEN_8
Definition: hwuart.c:27
#define UART_PL011_CR_TXE
Definition: hwuart.c:34
#define UART_PL01x_FR_TXFF
Definition: hwuart.c:41
#define UART_PL011_FBRD
Definition: hwuart.c:19
#define UART_PL011_CR_UARTEN
Definition: hwuart.c:33
#define UART_PL01x_FR
Definition: hwuart.c:17
#define UART_PL011_CR
Definition: hwuart.c:21
_In_ LARGE_INTEGER _Out_opt_ PLARGE_INTEGER Remainder
Definition: rtlfuncs.h:3045
char CHAR
Definition: xmlstorage.h:175