hardware.h File Reference

#include <ntddk.h>

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Data Structures
struct	PPERIODICFRAMELIST
struct	PQETD_TOKEN_BITS
struct	PQUEUE_TRANSFER_DESCRIPTOR
struct	PEND_POINT_CHARACTERISTICS
struct	PEND_POINT_CAPABILITIES
struct	PQUEUE_HEAD
struct	PEHCI_USBCMD_CONTENT
struct	PEHCI_HCS_CONTENT
struct	PEHCI_HCC_CONTENT
struct	PEHCI_CAPS
struct	EHCI_PORT_STATUS
Defines
#define	EHCI_CAPLENGTH   0x00
#define	EHCI_HCIVERSION   0x02
#define	EHCI_HCSPARAMS   0x04
#define	EHCI_HCCPARAMS   0x08
#define	EHCI_HCSP_PORTROUTE   0x0c
#define	EHCI_ECP_SHIFT   8
#define	EHCI_ECP_MASK   0xff
#define	EHCI_LEGSUP_CAPID_MASK   0xff
#define	EHCI_LEGSUP_CAPID   0x01
#define	EHCI_LEGSUP_OSOWNED   (1 << 24)
#define	EHCI_LEGSUP_BIOSOWNED   (1 << 16)
#define	EHCI_USBCMD   0x00
#define	EHCI_USBSTS   0x04
#define	EHCI_USBINTR   0x08
#define	EHCI_FRINDEX   0x0C
#define	EHCI_CTRLDSSEGMENT   0x10
#define	EHCI_PERIODICLISTBASE   0x14
#define	EHCI_ASYNCLISTBASE   0x18
#define	EHCI_CONFIGFLAG   0x40
#define	EHCI_PORTSC   0x44
#define	EHCI_USBINTR_INTE   0x01
#define	EHCI_USBINTR_ERR   0x02
#define	EHCI_USBINTR_PC   0x04
#define	EHCI_USBINTR_FLROVR   0x08
#define	EHCI_USBINTR_HSERR   0x10
#define	EHCI_USBINTR_ASYNC   0x20
#define	EHCI_STS_INT   0x01
#define	EHCI_STS_ERR   0x02
#define	EHCI_STS_PCD   0x04
#define	EHCI_STS_FLR   0x08
#define	EHCI_STS_FATAL   0x10
#define	EHCI_STS_IAA   0x20
#define	EHCI_STS_HALT   0x1000
#define	EHCI_STS_RECL   0x2000
#define	EHCI_STS_PSS   0x4000
#define	EHCI_STS_ASS   0x8000
#define	EHCI_ERROR_INT   (EHCI_STS_FATAL | EHCI_STS_ERR)
#define	EHCI_PRT_CONNECTED   0x01
#define	EHCI_PRT_CONNECTSTATUSCHANGE   0x02
#define	EHCI_PRT_ENABLED   0x04
#define	EHCI_PRT_ENABLEDSTATUSCHANGE   0x08
#define	EHCI_PRT_OVERCURRENTACTIVE   0x10
#define	EHCI_PRT_OVERCURRENTCHANGE   0x20
#define	EHCI_PRT_FORCERESUME   0x40
#define	EHCI_PRT_SUSPEND   0x80
#define	EHCI_PRT_RESET   0x100
#define	EHCI_PRT_LINESTATUSA   0x400
#define	EHCI_PRT_LINESTATUSB   0x800
#define	EHCI_PRT_POWER   0x1000
#define	EHCI_PRT_RELEASEOWNERSHIP   0x2000
#define	EHCI_PORTSC_DATAMASK   0xffffffd1
#define	EHCI_IS_LOW_SPEED(x)   (((x) & EHCI_PRT_LINESTATUSA) && !((x) & EHCI_PRT_LINESTATUSB))
#define	TERMINATE_POINTER   0x01
#define	PID_CODE_OUT_TOKEN   0x00
#define	PID_CODE_IN_TOKEN   0x01
#define	PID_CODE_SETUP_TOKEN   0x02
#define	DO_START_SPLIT   0x00
#define	DO_COMPLETE_SPLIT   0x01
#define	PING_STATE_DO_OUT   0x00
#define	PING_STATE_DO_PING   0x01
#define	QH_ENDPOINT_FULLSPEED   0x00
#define	QH_ENDPOINT_LOWSPEED   0x01
#define	QH_ENDPOINT_HIGHSPEED   0x02
#define	QH_TYPE_IDT   0x00
#define	QH_TYPE_QH   0x02
#define	QH_TYPE_SITD   0x04
#define	QH_TYPE_FSTN   0x06
#define	EHCI_INTERRUPT_ENTRIES_COUNT   (10 + 1)
#define	EHCI_VFRAMELIST_ENTRIES_COUNT   128
#define	EHCI_FRAMELIST_ENTRIES_COUNT   1024
#define	MAX_AVAILABLE_BANDWIDTH   125
#define	EHCI_QH_CAPS_MULT_SHIFT   30
#define	EHCI_QH_CAPS_MULT_MASK   0x03
#define	EHCI_QH_CAPS_PORT_SHIFT   23
#define	EHCI_QH_CAPS_PORT_MASK   0x7f
#define	EHCI_QH_CAPS_HUB_SHIFT   16
#define	EHCI_QH_CAPS_HUB_MASK   0x7f
#define	EHCI_QH_CAPS_SCM_SHIFT   8
#define	EHCI_QH_CAPS_SCM_MASK   0xff
#define	EHCI_QH_CAPS_ISM_SHIFT   0
#define	EHCI_QH_CAPS_ISM_MASK   0xff
Functions
	C_ASSERT (FIELD_OFFSET(QUEUE_TRANSFER_DESCRIPTOR, PhysicalAddr)==0x34)
	C_ASSERT (sizeof(END_POINT_CHARACTERISTICS)==4)
	C_ASSERT (sizeof(END_POINT_CAPABILITIES)==4)
	C_ASSERT (FIELD_OFFSET(QUEUE_HEAD, HorizontalLinkPointer)==0x00)
	C_ASSERT (FIELD_OFFSET(QUEUE_HEAD, EndPointCharacteristics)==0x04)
	C_ASSERT (FIELD_OFFSET(QUEUE_HEAD, EndPointCapabilities)==0x08)
	C_ASSERT (FIELD_OFFSET(QUEUE_HEAD, CurrentLinkPointer)==0xC)
	C_ASSERT (FIELD_OFFSET(QUEUE_HEAD, NextPointer)==0x10)
	C_ASSERT (FIELD_OFFSET(QUEUE_HEAD, AlternateNextPointer)==0x14)
	C_ASSERT (FIELD_OFFSET(QUEUE_HEAD, Token)==0x18)
	C_ASSERT (FIELD_OFFSET(QUEUE_HEAD, BufferPointer)==0x1C)
	C_ASSERT (FIELD_OFFSET(QUEUE_HEAD, PhysicalAddr)==0x44)