31#define FPU_CHECK() if (State->ControlRegisters[FAST486_REG_CR0] & (FAST486_CR0_EM | FAST486_CR0_TS)) \
33 Fast486Exception(State, FAST486_EXCEPTION_NM); \
36#define FPU_INDEX(i) ((State->FpuStatus.Top + (i)) % FAST486_NUM_FPU_REGS)
37#define FPU_ST(i) State->FpuRegisters[FPU_INDEX(i)]
39#define FPU_GET_TAG(i) ((State->FpuTag >> (FPU_INDEX(i) * 2)) & 3)
40#define FPU_SET_TAG(i, t) { \
41 State->FpuTag &= ~((1 << (FPU_INDEX(i) * 2)) | (1 << ((FPU_INDEX(i) * 2) + 1))); \
42 State->FpuTag |= ((t) & 3) << (FPU_INDEX(i) * 2); \
44#define FPU_UPDATE_TAG(i) FPU_SET_TAG((i), Fast486FpuGetValueTag(&FPU_ST(i)))
45#define FPU_SAVE_LAST_INST() { \
46 State->FpuLastInstPtr = State->SavedInstPtr; \
47 State->FpuLastCodeSel = State->SegmentRegs[FAST486_REG_CS].Selector; \
49#define FPU_SAVE_LAST_OPERAND() { \
50 State->FpuLastOpPtr.Long = ModRegRm.MemoryAddress; \
51 State->FpuLastDataSel = (State->PrefixFlags & FAST486_PREFIX_SEG) \
52 ? State->SegmentOverride : FAST486_REG_DS; \
55#define FPU_REAL4_BIAS 0x7F
56#define FPU_REAL8_BIAS 0x3FF
57#define FPU_REAL10_BIAS 0x3FFF
58#define FPU_MAX_EXPONENT 0x7FFE
59#define FPU_MANTISSA_HIGH_BIT 0x8000000000000000ULL
60#define FPU_INDEFINITE_MANTISSA 0xC000000000000000ULL
61#define FPU_REAL4_INFINITY 0x7F800000
62#define FPU_REAL4_INDEFINITE 0xFFC00000
63#define FPU_REAL8_INFINITY 0x7FF0000000000000ULL
64#define FPU_REAL8_INDEFINITE 0xFFF8000000000000ULL
66#define FPU_IS_NORMALIZED(x) (FPU_IS_ZERO(x) || (((x)->Mantissa & FPU_MANTISSA_HIGH_BIT) != 0ULL))
67#define FPU_IS_ZERO(x) ((x)->Mantissa == 0ULL)
68#define FPU_IS_NAN(x) ((x)->Exponent == (FPU_MAX_EXPONENT + 1))
69#define FPU_IS_INFINITY(x) (FPU_IS_NAN(x) && ((x)->Mantissa == FPU_MANTISSA_HIGH_BIT))
70#define FPU_IS_POS_INF(x) (FPU_IS_INFINITY(x) && !(x)->Sign)
71#define FPU_IS_NEG_INF(x) (FPU_IS_INFINITY(x) && (x)->Sign)
72#define FPU_IS_INDEFINITE(x) (FPU_IS_NAN(x) && !FPU_IS_INFINITY(x))
74#define INVERSE_NUMBERS_COUNT 50
@ FPU_DOUBLE_EXT_PRECISION
#define FAST486_OPCODE_HANDLER(x)