ReactOS  r76032
mm.h
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1 /*
2  * kernel internal memory management definitions for x86
3  */
4 #pragma once
5 
6 #ifdef _PAE_
7 #define _MI_PAGING_LEVELS 3
8 #else
9 #define _MI_PAGING_LEVELS 2
10 #endif
11 
12 /* Memory layout base addresses */
13 #define MI_USER_PROBE_ADDRESS (PVOID)0x7FFF0000
14 #define MI_DEFAULT_SYSTEM_RANGE_START (PVOID)0x80000000
15 #ifndef PAE
16 #define HYPER_SPACE 0xC0400000
17 #define HYPER_SPACE_END 0xC07FFFFF
18 #else
19 #define HYPER_SPACE 0xC0800000
20 #define HYPER_SPACE_END 0xC0BFFFFF
21 #endif
22 #define MI_SYSTEM_CACHE_WS_START (PVOID)0xC0C00000
23 #define MI_PAGED_POOL_START (PVOID)0xE1000000
24 #define MI_NONPAGED_POOL_END (PVOID)0xFFBE0000
25 #define MI_DEBUG_MAPPING (PVOID)0xFFBFF000
26 
27 /* FIXME: These are different for PAE */
28 #define PTE_BASE 0xC0000000
29 #define PDE_BASE 0xC0300000
30 #define PDE_TOP 0xC0300FFF
31 #define PTE_TOP 0xC03FFFFF
32 
33 #define PTE_PER_PAGE 0x400
34 #define PDE_PER_PAGE 0x400
35 #define PPE_PER_PAGE 1
36 
37 /* Misc address definitions */
38 #define MI_SYSTEM_PTE_BASE (PVOID)MiAddressToPte(NULL)
39 #define MM_HIGHEST_VAD_ADDRESS \
40  (PVOID)((ULONG_PTR)MM_HIGHEST_USER_ADDRESS - (16 * PAGE_SIZE))
41 #define MI_MAPPING_RANGE_START (ULONG)HYPER_SPACE
42 #define MI_MAPPING_RANGE_END (MI_MAPPING_RANGE_START + \
43  MI_HYPERSPACE_PTES * PAGE_SIZE)
44 #define MI_DUMMY_PTE (PMMPTE)((ULONG_PTR)MI_MAPPING_RANGE_END + \
45  PAGE_SIZE)
46 #define MI_VAD_BITMAP (PMMPTE)((ULONG_PTR)MI_DUMMY_PTE + \
47  PAGE_SIZE)
48 #define MI_WORKING_SET_LIST (PMMPTE)((ULONG_PTR)MI_VAD_BITMAP + \
49  PAGE_SIZE)
50 
51 /* Memory sizes */
52 #define MI_MIN_PAGES_FOR_NONPAGED_POOL_TUNING ((255 * _1MB) >> PAGE_SHIFT)
53 #define MI_MIN_PAGES_FOR_SYSPTE_TUNING ((19 * _1MB) >> PAGE_SHIFT)
54 #define MI_MIN_PAGES_FOR_SYSPTE_BOOST ((32 * _1MB) >> PAGE_SHIFT)
55 #define MI_MIN_PAGES_FOR_SYSPTE_BOOST_BOOST ((256 * _1MB) >> PAGE_SHIFT)
56 #define MI_MIN_INIT_PAGED_POOLSIZE (32 * _1MB)
57 #define MI_MAX_INIT_NONPAGED_POOL_SIZE (128 * _1MB)
58 #define MI_MAX_NONPAGED_POOL_SIZE (128 * _1MB)
59 #define MI_SYSTEM_VIEW_SIZE (32 * _1MB)
60 #define MI_SESSION_VIEW_SIZE (48 * _1MB)
61 #define MI_SESSION_POOL_SIZE (16 * _1MB)
62 #define MI_SESSION_IMAGE_SIZE (8 * _1MB)
63 #define MI_SESSION_WORKING_SET_SIZE (4 * _1MB)
64 #define MI_SESSION_SIZE (MI_SESSION_VIEW_SIZE + \
65  MI_SESSION_POOL_SIZE + \
66  MI_SESSION_IMAGE_SIZE + \
67  MI_SESSION_WORKING_SET_SIZE)
68 #define MI_MIN_ALLOCATION_FRAGMENT (4 * _1KB)
69 #define MI_ALLOCATION_FRAGMENT (64 * _1KB)
70 #define MI_MAX_ALLOCATION_FRAGMENT (2 * _1MB)
71 
72 /* Misc constants */
73 #define MM_PTE_SOFTWARE_PROTECTION_BITS 5
74 #define MI_MIN_SECONDARY_COLORS 8
75 #define MI_SECONDARY_COLORS 64
76 #define MI_MAX_SECONDARY_COLORS 1024
77 #define MI_MAX_FREE_PAGE_LISTS 4
78 #define MI_HYPERSPACE_PTES (256 - 1)
79 #define MI_ZERO_PTES (32)
80 #define MI_MAX_ZERO_BITS 21
81 #define SESSION_POOL_LOOKASIDES 26
82 
83 /* MMPTE related defines */
84 #define MM_EMPTY_PTE_LIST ((ULONG)0xFFFFF)
85 #define MM_EMPTY_LIST ((ULONG_PTR)-1)
86 
87 
88 /* Easy accessing PFN in PTE */
89 #define PFN_FROM_PTE(v) ((v)->u.Hard.PageFrameNumber)
90 
91 /* Macros for portable PTE modification */
92 #define MI_MAKE_DIRTY_PAGE(x) ((x)->u.Hard.Dirty = 1)
93 #define MI_MAKE_CLEAN_PAGE(x) ((x)->u.Hard.Dirty = 0)
94 #define MI_MAKE_ACCESSED_PAGE(x) ((x)->u.Hard.Accessed = 1)
95 #define MI_PAGE_DISABLE_CACHE(x) ((x)->u.Hard.CacheDisable = 1)
96 #define MI_PAGE_WRITE_THROUGH(x) ((x)->u.Hard.WriteThrough = 1)
97 #define MI_PAGE_WRITE_COMBINED(x) ((x)->u.Hard.WriteThrough = 0)
98 #define MI_IS_PAGE_LARGE(x) ((x)->u.Hard.LargePage == 1)
99 #if !defined(CONFIG_SMP)
100 #define MI_IS_PAGE_WRITEABLE(x) ((x)->u.Hard.Write == 1)
101 #else
102 #define MI_IS_PAGE_WRITEABLE(x) ((x)->u.Hard.Writable == 1)
103 #endif
104 #define MI_IS_PAGE_COPY_ON_WRITE(x)((x)->u.Hard.CopyOnWrite == 1)
105 #define MI_IS_PAGE_DIRTY(x) ((x)->u.Hard.Dirty == 1)
106 #define MI_MAKE_OWNER_PAGE(x) ((x)->u.Hard.Owner = 1)
107 #if !defined(CONFIG_SMP)
108 #define MI_MAKE_WRITE_PAGE(x) ((x)->u.Hard.Write = 1)
109 #else
110 #define MI_MAKE_WRITE_PAGE(x) ((x)->u.Hard.Writable = 1)
111 #endif
112 
113 /* On x86, these two are the same */
114 #define MI_WRITE_VALID_PPE MI_WRITE_VALID_PTE
115 
116 /* Convert an address to a corresponding PTE */
117 #define MiAddressToPte(x) \
118  ((PMMPTE)(((((ULONG)(x)) >> 12) << 2) + PTE_BASE))
119 
120 /* Convert an address to a corresponding PDE */
121 #define MiAddressToPde(x) \
122  ((PMMPDE)(((((ULONG)(x)) >> 22) << 2) + PDE_BASE))
123 
124 /* Convert an address to a corresponding PTE offset/index */
125 #define MiAddressToPteOffset(x) \
126  ((((ULONG)(x)) << 10) >> 22)
127 
128 /* Convert an address to a corresponding PDE offset/index */
129 #define MiAddressToPdeOffset(x) \
130  (((ULONG)(x)) / (1024 * PAGE_SIZE))
131 #define MiGetPdeOffset MiAddressToPdeOffset
132 
133 /* Convert a PTE/PDE into a corresponding address */
134 #define MiPteToAddress(_Pte) ((PVOID)((ULONG)(_Pte) << 10))
135 #define MiPdeToAddress(_Pde) ((PVOID)((ULONG)(_Pde) << 20))
136 
137 /* Translate between P*Es */
138 #define MiPdeToPte(_Pde) ((PMMPTE)MiPteToAddress(_Pde))
139 #define MiPteToPde(_Pte) ((PMMPDE)MiAddressToPte(_Pte))
140 
141 /* Check P*E boundaries */
142 #define MiIsPteOnPdeBoundary(PointerPte) \
143  ((((ULONG_PTR)PointerPte) & (PAGE_SIZE - 1)) == 0)
144 
145 //
146 // Decodes a Prototype PTE into the underlying PTE
147 //
148 #define MiProtoPteToPte(x) \
149  (PMMPTE)((ULONG_PTR)MmPagedPoolStart + \
150  (((x)->u.Proto.ProtoAddressHigh << 9) | (x)->u.Proto.ProtoAddressLow << 2))
151 
152 //
153 // Decodes a Prototype PTE into the underlying PTE
154 //
155 #define MiSubsectionPteToSubsection(x) \
156  ((x)->u.Subsect.WhichPool == PagedPool) ? \
157  (PMMPTE)((ULONG_PTR)MmSubsectionBase + \
158  (((x)->u.Subsect.SubsectionAddressHigh << 7) | \
159  (x)->u.Subsect.SubsectionAddressLow << 3)) : \
160  (PMMPTE)((ULONG_PTR)MmNonPagedPoolEnd - \
161  (((x)->u.Subsect.SubsectionAddressHigh << 7) | \
162  (x)->u.Subsect.SubsectionAddressLow << 3))