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vgadata.c
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00001 /* 00002 * PROJECT: ReactOS VGA Miniport Driver 00003 * LICENSE: Microsoft NT4 DDK Sample Code License 00004 * FILE: boot/drivers/video/miniport/vga/vgadata.c 00005 * PURPOSE: Handles switching to VGA Modes and holds VGA Built-in Modes 00006 * PROGRAMMERS: Copyright (c) 1992 Microsoft Corporation 00007 * ReactOS Portable Systems Group 00008 */ 00009 00010 #include "vga.h" 00011 00012 // 00013 // This structure describes to which ports access is required. 00014 // 00015 00016 VIDEO_ACCESS_RANGE VgaAccessRange[] = { 00017 { 00018 {{VGA_BASE_IO_PORT, 0x00000000}}, // 64-bit linear base address 00019 // of range 00020 VGA_START_BREAK_PORT - VGA_BASE_IO_PORT + 1, // # of ports 00021 1, // range is in I/O space 00022 1, // range should be visible 00023 0 // range should be shareable 00024 }, 00025 { 00026 {{VGA_END_BREAK_PORT, 0x00000000}}, 00027 VGA_MAX_IO_PORT - VGA_END_BREAK_PORT + 1, 00028 1, 00029 1, 00030 0 00031 }, 00032 00033 // 00034 // This next region also includes Memory mapped IO. In MMIO, the ports are 00035 // repeated every 256 bytes from b8000 to bff00. 00036 // 00037 00038 { 00039 {{MEM_VGA, 0x00000000}}, 00040 MEM_VGA_SIZE, 00041 0, 00042 1, 00043 0 00044 }, 00045 // eVb: 4.1 [VGA] - Add ATI/Mach64 VGA registers 00046 // 00047 // ATI Registers 00048 // 00049 00050 { 00051 {{0x1CE, 0x00000000}}, 00052 2, 00053 1, 00054 1, 00055 0 00056 }, 00057 { 00058 {{0x2E8, 0x00000000}}, 00059 8, 00060 1, 00061 1, 00062 0 00063 } 00064 // eVb: 4.1 [END] 00065 }; 00066 00067 // 00068 // 640x480 256-color 60Hz mode (BIOS mode 12) set command string for 00069 // VGA. 00070 // 00071 // eVb: 4.2 [VGA] - Add VGA command streams instead of Cirrus 00072 USHORT VGA_640x480[] = { 00073 OWM, // begin setmode 00074 SEQ_ADDRESS_PORT, 00075 5, // count 00076 0x100, // start sync reset 00077 0x0101,0x0F02,0x0003,0x0604, // program up sequencer 00078 00079 OB, // misc. register 00080 MISC_OUTPUT_REG_WRITE_PORT, 00081 0xE3, 00082 00083 OW, // text/graphics bit 00084 GRAPH_ADDRESS_PORT, 00085 0x506, 00086 00087 OW, // end sync reset 00088 SEQ_ADDRESS_PORT, 00089 IND_SYNC_RESET, 00090 00091 OB, 00092 SEQ_DATA_PORT, 00093 END_SYNC_RESET_VALUE, 00094 00095 OW, // unprotect crtc 0-7 00096 CRTC_ADDRESS_PORT_COLOR, 00097 0x511, 00098 00099 METAOUT+INDXOUT, // program gdc registers 00100 GRAPH_ADDRESS_PORT, 00101 VGA_NUM_CRTC_PORTS,0, // count, startindex 00102 0x5F,0x4F,0x50,0x82,0x54,0x80,0x0B,0x3E,0x00,0x40,0x0,0x0,0x0,0x0,0x0,0x0, 00103 0xEA,0x8C,0xDF,0x28,0x0,0xE7,0x4,0xE3,0xFF, 00104 00105 IB, // prepare atc for writing 00106 INPUT_STATUS_1_COLOR, 00107 00108 METAOUT+ATCOUT, // program atc registers 00109 ATT_ADDRESS_PORT, 00110 VGA_NUM_ATTRIB_CONT_PORTS,0, // count, startindex 00111 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 00112 0x17, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 00113 0x3D, 0x3E, 0x3F, 0x3F, 0x01, 0x00, 00114 0x0F, 0x00, 0x00, 00115 00116 METAOUT+INDXOUT, // program gdc registers 00117 GRAPH_ADDRESS_PORT, 00118 VGA_NUM_GRAPH_CONT_PORTS,0, // count, startindex 00119 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 00120 0x05, 0x0F, 0xFF, 00121 00122 OB, 00123 DAC_PIXEL_MASK_PORT, 00124 0xFF, 00125 00126 IB, // prepare atc for writing 00127 INPUT_STATUS_1_COLOR, 00128 00129 OB, // turn video on. 00130 ATT_ADDRESS_PORT, 00131 VIDEO_ENABLE, 00132 00133 EOD 00134 }; 00135 00136 // 00137 // 720x400 color text mode (BIOS mode 3) set command string for 00138 // VGA. 00139 // 00140 00141 USHORT VGA_TEXT_0[] = { 00142 OWM, // begin setmode 00143 SEQ_ADDRESS_PORT, 00144 5, // count 00145 0x100, // start sync reset 00146 0x0101,0x0302,0x0003,0x0204, // program up sequencer 00147 00148 OB, // misc. register 00149 MISC_OUTPUT_REG_WRITE_PORT, 00150 0x67, 00151 00152 OW, // text/graphics bit 00153 GRAPH_ADDRESS_PORT, 00154 0x0e06, 00155 00156 OW, // end sync reset 00157 SEQ_ADDRESS_PORT, 00158 IND_SYNC_RESET, 00159 00160 OB, 00161 SEQ_DATA_PORT, 00162 END_SYNC_RESET_VALUE, 00163 00164 OW, // unprotect crtc 0-7 00165 CRTC_ADDRESS_PORT_COLOR, 00166 0xE11, 00167 00168 METAOUT+INDXOUT, // program gdc registers 00169 GRAPH_ADDRESS_PORT, 00170 VGA_NUM_CRTC_PORTS,0, // count, startindex 00171 0x5F,0x4F,0x50,0x82,0x55,0x81,0xBF,0x1F,0x00,0x4F,0xD,0xE,0x0,0x0,0x0,0x0, 00172 0x9c,0x8E,0x8F,0x28,0x1F,0x96,0xB9,0xA3,0xFF, 00173 00174 IB, // prepare atc for writing 00175 INPUT_STATUS_1_COLOR, 00176 00177 METAOUT+ATCOUT, // program atc registers 00178 ATT_ADDRESS_PORT, 00179 VGA_NUM_ATTRIB_CONT_PORTS,0, // count, startindex 00180 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 00181 0x17, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 00182 0x3D, 0x3E, 0x3F, 0x3F, 0x04, 0x00, 00183 0x0F, 0x08, 0x00, 00184 00185 METAOUT+INDXOUT, // program gdc registers 00186 GRAPH_ADDRESS_PORT, 00187 VGA_NUM_GRAPH_CONT_PORTS,0, // count, startindex 00188 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 00189 0x0E, 0x00, 0xFF, 00190 00191 OB, 00192 DAC_PIXEL_MASK_PORT, 00193 0xFF, 00194 00195 IB, // prepare atc for writing 00196 INPUT_STATUS_1_COLOR, 00197 00198 OB, // turn video on. 00199 ATT_ADDRESS_PORT, 00200 VIDEO_ENABLE, 00201 00202 EOD 00203 }; 00204 00205 // 00206 // 640x400 color text mode (BIOS mode 3) set command string for 00207 // VGA. 00208 // 00209 00210 USHORT VGA_TEXT_1[] = { 00211 OWM, // begin setmode 00212 SEQ_ADDRESS_PORT, 00213 5, // count 00214 0x100, // start sync reset 00215 0x0101,0x0302,0x0003,0x0204, // program up sequencer 00216 00217 OB, // misc. register 00218 MISC_OUTPUT_REG_WRITE_PORT, 00219 0xA3, 00220 00221 OW, // text/graphics bit 00222 GRAPH_ADDRESS_PORT, 00223 0x0e06, 00224 00225 OW, // end sync reset 00226 SEQ_ADDRESS_PORT, 00227 IND_SYNC_RESET, 00228 00229 OB, 00230 SEQ_DATA_PORT, 00231 END_SYNC_RESET_VALUE, 00232 00233 OW, // unprotect crtc 0-7 00234 CRTC_ADDRESS_PORT_COLOR, 00235 0x511, 00236 00237 METAOUT+INDXOUT, // program gdc registers 00238 GRAPH_ADDRESS_PORT, 00239 VGA_NUM_CRTC_PORTS,0, // count, startindex 00240 0x5F,0x4F,0x50,0x82,0x55,0x81,0xBF,0x1F,0x00,0x4D,0xB,0xC,0x0,0x0,0x0,0x0, 00241 0x83,0x85,0x5D,0x28,0x1F,0x63,0xBA,0xA3,0xFF, 00242 00243 IB, // prepare atc for writing 00244 INPUT_STATUS_1_COLOR, 00245 00246 METAOUT+ATCOUT, // program atc registers 00247 ATT_ADDRESS_PORT, 00248 VGA_NUM_ATTRIB_CONT_PORTS,0, // count, startindex 00249 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 00250 0x17, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 00251 0x3D, 0x3E, 0x3F, 0x3F, 0x04, 0x00, 00252 0x0F, 0x00, 0x00, 00253 00254 METAOUT+INDXOUT, // program gdc registers 00255 GRAPH_ADDRESS_PORT, 00256 VGA_NUM_GRAPH_CONT_PORTS,0, // count, startindex 00257 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 00258 0x0E, 0x00, 0xFF, 00259 00260 OB, 00261 DAC_PIXEL_MASK_PORT, 00262 0xFF, 00263 00264 IB, // prepare atc for writing 00265 INPUT_STATUS_1_COLOR, 00266 00267 OB, // turn video on. 00268 ATT_ADDRESS_PORT, 00269 VIDEO_ENABLE, 00270 00271 EOD 00272 }; 00273 // eVb: 4.2 [END] 00274 // 00275 // Video mode table - contains information and commands for initializing each 00276 // mode. These entries must correspond with those in VIDEO_MODE_VGA. The first 00277 // entry is commented; the rest follow the same format, but are not so 00278 // heavily commented. 00279 // 00280 // eVb: 4.3 [VGA] - Add VGA, ModeX and SVGA mode instead of Cirrus Modes 00281 VIDEOMODE ModesVGA[] = 00282 { 00283 // Color text mode 3, 720x400, 9x16 char cell (VGA). 00284 // 00285 { 00286 VIDEO_MODE_BANKED | VIDEO_MODE_COLOR, // flags that this mode is a color mode, but not graphics 00287 4, // four planes 00288 1, // one bit of colour per plane 00289 80, 25, // 80x25 text resolution 00290 720, 400, // 720x400 pixels on screen 00291 1, // only support one frequency, non-interlaced 00292 160, 0x10000, // 160 bytes per scan line, 64K of CPU-addressable bitmap 00293 FALSE, 00294 0x3, VGA_TEXT_0, // Mode 3, I/O initialization stream 00295 0xA0000, // Physical address at 0xA0000 00296 0x18000, 0x8000, 00297 0x20000, // 2 banks of 64K, 128KB total memory 00298 720, // 720 pixels per scan line 00299 FALSE, 00300 0 00301 }, 00302 00303 // 00304 // Color text mode 3, 640x350, 8x14 char cell (EGA). 00305 // 00306 { 00307 VIDEO_MODE_BANKED | VIDEO_MODE_COLOR, 00308 4, 1, 00309 80, 25, 00310 640, 350, 00311 1, 00312 160, 0x10000, 00313 FALSE, 00314 0x3, VGA_TEXT_1, 00315 0xA0000, 00316 0x18000, 0x8000, 00317 0x20000, 00318 640, 00319 FALSE, 00320 0 00321 }, 00322 00323 // 00324 // 00325 // Standard VGA Color graphics mode 0x12, 640x480 16 colors. 00326 // 00327 { 00328 VIDEO_MODE_BANKED | VIDEO_MODE_COLOR | VIDEO_MODE_GRAPHICS, 00329 4, 1, 00330 80, 30, 00331 640, 480, 00332 1, 00333 80, 0x10000, 00334 FALSE, 00335 0x12, VGA_640x480, 00336 0xA0000, 00337 0, 0x20000, 00338 0x20000, 00339 640, 00340 FALSE, 00341 0 00342 }, 00343 00344 { 00345 VIDEO_MODE_BANKED | VIDEO_MODE_COLOR | VIDEO_MODE_GRAPHICS, 00346 8, 1, 00347 0, 0, 00348 320, 200, 00349 70, 00350 80, 0x10000, 00351 FALSE, 00352 0x3, NULL, 00353 0xA0000, 00354 0, 0x20000, 00355 0x20000, 00356 320, 00357 FALSE, 00358 0 00359 }, 00360 00361 { 00362 VIDEO_MODE_BANKED | VIDEO_MODE_COLOR | VIDEO_MODE_GRAPHICS, 00363 8, 1, 00364 0, 0, 00365 320, 240, 00366 60, 00367 80, 0x10000, 00368 FALSE, 00369 0x3, NULL, 00370 0xA0000, 00371 0, 0x20000, 00372 0x20000, 00373 320, 00374 FALSE, 00375 0 00376 }, 00377 00378 { 00379 VIDEO_MODE_BANKED | VIDEO_MODE_COLOR | VIDEO_MODE_GRAPHICS, 00380 8, 1, 00381 0, 0, 00382 320, 400, 00383 70, 00384 80, 0x10000, 00385 FALSE, 00386 0x3, NULL, 00387 0xA0000, 00388 0, 0x20000, 00389 0x20000, 00390 320, 00391 FALSE, 00392 0 00393 }, 00394 00395 { 00396 VIDEO_MODE_BANKED | VIDEO_MODE_COLOR | VIDEO_MODE_GRAPHICS, 00397 8, 1, 00398 0, 0, 00399 320, 480, 00400 60, 00401 80, 0x10000, 00402 FALSE, 00403 0x3, NULL, 00404 0xA0000, 00405 0, 0x20000, 00406 0x20000, 00407 320, 00408 FALSE, 00409 0 00410 }, 00411 00412 // 00413 // 800x600 16 colors. 00414 // 00415 { 00416 VIDEO_MODE_BANKED | VIDEO_MODE_COLOR | VIDEO_MODE_GRAPHICS, 00417 4, 1, 00418 100, 37, 00419 800, 600, 00420 1, 00421 100, 0x10000, 00422 FALSE, 00423 (0x102 << 16) | VBE_SET_VBE_MODE, NULL, 00424 0xA0000, 00425 0, 0x20000, 00426 0x20000, 00427 800, 00428 FALSE, 00429 0 00430 }, 00431 }; 00432 00433 ULONG NumVideoModes = sizeof(ModesVGA) / sizeof(VIDEOMODE); 00434 PVIDEOMODE VgaModeList; 00435 // eVb: 4.3 [END] 00436 00437 // 00438 // 00439 // Data used to set the Graphics and Sequence Controllers to put the 00440 // VGA into a planar state at A0000 for 64K, with plane 2 enabled for 00441 // reads and writes, so that a font can be loaded, and to disable that mode. 00442 // 00443 00444 // Settings to enable planar mode with plane 2 enabled. 00445 // 00446 00447 USHORT EnableA000Data[] = { 00448 OWM, 00449 SEQ_ADDRESS_PORT, 00450 1, 00451 0x0100, 00452 00453 OWM, 00454 GRAPH_ADDRESS_PORT, 00455 3, 00456 0x0204, // Read Map = plane 2 00457 0x0005, // Graphics Mode = read mode 0, write mode 0 00458 0x0406, // Graphics Miscellaneous register = A0000 for 64K, not odd/even, 00459 // graphics mode 00460 OWM, 00461 SEQ_ADDRESS_PORT, 00462 3, 00463 0x0402, // Map Mask = write to plane 2 only 00464 0x0404, // Memory Mode = not odd/even, not full memory, graphics mode 00465 0x0300, // end sync reset 00466 EOD 00467 }; 00468 00469 // 00470 // Settings to disable the font-loading planar mode. 00471 // 00472 00473 USHORT DisableA000Color[] = { 00474 OWM, 00475 SEQ_ADDRESS_PORT, 00476 1, 00477 0x0100, 00478 00479 OWM, 00480 GRAPH_ADDRESS_PORT, 00481 3, 00482 0x0004, 0x1005, 0x0E06, 00483 00484 OWM, 00485 SEQ_ADDRESS_PORT, 00486 3, 00487 0x0302, 0x0204, 0x0300, // end sync reset 00488 EOD 00489 00490 };
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