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ReactOS Development > Doxygenhwkmi.c
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00001 /* 00002 * PROJECT: ReactOS Boot Loader 00003 * LICENSE: BSD - See COPYING.ARM in the top level directory 00004 * FILE: boot/armllb/hw/versatile/hwkmi.c 00005 * PURPOSE: LLB KMI Support for Versatile 00006 * PROGRAMMERS: ReactOS Portable Systems Group 00007 */ 00008 00009 #include "precomp.h" 00010 00011 // 00012 // Control Register Bits 00013 // 00014 #define KMICR_TYPE (1 << 5) 00015 #define KMICR_RXINTREN (1 << 4) 00016 #define KMICR_TXINTREN (1 << 3) 00017 #define KMICR_EN (1 << 2) 00018 #define KMICR_FD (1 << 1) 00019 #define KMICR_FC (1 << 0) 00020 00021 // 00022 // Status Register Bits 00023 // 00024 #define KMISTAT_TXEMPTY (1 << 6) 00025 #define KMISTAT_TXBUSY (1 << 5) 00026 #define KMISTAT_RXFULL (1 << 4) 00027 #define KMISTAT_RXBUSY (1 << 3) 00028 #define KMISTAT_RXPARITY (1 << 2) 00029 #define KMISTAT_IC (1 << 1) 00030 #define KMISTAT_ID (1 << 0) 00031 00032 // 00033 // KMI Registers 00034 // 00035 #define PL050_KMICR (LlbHwVersaKmiBase + 0x00) 00036 #define PL050_KMISTAT (LlbHwVersaKmiBase + 0x04) 00037 #define PL050_KMIDATA (LlbHwVersaKmiBase + 0x08) 00038 #define PL050_KMICLKDIV (LlbHwVersaKmiBase + 0x0c) 00039 static const ULONG LlbHwVersaKmiBase = 0x10006000; 00040 00041 // 00042 // PS/2 Commands/Requests 00043 // 00044 #define PS2_O_RESET 0xff 00045 #define PS2_O_RESEND 0xfe 00046 #define PS2_O_DISABLE 0xf5 00047 #define PS2_O_ENABLE 0xf4 00048 #define PS2_O_ECHO 0xee 00049 #define PS2_O_SET_DEFAULT 0xf6 00050 #define PS2_O_SET_RATE_DELAY 0xf3 00051 #define PS2_O_SET_SCANSET 0xf0 00052 #define PS2_O_INDICATORS 0xed 00053 #define PS2_I_RESEND 0xfe 00054 #define PS2_I_DIAGFAIL 0xfd 00055 #define PS2_I_ACK 0xfa 00056 #define PS2_I_BREAK 0xf0 00057 #define PS2_I_ECHO 0xee 00058 #define PS2_I_BAT_OK 0xaa 00059 00060 /* FUNCTIONS ******************************************************************/ 00061 00062 VOID 00063 NTAPI 00064 LlbHwVersaKmiSendAndWait(IN ULONG Value) 00065 { 00066 volatile int i = 1000; 00067 00068 /* Send the value */ 00069 LlbHwKbdSend(Value); 00070 00071 /* Wait a bit */ 00072 while (--i); 00073 00074 /* Now make sure we received an ACK */ 00075 if (LlbHwKbdRead() != PS2_I_ACK) DbgPrint("PS/2 FAILURE!\n"); 00076 } 00077 00078 VOID 00079 NTAPI 00080 LlbHwVersaKmiInitialize(VOID) 00081 { 00082 UCHAR Divisor; 00083 00084 /* Setup divisor and enable KMI */ 00085 Divisor = (LlbHwGetPClk() / 8000000) - 1; 00086 WRITE_REGISTER_UCHAR(PL050_KMICLKDIV, Divisor); 00087 WRITE_REGISTER_UCHAR(PL050_KMICR, KMICR_EN); 00088 00089 /* Reset PS/2 controller */ 00090 LlbHwVersaKmiSendAndWait(PS2_O_RESET); 00091 if (LlbHwKbdRead() != PS2_I_BAT_OK) DbgPrint("PS/2 RESET FAILURE!\n"); 00092 00093 /* Send PS/2 Initialization Stream */ 00094 LlbHwVersaKmiSendAndWait(PS2_O_DISABLE); 00095 LlbHwVersaKmiSendAndWait(PS2_O_SET_DEFAULT); 00096 LlbHwVersaKmiSendAndWait(PS2_O_SET_SCANSET); 00097 LlbHwVersaKmiSendAndWait(1); 00098 LlbHwVersaKmiSendAndWait(PS2_O_ENABLE); 00099 } 00100 00101 VOID 00102 NTAPI 00103 LlbHwKbdSend(IN ULONG Value) 00104 { 00105 ULONG Status; 00106 00107 /* Wait for ready signal */ 00108 do 00109 { 00110 /* Read TX buffer state */ 00111 Status = READ_REGISTER_UCHAR(PL050_KMISTAT); 00112 } while (!(Status & KMISTAT_TXEMPTY)); 00113 00114 /* Send value */ 00115 WRITE_REGISTER_UCHAR(PL050_KMIDATA, Value); 00116 } 00117 00118 BOOLEAN 00119 NTAPI 00120 LlbHwKbdReady(VOID) 00121 { 00122 return READ_REGISTER_UCHAR(PL050_KMISTAT) & KMISTAT_RXFULL; 00123 } 00124 00125 INT 00126 NTAPI 00127 LlbHwKbdRead(VOID) 00128 { 00129 /* Read current data on keyboard */ 00130 return READ_REGISTER_UCHAR(PL050_KMIDATA); 00131 } 00132 00133 /* EOF */ Generated on Sun May 27 2012 04:19:00 for ReactOS by
1.7.6.1
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