ReactOS  0.4.15-dev-1392-g3014417
ide.h
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1 /*++
2 
3 Copyright (C) Microsoft Corporation, 1999 - 1999
4 
5 Module Name:
6 
7  ide.h
8 
9 Abstract:
10 
11  These are the structures and defines that are used in the
12  PCI IDE mini drivers.
13 
14 Revision History:
15 
16 --*/
17 
18 
19 #if !defined (___ide_h___)
20 #define ___ide_h___
21 
22 #include "ideuser.h"
23 
24 #define MAX_IDE_DEVICE 2
25 #define MAX_IDE_LINE 2
26 #define MAX_IDE_CHANNEL 2
27 
28 //
29 // Some miniports need this structure.
30 // IdentifyData is passed to the miniport in
31 // the XfermodeSelect structure
32 //
33 
34 //
35 // IDENTIFY data
36 //
37 
38 #pragma pack (1)
39 typedef struct _IDENTIFY_DATA {
42  USHORT Reserved1; // 04 2
43  USHORT NumHeads; // 06 3
47  USHORT VendorUnique1[3]; // 0E 7-9
48  UCHAR SerialNumber[20]; // 14 10-19
49  USHORT BufferType; // 28 20
50  USHORT BufferSectorSize; // 2A 21
51  USHORT NumberOfEccBytes; // 2C 22
52  UCHAR FirmwareRevision[8]; // 2E 23-26
53  UCHAR ModelNumber[40]; // 36 27-46
54  UCHAR MaximumBlockTransfer; // 5E 47
55  UCHAR VendorUnique2; // 5F
56  USHORT DoubleWordIo; // 60 48
57  USHORT Capabilities; // 62 49
58  USHORT Reserved2; // 64 50
59  UCHAR VendorUnique3; // 66 51
61  UCHAR VendorUnique4; // 68 52
63  USHORT TranslationFieldsValid:3; // 6A 53
64  USHORT Reserved3:13;
68  ULONG CurrentSectorCapacity; // 72 57-58
71  USHORT SingleWordDMASupport : 8; // 62
73  USHORT MultiWordDMASupport : 8; // 63
75  USHORT AdvancedPIOModes : 8; // 64
76  USHORT Reserved4 : 8;
81  USHORT Reserved5[11]; // 69-79
82  USHORT MajorRevision; // 80
83  USHORT MinorRevision; // 81
84  USHORT Reserved6; // 82
86  USHORT Reserved6a[2]; // 84-85
89  USHORT UltraDMASupport : 8; // 88
90  USHORT UltraDMAActive : 8; //
91  USHORT Reserved7[11]; // 89-99
92  ULONG Max48BitLBA[2]; // 100-103
93  USHORT Reserved7a[22]; // 104-125
94  USHORT LastLun:3; // 126
100  USHORT Reserved11[128]; // 128-255
102 
103 //
104 // Identify data without the Reserved4.
105 //
106 
107 //typedef struct _IDENTIFY_DATA2 {
108 // USHORT GeneralConfiguration; // 00 00
109 // USHORT NumCylinders; // 02 1
110 // USHORT Reserved1; // 04 2
111 // USHORT NumHeads; // 06 3
112 // USHORT UnformattedBytesPerTrack; // 08 4
113 // USHORT UnformattedBytesPerSector; // 0A 5
114 // USHORT NumSectorsPerTrack; // 0C 6
115 // USHORT VendorUnique1[3]; // 0E 7-9
116 // UCHAR SerialNumber[20]; // 14 10-19
117 // USHORT BufferType; // 28 20
118 // USHORT BufferSectorSize; // 2A 21
119 // USHORT NumberOfEccBytes; // 2C 22
120 // UCHAR FirmwareRevision[8]; // 2E 23-26
121 // UCHAR ModelNumber[40]; // 36 27-46
122 // UCHAR MaximumBlockTransfer; // 5E 47
123 // UCHAR VendorUnique2; // 5F
124 // USHORT DoubleWordIo; // 60 48
125 // USHORT Capabilities; // 62 49
126 // USHORT Reserved2; // 64 50
127 // UCHAR VendorUnique3; // 66 51
128 // UCHAR PioCycleTimingMode; // 67
129 // UCHAR VendorUnique4; // 68 52
130 // UCHAR DmaCycleTimingMode; // 69
131 // USHORT TranslationFieldsValid:3; // 6A 53
132 // USHORT Reserved3:13;
133 // USHORT NumberOfCurrentCylinders; // 6C 54
134 // USHORT NumberOfCurrentHeads; // 6E 55
135 // USHORT CurrentSectorsPerTrack; // 70 56
136 // ULONG CurrentSectorCapacity; // 72 57-58
137 // USHORT CurrentMultiSectorSetting; // 59
138 // ULONG UserAddressableSectors; // 60-61
139 // USHORT SingleWordDMASupport : 8; // 62
140 // USHORT SingleWordDMAActive : 8;
141 // USHORT MultiWordDMASupport : 8; // 63
142 // USHORT MultiWordDMAActive : 8;
143 // USHORT AdvancedPIOModes : 8; // 64
144 // USHORT Reserved4 : 8;
145 // USHORT MinimumMWXferCycleTime; // 65
146 // USHORT RecommendedMWXferCycleTime; // 66
147 // USHORT MinimumPIOCycleTime; // 67
148 // USHORT MinimumPIOCycleTimeIORDY; // 68
149 // USHORT Reserved5[11]; // 69-79
150 // USHORT MajorRevision; // 80
151 // USHORT MinorRevision; // 81
152 // USHORT Reserved6[6]; // 82-87
153 // USHORT UltraDMASupport : 8; // 88
154 // USHORT UltraDMAActive : 8; //
155 // USHORT Reserved7[37]; // 89-125
156 // USHORT LastLun:3; // 126
157 // USHORT Reserved8:13;
158 // USHORT MediaStatusNotification:2; // 127
159 // USHORT Reserved9:6;
160 // USHORT DeviceWriteProtect:1;
161 // USHORT Reserved10:7;
162 //} IDENTIFY_DATA2, *PIDENTIFY_DATA2;
163 #pragma pack ()
164 
165 #define IDENTIFY_DATA_SIZE sizeof(IDENTIFY_DATA)
166 
167 
168 //
169 // The structure is passed to pci ide mini driver
170 // TransferModeSelect callback for selecting
171 // proper transfer mode the the devices connected
172 // to the given IDE channel
173 //
175 
176  //
177  // Input Parameters
178  //
179 
180  //
181  // IDE Channel Number. 0 or 1
182  //
184 
185  //
186  // Indicate whether devices are present
187  //
189 
190  //
191  // Indicate whether devices are ATA harddisk
192  //
194 
195  //
196  // Indicate whether devices support IO Ready Line
197  //
199 
200  //
201  // Indicate the data transfer modes devices support
202  //
204 
205  //
206  // Indicate devices' best timings for PIO, single word DMA,
207  // multiword DMA, and Ultra DMA modes
208  //
213 
214  //
215  // Indicate devices' current data transfer modes
216  //
218 
219  //
220  // The user's choice. This will allow pciidex to
221  // default to a transfer mode indicated by the mini driver
222  //
224 
225  //
226  // This enables UDMA66 on the intel chipsets
227  //
229 
230  //
231  //Some miniports need this
232  // The miniport will save this data in their deviceExtension
233  //
235 
236 
237  //
238  // Output Parameters
239  //
240 
241  //
242  // Indicate devices' data transfer modes chosen by
243  // the pcii ide mini drive
244  //
246 
247  //
248  // Transfermode timings
249  //
252 
254 
255 //
256 // possible ide channel state
257 //
258 
259 typedef enum {
264 
265 
266 //
267 // Prototype for different PCI IDE mini driver
268 // callbacks
269 //
270 typedef IDE_CHANNEL_STATE
272  IN PVOID DeviceExtension,
273  IN ULONG Channel
274  );
275 
276 typedef BOOLEAN
278  IN PVOID DeviceExtension
279  );
280 
281 typedef NTSTATUS
283  IN PVOID DeviceExtension,
284  IN OUT PPCIIDE_TRANSFER_MODE_SELECT TransferModeSelect
285  );
286 
287 typedef ULONG
289  IN PVOID deviceExtension,
290  IN PVOID cdbCmd,
291  IN UCHAR targetID
292  );
293 
294 typedef NTSTATUS
296  IDENTIFY_DATA IdentifyData,
297  PULONG BestXferMode,
298  PULONG CurrentMode
299  );
300 //
301 // This structure is for the PCI IDE mini driver to
302 // return its properties
303 //
305 
306  //
307  // sizeof (IDE_CONTROLLER_PROPERTIES)
308  //
310 
311  //
312  // Indicate the amount of memory PCI IDE mini driver
313  // needs for its private data
314  //
316 
317  //
318  // Indicate all the data transfer modes the PCI IDE
319  // controller supports
320  //
322 
323  //
324  // callback to query whether a IDE channel is enabled
325  //
327 
328  //
329  // callback to query whether both IDE channels requires
330  // synchronized access. (one channel at a time)
331  //
333 
334  //
335  // callback to select proper transfer modes for the
336  // given devices
337  //
339 
340  //
341  // at the end of a ATA data transfer, ignores busmaster
342  // status active bit. Normally, it should be FALSE
343  //
345 
346  //
347  // always clear the busmaster interrupt on every interrupt
348  // generated by the device. Normally, it should be FALSE
349  //
351 
352  //
353  // callback to determine whether DMA should be used or not
354  // called for every IO
355  //
357 
358 
359  //
360  // if the miniport needs a different alignment
361  //
363 
365 
366  //
367  // retrieves the supported udma modes from the Identify data
368  //
370 
372 
373 //
374 // callback to query PCI IDE controller properties
375 //
376 typedef
378  IN PVOID DeviceExtension,
379  IN PIDE_CONTROLLER_PROPERTIES ControllerProperties
380  );
381 
382 
383 //
384 // To initialize PCI IDE mini driver
385 //
386 NTSTATUS
391  IN ULONG ExtensionSize
392  );
393 
394 //
395 // To query PCI IDE config space data
396 //
397 NTSTATUS
399  IN PVOID DeviceExtension,
400  IN PVOID Buffer,
401  IN ULONG ConfigDataOffset,
403  );
404 
405 //
406 // To save PCI IDE config space data
407 //
408 NTSTATUS
410  IN PVOID DeviceExtension,
411  IN PVOID Buffer,
412  IN PVOID DataMask,
413  IN ULONG ConfigDataOffset,
415  );
416 
417 
418 #pragma pack(1)
419 typedef struct _PCIIDE_CONFIG_HEADER {
420 
421  USHORT VendorID; // (ro)
422  USHORT DeviceID; // (ro)
423 
424  //
425  // Command
426  //
427  union {
428 
429  struct {
430 
431  USHORT IoAccessEnable:1; // Device control
442  } b;
443 
445 
446  } Command;
447 
448 
450  UCHAR RevisionID; // (ro)
451 
452  //
453  // Program Interface
454  //
461 
462  UCHAR SubClass; // (ro)
463  UCHAR BaseClass; // (ro)
465  UCHAR LatencyTimer; // (ro+)
466  UCHAR HeaderType; // (ro)
467  UCHAR BIST; // Built in self test
468 
469  struct _PCI_HEADER_TYPE_0 type0;
470 
472 #pragma pack()
473 
474 //
475 // Debug Print
476 //
477 #if DBG
478 
479 VOID
481  _In_ ULONG DebugPrintLevel,
482  _In_z_ _Printf_format_string_ PCCHAR DebugMessage,
483  ...
484  );
485 
486 #define PciIdeXDebugPrint(x) PciIdeXDebugPrint x
487 
488 #else
489 
490 #define PciIdeXDebugPrint(x)
491 
492 #endif // DBG
493 
494 #endif // ___ide_h___
495 
USHORT BufferSectorSize
Definition: hwide.h:185
PCIIDE_CHANNEL_ENABLED PciIdeChannelEnabled
Definition: ide.h:326
NTSTATUS(* PCIIDE_TRANSFER_MODE_SELECT_FUNC)(IN PVOID DeviceExtension, IN OUT PPCIIDE_TRANSFER_MODE_SELECT TransferModeSelect)
Definition: ide.h:282
ULONG BestPioCycleTime[MAX_IDE_DEVICE *MAX_IDE_LINE]
Definition: ide.h:209
USHORT CommandSetActive
Definition: ide.h:87
USHORT Reserved1
Definition: hwide.h:177
struct _PCIIDE_TRANSFER_MODE_SELECT * PPCIIDE_TRANSFER_MODE_SELECT
UCHAR ProgIfReserved
Definition: ide.h:459
#define IN
Definition: typedefs.h:39
NTSTATUS(* PCONTROLLER_PROPERTIES)(IN PVOID DeviceExtension, IN PIDE_CONTROLLER_PROPERTIES ControllerProperties)
Definition: ide.h:377
_Must_inspect_result_ _In_ WDFDEVICE _In_ DEVICE_REGISTRY_PROPERTY _In_ ULONG BufferLength
Definition: wdfdevice.h:3767
UCHAR Chan0OpMode
Definition: ide.h:455
USHORT UltraDMAActive
Definition: atapi.h:832
USHORT SpecialCycle
Definition: ide.h:434
IDE_CHANNEL_STATE
Definition: ide.h:259
USHORT BufferType
Definition: hwide.h:184
USHORT MinimumPIOCycleTimeIORDY
Definition: hwide.h:223
NTSTATUS NTAPI PciIdeGetControllerProperties(IN PVOID DeviceExtension, OUT PIDE_CONTROLLER_PROPERTIES ControllerProperties)
Definition: pciide.c:87
UCHAR VendorUnique3
Definition: hwide.h:202
USHORT SystemErrorEnable
Definition: ide.h:439
USHORT Reserved7[151]
Definition: hwide.h:281
ULONG DeviceTransferModeSupported[MAX_IDE_DEVICE *MAX_IDE_LINE]
Definition: ide.h:203
NTSTATUS(* PCIIDE_UDMA_MODES_SUPPORTED)(IDENTIFY_DATA IdentifyData, PULONG BestXferMode, PULONG CurrentMode)
Definition: ide.h:295
#define MAX_IDE_LINE
Definition: ide.h:25
USHORT Reserved4
Definition: hwide.h:219
union _PCIIDE_CONFIG_HEADER::@1296 Command
UCHAR LatencyTimer
Definition: ide.h:465
BOOLEAN AlwaysClearBusMasterInterrupt
Definition: ide.h:350
LONG NTSTATUS
Definition: precomp.h:26
_Must_inspect_result_ _In_ PDRIVER_OBJECT _In_ PCUNICODE_STRING RegistryPath
Definition: wdfdriver.h:213
struct _IDE_CONTROLLER_PROPERTIES IDE_CONTROLLER_PROPERTIES
USHORT MultiWordDMAActive
Definition: hwide.h:217
struct _PCIIDE_CONFIG_HEADER::@1296::@1297 b
UCHAR HeaderType
Definition: ide.h:466
USHORT DeviceID
Definition: ide.h:422
ULONG(* PCIIDE_USEDMA_FUNC)(IN PVOID deviceExtension, IN PVOID cdbCmd, IN UCHAR targetID)
Definition: ide.h:288
USHORT Reserved8
Definition: ide.h:95
struct _PCIIDE_TRANSFER_MODE_SELECT PCIIDE_TRANSFER_MODE_SELECT
ULONG BestMwDmaCycleTime[MAX_IDE_DEVICE *MAX_IDE_LINE]
Definition: ide.h:211
USHORT MinorRevision
Definition: hwide.h:235
UCHAR Chan0Programmable
Definition: ide.h:456
USHORT NumCylinders
Definition: ide.h:41
BOOLEAN(* PCIIDE_SYNC_ACCESS_REQUIRED)(IN PVOID DeviceExtension)
Definition: ide.h:277
USHORT SingleWordDMASupport
Definition: hwide.h:214
USHORT MinimumMWXferCycleTime
Definition: hwide.h:220
USHORT Reserved2
Definition: hwide.h:201
USHORT MemAccessEnable
Definition: ide.h:432
USHORT IoAccessEnable
Definition: ide.h:431
USHORT SingleWordDMAActive
Definition: hwide.h:215
ULONG UserAddressableSectors
Definition: hwide.h:213
PCIIDE_TRANSFER_MODE_SELECT_FUNC PciIdeTransferModeSelect
Definition: ide.h:338
USHORT LastLun
Definition: ide.h:94
USHORT NumSectorsPerTrack
Definition: ide.h:46
USHORT Reserved11[128]
Definition: ide.h:100
UCHAR PioCycleTimingMode
Definition: hwide.h:203
ULONG AlignmentRequirement
Definition: ide.h:362
USHORT TranslationFieldsValid
Definition: hwide.h:206
USHORT MemWriteInvalidateEnable
Definition: ide.h:435
USHORT FirmwareRevision[4]
Definition: hwide.h:187
USHORT AdvancedPIOModes
Definition: hwide.h:218
unsigned char BOOLEAN
NTSTATUS PciIdeXInitialize(IN PDRIVER_OBJECT DriverObject, IN PUNICODE_STRING RegistryPath, IN PCONTROLLER_PROPERTIES PciIdeGetControllerProperties, IN ULONG ExtensionSize)
Definition: miniport.c:123
USHORT NumberOfCurrentHeads
Definition: hwide.h:209
Definition: bufpool.h:45
USHORT VgaPaletteSnoopEnable
Definition: ide.h:436
BOOLEAN IgnoreActiveBitForAtaDevice
Definition: ide.h:344
UCHAR DmaCycleTimingMode
Definition: hwide.h:205
BOOLEAN DevicePresent[MAX_IDE_DEVICE *MAX_IDE_LINE]
Definition: ide.h:188
USHORT CurrentSectorsPerTrack
Definition: hwide.h:210
UCHAR VendorUnique2
Definition: hwide.h:190
USHORT FastBackToBackEnable
Definition: ide.h:440
#define MAX_IDE_CHANNEL
Definition: ide.h:26
_Must_inspect_result_ _In_ PDRIVER_OBJECT DriverObject
Definition: wdfdriver.h:213
PCIIDE_USEDMA_FUNC PciIdeUseDma
Definition: ide.h:356
BOOLEAN IoReadySupported[MAX_IDE_DEVICE *MAX_IDE_LINE]
Definition: ide.h:198
PCIIDE_SYNC_ACCESS_REQUIRED PciIdeSyncAccessRequired
Definition: ide.h:332
ULONG BestSwDmaCycleTime[MAX_IDE_DEVICE *MAX_IDE_LINE]
Definition: ide.h:210
struct _IDENTIFY_DATA IDENTIFY_DATA
ULONG DeviceTransferModeCurrent[MAX_IDE_DEVICE *MAX_IDE_LINE]
Definition: ide.h:217
USHORT Reserved6[13]
Definition: hwide.h:279
USHORT MasterEnable
Definition: ide.h:433
USHORT ParityErrorResponse
Definition: ide.h:437
USHORT MultiWordDMASupport
Definition: hwide.h:216
USHORT SerialNumber[10]
Definition: hwide.h:183
struct _IDE_CONTROLLER_PROPERTIES * PIDE_CONTROLLER_PROPERTIES
USHORT DoubleWordIo
Definition: hwide.h:191
USHORT NumHeads
Definition: ide.h:43
ULONG UserChoiceTransferMode[MAX_IDE_DEVICE *MAX_IDE_LINE]
Definition: ide.h:223
ULONG Max48BitLBA[2]
Definition: ide.h:92
UCHAR CacheLineSize
Definition: ide.h:464
NTSTATUS PciIdeXGetBusData(IN PVOID DeviceExtension, IN PVOID Buffer, IN ULONG ConfigDataOffset, IN ULONG BufferLength)
Definition: miniport.c:159
USHORT MediaStatusNotification
Definition: ide.h:96
USHORT MajorRevision
Definition: hwide.h:234
USHORT Reserved9
Definition: ide.h:97
UCHAR RevisionID
Definition: ide.h:450
unsigned char UCHAR
Definition: xmlstorage.h:181
IDENTIFY_DATA IdentifyData[MAX_IDE_DEVICE]
Definition: ide.h:234
UCHAR Chan1Programmable
Definition: ide.h:458
USHORT Reserved10
Definition: ide.h:99
IDE_CHANNEL_STATE(* PCIIDE_CHANNEL_ENABLED)(IN PVOID DeviceExtension, IN ULONG Channel)
Definition: ide.h:271
#define NTSTATUS
Definition: precomp.h:20
ULONG CurrentSectorCapacity
Definition: hwide.h:211
UCHAR VendorUnique4
Definition: hwide.h:204
UCHAR MaximumBlockTransfer
Definition: atapi.h:207
USHORT CommandSetSupport
Definition: ide.h:85
struct _PCIIDE_CONFIG_HEADER * PPCIIDE_CONFIG_HEADER
USHORT Capabilities
Definition: atapi.h:210
struct _PCI_HEADER_TYPE_0 type0
Definition: ide.h:469
USHORT Reserved6a[2]
Definition: ide.h:86
USHORT RecommendedMWXferCycleTime
Definition: hwide.h:221
USHORT CurrentMultiSectorSetting
Definition: hwide.h:212
PCIIDE_UDMA_MODES_SUPPORTED PciIdeUdmaModesSupported
Definition: ide.h:369
#define _In_
Definition: no_sal2.h:158
#define PciIdeXDebugPrint(x)
Definition: ide.h:490
USHORT VendorUnique1[3]
Definition: hwide.h:182
USHORT Reserved3
Definition: hwide.h:207
unsigned short USHORT
Definition: pedump.c:61
#define _In_z_
Definition: no_sal2.h:164
ULONG BestUDmaCycleTime[MAX_IDE_DEVICE *MAX_IDE_LINE]
Definition: ide.h:212
USHORT ModelNumber[20]
Definition: hwide.h:188
USHORT Reserved6b
Definition: ide.h:88
unsigned int * PULONG
Definition: retypes.h:1
USHORT NumberOfEccBytes
Definition: hwide.h:186
USHORT UnformattedBytesPerSector
Definition: hwide.h:180
NTSTATUS PciIdeXSetBusData(IN PVOID DeviceExtension, IN PVOID Buffer, IN PVOID DataMask, IN ULONG ConfigDataOffset, IN ULONG BufferLength)
Definition: miniport.c:190
USHORT CommandReserved
Definition: ide.h:441
USHORT Reserved7a[22]
Definition: ide.h:93
USHORT MinimumPIOCycleTime
Definition: hwide.h:222
#define BOOLEAN
Definition: pedump.c:73
#define OUT
Definition: typedefs.h:40
struct _IDENTIFY_DATA * PIDENTIFY_DATA
ULONG DeviceTransferModeSelected[MAX_IDE_DEVICE *MAX_IDE_LINE]
Definition: ide.h:245
unsigned int ULONG
Definition: retypes.h:1
UCHAR Chan1OpMode
Definition: ide.h:457
USHORT UnformattedBytesPerTrack
Definition: hwide.h:179
USHORT NumberOfCurrentCylinders
Definition: hwide.h:208
USHORT DeviceWriteProtect
Definition: ide.h:98
USHORT GeneralConfiguration
Definition: atapi.h:193
struct _PCIIDE_CONFIG_HEADER PCIIDE_CONFIG_HEADER
PULONG TransferModeTimingTable
Definition: ide.h:250
BOOLEAN FixedDisk[MAX_IDE_DEVICE *MAX_IDE_LINE]
Definition: ide.h:193
#define _Printf_format_string_
Definition: no_sal2.h:356
USHORT UltraDMASupport
Definition: atapi.h:831
USHORT VendorID
Definition: ide.h:421
USHORT Reserved5[2]
Definition: hwide.h:224
USHORT WaitCycleEnable
Definition: ide.h:438
ULONG SupportedTransferMode[MAX_IDE_CHANNEL][MAX_IDE_DEVICE]
Definition: ide.h:321
#define MAX_IDE_DEVICE
Definition: ide.h:24