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Classes
struct	_pci_reg_property

Macros
#define	__init

#define	__initdata

#define	SPRN_MSSCR0 0x3f6 /* Memory Subsystem Control Register 0 */

#define	SPRN_MSSSR0 0x3f7 /* Memory Subsystem Status Register 1 */

#define	SPRN_LDSTCR 0x3f8 /* Load/Store control register */

#define	SPRN_LDSTDB 0x3f4 /* */

#define	SPRN_LR 0x008 /* Link Register */

#define	SPRN_PIR 0x3FF /* Processor Identification Register */

#define	SPRN_PTEHI 0x3D5 /* 981 7450 PTE HI word (S/W TLB load) */

#define	SPRN_PTELO 0x3D6 /* 982 7450 PTE LO word (S/W TLB load) */

#define	SPRN_PURR 0x135 /* Processor Utilization of Resources Reg */

#define	SPRN_PVR 0x11F /* Processor Version Register */

#define	SPRN_RPA 0x3D6 /* Required Physical Address Register */

#define	SPRN_SDA 0x3BF /* Sampled Data Address Register */

#define	SPRN_SDR1 0x019 /* MMU Hash Base Register */

#define	SPRN_ASR 0x118 /* Address Space Register */

#define	SPRN_SIA 0x3BB /* Sampled Instruction Address Register */

#define	SPRN_SPRG0 0x110 /* Special Purpose Register General 0 */

#define	SPRN_SPRG1 0x111 /* Special Purpose Register General 1 */

#define	SPRN_SPRG2 0x112 /* Special Purpose Register General 2 */

#define	SPRN_SPRG3 0x113 /* Special Purpose Register General 3 */

#define	SPRN_SPRG4 0x114 /* Special Purpose Register General 4 */

#define	SPRN_SPRG5 0x115 /* Special Purpose Register General 5 */

#define	SPRN_SPRG6 0x116 /* Special Purpose Register General 6 */

#define	SPRN_SPRG7 0x117 /* Special Purpose Register General 7 */

#define	SPRN_SRR0 0x01A /* Save/Restore Register 0 */

#define	SPRN_SRR1 0x01B /* Save/Restore Register 1 */

#define	SPRN_SVR 0x11E /* System Version Register */

#define	SPRN_THRM1 0x3FC /* Thermal Management Register 1 */

#define	PP_RWXX 0 /* Supervisor read/write, User none */

#define	PP_RWRX 1 /* Supervisor read/write, User read */

#define	PP_RWRW 2 /* Supervisor read/write, User read/write */

#define	PP_RXRX 3 /* Supervisor read, User read */

#define	BL_128K 0x000

#define	BL_256K 0x001

#define	BL_512K 0x003

#define	BL_1M 0x007

#define	BL_2M 0x00F

#define	BL_4M 0x01F

#define	BL_8M 0x03F

#define	BL_16M 0x07F

#define	BL_32M 0x0FF

#define	BL_64M 0x1FF

#define	BL_128M 0x3FF

#define	BL_256M 0x7FF

#define	BPP_XX 0x00 /* No access */

#define	BPP_RX 0x01 /* Read only */

#define	BPP_RW 0x02 /* Read/write */

#define	_PAGE_GUARDED 0x001 /* G: page is guarded from prefetch */

#define	_PAGE_FILE 0x001 /* when !present: nonlinear file mapping */

#define	_PAGE_PRESENT 0x002 /* software: PTE contains a translation */

#define	_PAGE_NO_CACHE 0x004 /* I: caching is inhibited */

#define	_PAGE_WRITETHRU 0x008 /* W: caching is write-through */

#define	_PAGE_USER 0x010 /* matches one of the zone permission bits */

#define	_PAGE_RW 0x040 /* software: Writes permitted */

#define	_PAGE_DIRTY 0x080 /* software: dirty page */

#define	_PAGE_HWWRITE 0x100 /* hardware: Dirty & RW, set in exception */

#define	_PAGE_HWEXEC 0x200 /* hardware: EX permission */

#define	_PAGE_ACCESSED 0x400 /* software: R: page referenced */

#define	_PMD_PRESENT 0x400 /* PMD points to page of PTEs */

#define	_PMD_BAD 0x802

#define	_PMD_SIZE 0x0e0 /* size field, != 0 for large-page PMD entry */

#define	_PMD_SIZE_4M 0x0c0

#define	_PMD_SIZE_16M 0x0e0

#define	PMD_PAGE_SIZE(pmdval) (1024 << (((pmdval) & _PMD_SIZE) >> 4))

#define	PVR_VER(pvr) (((pvr) >> 16) & 0xFFFF) /* Version field */

#define	KERNELBASE 0x80000000

Typedefs
typedef unsigned char	__u8

typedef unsigned short	__u16

typedef unsigned int	__u32

typedef struct _pci_reg_property	pci_reg_property

Functions
void	btext_drawstring (const char *c)

void	btext_drawhex (unsigned long v)

void *	ioremap (__u32 phys, __u32 size)

void	iounmap (void *logical)

__u32	GetPVR (void)

Macro Definition Documentation

◆ __init

#define __init

Definition at line 3 of file compat.h.

◆ __initdata

#define __initdata

Definition at line 4 of file compat.h.

◆ _PAGE_ACCESSED

#define _PAGE_ACCESSED 0x400 /* software: R: page referenced */

Definition at line 75 of file compat.h.

◆ _PAGE_DIRTY

#define _PAGE_DIRTY 0x080 /* software: dirty page */

Definition at line 72 of file compat.h.

◆ _PAGE_FILE

#define _PAGE_FILE 0x001 /* when !present: nonlinear file mapping */

Definition at line 66 of file compat.h.

◆ _PAGE_GUARDED

#define _PAGE_GUARDED 0x001 /* G: page is guarded from prefetch */

Definition at line 65 of file compat.h.

◆ _PAGE_HWEXEC

#define _PAGE_HWEXEC 0x200 /* hardware: EX permission */

Definition at line 74 of file compat.h.

◆ _PAGE_HWWRITE

#define _PAGE_HWWRITE 0x100 /* hardware: Dirty & RW, set in exception */

Definition at line 73 of file compat.h.

◆ _PAGE_NO_CACHE

#define _PAGE_NO_CACHE 0x004 /* I: caching is inhibited */

Definition at line 68 of file compat.h.

◆ _PAGE_PRESENT

#define _PAGE_PRESENT 0x002 /* software: PTE contains a translation */

Definition at line 67 of file compat.h.

◆ _PAGE_RW

#define _PAGE_RW 0x040 /* software: Writes permitted */

Definition at line 71 of file compat.h.

◆ _PAGE_USER

#define _PAGE_USER 0x010 /* matches one of the zone permission bits */

Definition at line 70 of file compat.h.

◆ _PAGE_WRITETHRU

#define _PAGE_WRITETHRU 0x008 /* W: caching is write-through */

Definition at line 69 of file compat.h.

◆ _PMD_BAD

#define _PMD_BAD 0x802

Definition at line 78 of file compat.h.

◆ _PMD_PRESENT

#define _PMD_PRESENT 0x400 /* PMD points to page of PTEs */

Definition at line 77 of file compat.h.

◆ _PMD_SIZE

#define _PMD_SIZE 0x0e0 /* size field, != 0 for large-page PMD entry */

Definition at line 79 of file compat.h.

◆ _PMD_SIZE_16M

#define _PMD_SIZE_16M 0x0e0

Definition at line 81 of file compat.h.

◆ _PMD_SIZE_4M

#define _PMD_SIZE_4M 0x0c0

Definition at line 80 of file compat.h.

◆ BL_128K

#define BL_128K 0x000

Definition at line 46 of file compat.h.

◆ BL_128M

#define BL_128M 0x3FF

Definition at line 56 of file compat.h.

◆ BL_16M

#define BL_16M 0x07F

Definition at line 53 of file compat.h.

◆ BL_1M

#define BL_1M 0x007

Definition at line 49 of file compat.h.

◆ BL_256K

#define BL_256K 0x001

Definition at line 47 of file compat.h.

◆ BL_256M

#define BL_256M 0x7FF

Definition at line 57 of file compat.h.

◆ BL_2M

#define BL_2M 0x00F

Definition at line 50 of file compat.h.

◆ BL_32M

#define BL_32M 0x0FF

Definition at line 54 of file compat.h.

◆ BL_4M

#define BL_4M 0x01F

Definition at line 51 of file compat.h.

◆ BL_512K

#define BL_512K 0x003

Definition at line 48 of file compat.h.

◆ BL_64M

#define BL_64M 0x1FF

Definition at line 55 of file compat.h.

◆ BL_8M

#define BL_8M 0x03F

Definition at line 52 of file compat.h.

◆ BPP_RW

#define BPP_RW 0x02 /* Read/write */

Definition at line 62 of file compat.h.

◆ BPP_RX

#define BPP_RX 0x01 /* Read only */

Definition at line 61 of file compat.h.

◆ BPP_XX

#define BPP_XX 0x00 /* No access */

Definition at line 60 of file compat.h.

◆ KERNELBASE

#define KERNELBASE 0x80000000

Definition at line 86 of file compat.h.

◆ PMD_PAGE_SIZE

#define PMD_PAGE_SIZE ( pmdval ) (1024 << (((pmdval) & _PMD_SIZE) >> 4))

Definition at line 82 of file compat.h.

◆ PP_RWRW

#define PP_RWRW 2 /* Supervisor read/write, User read/write */

Definition at line 42 of file compat.h.

◆ PP_RWRX

#define PP_RWRX 1 /* Supervisor read/write, User read */

Definition at line 41 of file compat.h.

◆ PP_RWXX

#define PP_RWXX 0 /* Supervisor read/write, User none */

Definition at line 40 of file compat.h.

◆ PP_RXRX

#define PP_RXRX 3 /* Supervisor read, User read */

Definition at line 43 of file compat.h.

◆ PVR_VER

#define PVR_VER ( pvr ) (((pvr) >> 16) & 0xFFFF) /* Version field */

Definition at line 84 of file compat.h.

◆ SPRN_ASR

#define SPRN_ASR 0x118 /* Address Space Register */

Definition at line 21 of file compat.h.

◆ SPRN_LDSTCR

#define SPRN_LDSTCR 0x3f8 /* Load/Store control register */

Definition at line 8 of file compat.h.

◆ SPRN_LDSTDB

#define SPRN_LDSTDB 0x3f4 /* */

Definition at line 9 of file compat.h.

◆ SPRN_LR

#define SPRN_LR 0x008 /* Link Register */

Definition at line 10 of file compat.h.

◆ SPRN_MSSCR0

#define SPRN_MSSCR0 0x3f6 /* Memory Subsystem Control Register 0 */

Definition at line 6 of file compat.h.

◆ SPRN_MSSSR0

#define SPRN_MSSSR0 0x3f7 /* Memory Subsystem Status Register 1 */

Definition at line 7 of file compat.h.

◆ SPRN_PIR

#define SPRN_PIR 0x3FF /* Processor Identification Register */

Definition at line 12 of file compat.h.

◆ SPRN_PTEHI

#define SPRN_PTEHI 0x3D5 /* 981 7450 PTE HI word (S/W TLB load) */

Definition at line 14 of file compat.h.

◆ SPRN_PTELO

#define SPRN_PTELO 0x3D6 /* 982 7450 PTE LO word (S/W TLB load) */

Definition at line 15 of file compat.h.

◆ SPRN_PURR

#define SPRN_PURR 0x135 /* Processor Utilization of Resources Reg */

Definition at line 16 of file compat.h.

◆ SPRN_PVR

#define SPRN_PVR 0x11F /* Processor Version Register */

Definition at line 17 of file compat.h.

◆ SPRN_RPA

#define SPRN_RPA 0x3D6 /* Required Physical Address Register */

Definition at line 18 of file compat.h.

◆ SPRN_SDA

#define SPRN_SDA 0x3BF /* Sampled Data Address Register */

Definition at line 19 of file compat.h.

◆ SPRN_SDR1

#define SPRN_SDR1 0x019 /* MMU Hash Base Register */

Definition at line 20 of file compat.h.

◆ SPRN_SIA

#define SPRN_SIA 0x3BB /* Sampled Instruction Address Register */

Definition at line 22 of file compat.h.

◆ SPRN_SPRG0

#define SPRN_SPRG0 0x110 /* Special Purpose Register General 0 */

Definition at line 23 of file compat.h.

◆ SPRN_SPRG1

#define SPRN_SPRG1 0x111 /* Special Purpose Register General 1 */

Definition at line 24 of file compat.h.

◆ SPRN_SPRG2

#define SPRN_SPRG2 0x112 /* Special Purpose Register General 2 */

Definition at line 25 of file compat.h.

◆ SPRN_SPRG3

#define SPRN_SPRG3 0x113 /* Special Purpose Register General 3 */

Definition at line 26 of file compat.h.

◆ SPRN_SPRG4

#define SPRN_SPRG4 0x114 /* Special Purpose Register General 4 */

Definition at line 27 of file compat.h.

◆ SPRN_SPRG5

#define SPRN_SPRG5 0x115 /* Special Purpose Register General 5 */

Definition at line 28 of file compat.h.

◆ SPRN_SPRG6

#define SPRN_SPRG6 0x116 /* Special Purpose Register General 6 */

Definition at line 29 of file compat.h.

◆ SPRN_SPRG7

#define SPRN_SPRG7 0x117 /* Special Purpose Register General 7 */

Definition at line 30 of file compat.h.

◆ SPRN_SRR0

#define SPRN_SRR0 0x01A /* Save/Restore Register 0 */

Definition at line 31 of file compat.h.

◆ SPRN_SRR1

#define SPRN_SRR1 0x01B /* Save/Restore Register 1 */

Definition at line 32 of file compat.h.

◆ SPRN_SVR

#define SPRN_SVR 0x11E /* System Version Register */

Definition at line 34 of file compat.h.

◆ SPRN_THRM1

#define SPRN_THRM1 0x3FC /* Thermal Management Register 1 */

Definition at line 36 of file compat.h.

Typedef Documentation

◆ __u16

typedef unsigned short __u16

Definition at line 89 of file compat.h.

◆ __u32

typedef unsigned int __u32

Definition at line 90 of file compat.h.

◆ __u8

typedef unsigned char __u8

Definition at line 88 of file compat.h.

◆ pci_reg_property

typedef struct _pci_reg_property pci_reg_property

Function Documentation

◆ btext_drawhex()

void btext_drawhex ( unsigned long v )

◆ btext_drawstring()

void btext_drawstring ( const char * c )

◆ GetPVR()

__u32 GetPVR ( void )

◆ ioremap()

void* ioremap	(	__u32	phys,
		__u32	size
	)

◆ iounmap()

void iounmap ( void * logical )

Classes

Macros

Typedefs

Functions