ReactOS  0.4.13-dev-922-g2fbff73
bus.h
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1 #pragma once
2 
3 //
4 // Helper Macros
5 //
6 #define PASTE2(x,y) x ## y
7 #define POINTER_TO_(x) PASTE2(P,x)
8 #define READ_FROM(x) PASTE2(READ_PORT_, x)
9 #define WRITE_TO(x) PASTE2(WRITE_PORT_, x)
10 
11 //
12 // Declares a PCI Register Read/Write Routine
13 //
14 #define TYPE_DEFINE(x, y) \
15  ULONG \
16  NTAPI \
17  x( \
18  IN PPCIPBUSDATA BusData, \
19  IN y PciCfg, \
20  IN PUCHAR Buffer, \
21  IN ULONG Offset \
22  )
23 #define TYPE1_DEFINE(x) TYPE_DEFINE(x, PPCI_TYPE1_CFG_BITS);
24 #define TYPE2_DEFINE(x) TYPE_DEFINE(x, PPCI_TYPE2_ADDRESS_BITS);
25 
26 //
27 // Defines a PCI Register Read/Write Type 1 Routine Prologue and Epilogue
28 //
29 #define TYPE1_START(x, y) \
30  TYPE_DEFINE(x, PPCI_TYPE1_CFG_BITS) \
31 { \
32  ULONG i = Offset % sizeof(ULONG); \
33  PciCfg->u.bits.RegisterNumber = Offset / sizeof(ULONG); \
34  WRITE_PORT_ULONG(BusData->Config.Type1.Address, PciCfg->u.AsULONG);
35 #define TYPE1_END(y) \
36  return sizeof(y); }
37 #define TYPE2_END TYPE1_END
38 
39 //
40 // PCI Register Read Type 1 Routine
41 //
42 #define TYPE1_READ(x, y) \
43  TYPE1_START(x, y) \
44  *((POINTER_TO_(y))Buffer) = \
45  READ_FROM(y)((POINTER_TO_(y))(BusData->Config.Type1.Data + i)); \
46  TYPE1_END(y)
47 
48 //
49 // PCI Register Write Type 1 Routine
50 //
51 #define TYPE1_WRITE(x, y) \
52  TYPE1_START(x, y) \
53  WRITE_TO(y)((POINTER_TO_(y))(BusData->Config.Type1.Data + i), \
54  *((POINTER_TO_(y))Buffer)); \
55  TYPE1_END(y)
56 
57 //
58 // Defines a PCI Register Read/Write Type 2 Routine Prologue and Epilogue
59 //
60 #define TYPE2_START(x, y) \
61  TYPE_DEFINE(x, PPCI_TYPE2_ADDRESS_BITS) \
62 { \
63  PciCfg->u.bits.RegisterNumber = (USHORT)Offset;
64 
65 //
66 // PCI Register Read Type 2 Routine
67 //
68 #define TYPE2_READ(x, y) \
69  TYPE2_START(x, y) \
70  *((POINTER_TO_(y))Buffer) = \
71  READ_FROM(y)((POINTER_TO_(y))(ULONG)PciCfg->u.AsUSHORT); \
72  TYPE2_END(y)
73 
74 //
75 // PCI Register Write Type 2 Routine
76 //
77 #define TYPE2_WRITE(x, y) \
78  TYPE2_START(x, y) \
79  WRITE_TO(y)((POINTER_TO_(y))(ULONG)PciCfg->u.AsUSHORT, \
80  *((POINTER_TO_(y))Buffer)); \
81  TYPE2_END(y)
82 
83 typedef struct _PCIPBUSDATA
84 {
86  union
87  {
88  struct
89  {
92  } Type1;
93  struct
94  {
98  } Type2;
99  } Config;
102 
103 typedef ULONG
105  IN PPCIPBUSDATA BusData,
106  IN PVOID State,
107  IN PUCHAR Buffer,
108  IN ULONG Offset
109 );
110 
111 typedef VOID
113  IN PBUS_HANDLER BusHandler,
114  IN PCI_SLOT_NUMBER Slot,
115  IN PKIRQL Irql,
116  IN PVOID State
117 );
118 
119 typedef VOID
121  IN PBUS_HANDLER BusHandler,
122  IN KIRQL Irql
123 );
124 
125 typedef struct _PCI_CONFIG_HANDLER
126 {
132 
134 {
142 
143 /* FUNCTIONS *****************************************************************/
144 
145 VOID
146 NTAPI
148  IN PBUS_HANDLER BusHandler,
149  IN PCI_SLOT_NUMBER Slot,
150  IN PKIRQL Irql,
151  IN PPCI_TYPE1_CFG_BITS PciCfg
152 );
153 
154 VOID
155 NTAPI
157  IN PBUS_HANDLER BusHandler,
158  IN KIRQL Irql
159 );
160 
161 VOID
162 NTAPI
164  IN PBUS_HANDLER BusHandler,
165  IN PCI_SLOT_NUMBER Slot,
166  IN PKIRQL Irql,
168 );
169 
170 VOID
171 NTAPI
173  IN PBUS_HANDLER BusHandler,
174  IN KIRQL Irql
175 );
176 
177 TYPE1_DEFINE(HalpPCIReadUcharType1);
178 TYPE1_DEFINE(HalpPCIReadUshortType1);
179 TYPE1_DEFINE(HalpPCIReadUlongType1);
180 TYPE2_DEFINE(HalpPCIReadUcharType2);
181 TYPE2_DEFINE(HalpPCIReadUshortType2);
182 TYPE2_DEFINE(HalpPCIReadUlongType2);
183 TYPE1_DEFINE(HalpPCIWriteUcharType1);
184 TYPE1_DEFINE(HalpPCIWriteUshortType1);
185 TYPE1_DEFINE(HalpPCIWriteUlongType1);
186 TYPE2_DEFINE(HalpPCIWriteUcharType2);
187 TYPE2_DEFINE(HalpPCIWriteUshortType2);
188 TYPE2_DEFINE(HalpPCIWriteUlongType2);
189 
190 BOOLEAN
191 NTAPI
193  IN PBUS_HANDLER BusHandler,
194  IN PCI_SLOT_NUMBER Slot
195 );
196 
197 VOID
198 NTAPI
200  IN PBUS_HANDLER BusHandler,
201  IN PCI_SLOT_NUMBER Slot,
202  IN PVOID Buffer,
203  IN ULONG Offset,
204  IN ULONG Length
205 );
206 
207 VOID
208 NTAPI
210  IN PBUS_HANDLER BusHandler,
211  IN PCI_SLOT_NUMBER Slot,
212  IN PVOID Buffer,
213  IN ULONG Offset,
214  IN ULONG Length
215 );
216 
217 ULONG
218 NTAPI
223  PKIRQL Irql,
225 );
226 
227 ULONG
228 NTAPI
232  IN PVOID Buffer,
233  IN ULONG Length
234 );
235 
236 ULONG
237 NTAPI
241  IN PVOID Buffer,
242  IN ULONG Length
243 );
244 
245 ULONG
246 NTAPI
248  IN PBUS_HANDLER BusHandler,
249  IN PBUS_HANDLER RootBusHandler,
251  IN PUCHAR Buffer,
252  IN ULONG Offset,
253  IN ULONG Length
254 );
255 
256 ULONG
257 NTAPI
259  IN PBUS_HANDLER BusHandler,
260  IN PBUS_HANDLER RootBusHandler,
262  IN PUCHAR Buffer,
263  IN ULONG Offset,
264  IN ULONG Length
265 );
266 
267 NTSTATUS
268 NTAPI
270  IN PBUS_HANDLER BusHandler,
271  IN PBUS_HANDLER RootHandler,
276  IN ULONG Slot,
277  IN OUT PCM_RESOURCE_LIST *pAllocatedResources
278 );
279 
280 VOID
281 NTAPI
283  VOID
284 );
285 
286 extern ULONG HalpBusType;
290 
291 /* EOF */
struct _PCI_REGISTRY_INFO_INTERNAL PCI_REGISTRY_INFO_INTERNAL
_In_ ULONG _In_ ULONG BusInterruptLevel
Definition: halfuncs.h:170
#define IN
Definition: typedefs.h:38
ULONG HalpMaxPciBus
Definition: pci.c:18
ULONG Data
Definition: bus.h:91
struct _PCI_CONFIG_HANDLER PCI_CONFIG_HANDLER
ULONG MaxDevice
Definition: bus.h:100
ULONG Base
Definition: bus.h:97
#define TYPE1_DEFINE(x)
Definition: bus.h:23
#define ANYSIZE_ARRAY
Definition: typedefs.h:45
struct _PCIPBUSDATA::@1403::@1405 Type2
unsigned char * PUCHAR
Definition: retypes.h:3
VOID NTAPI HalpPCISynchronizeType1(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PKIRQL Irql, IN PPCI_TYPE1_CFG_BITS PciCfg)
Definition: pci.c:114
BOOLEAN NTAPI HalpValidPCISlot(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot)
Definition: pci.c:302
LONG NTSTATUS
Definition: precomp.h:26
ULONG NTAPI HalpGetSystemInterruptVector(ULONG BusNumber, ULONG BusInterruptLevel, ULONG BusInterruptVector, PKIRQL Irql, PKAFFINITY Affinity)
PUCHAR Forward
Definition: bus.h:96
PUCHAR CSE
Definition: bus.h:95
ULONG NTAPI HalpSetPCIData(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootBusHandler, IN PCI_SLOT_NUMBER SlotNumber, IN PUCHAR Buffer, IN ULONG Offset, IN ULONG Length)
Definition: pci.c:409
_In_ ULONG _In_ ULONG _In_ ULONG BusInterruptVector
Definition: halfuncs.h:170
ULONG HalpBusType
Definition: bus.c:17
_Out_ PKIRQL Irql
Definition: csq.h:179
PCIBUSDATA CommonData
Definition: bus.h:85
BOOLEAN HalpPCIConfigInitialized
Definition: pci.c:17
_In_opt_ PUNICODE_STRING DriverClassName
Definition: halfuncs.h:156
FncReleaseSync ReleaseSynchronzation
Definition: bus.h:128
ULONG NTAPI HalpSetCmosData(IN ULONG BusNumber, IN ULONG SlotNumber, IN PVOID Buffer, IN ULONG Length)
Definition: cmos.c:99
VOID(NTAPI * FncReleaseSync)(IN PBUS_HANDLER BusHandler, IN KIRQL Irql)
Definition: bus.h:120
FncConfigIO ConfigRead[3]
Definition: bus.h:129
PULONG Address
Definition: bus.h:90
ULONG NTAPI HalpGetCmosData(IN ULONG BusNumber, IN ULONG SlotNumber, IN PVOID Buffer, IN ULONG Length)
Definition: cmos.c:47
UCHAR KIRQL
Definition: env_spec_w32.h:591
VOID(NTAPI * FncSync)(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PKIRQL Irql, IN PVOID State)
Definition: bus.h:112
NTSTATUS(* NTAPI)(IN PFILE_FULL_EA_INFORMATION EaBuffer, IN ULONG EaLength, OUT PULONG ErrorOffset)
Definition: IoEaTest.cpp:117
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
KAFFINITY * PKAFFINITY
Definition: basetsd.h:197
unsigned char BOOLEAN
ULONG NTAPI HalpGetPCIData(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootBusHandler, IN PCI_SLOT_NUMBER SlotNumber, IN PUCHAR Buffer, IN ULONG Offset, IN ULONG Length)
Definition: pci.c:338
static PDRIVER_OBJECT DriverObject
Definition: template.c:42
Definition: bufpool.h:45
_In_opt_ PUNICODE_STRING _In_ PDRIVER_OBJECT _In_ PDEVICE_OBJECT _In_ INTERFACE_TYPE _In_ ULONG BusNumber
Definition: halfuncs.h:156
union _PCIPBUSDATA::@1403 Config
VOID NTAPI HalpReadPCIConfig(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
Definition: pci.c:255
struct _PCIPBUSDATA PCIPBUSDATA
PCI_CARD_DESCRIPTOR CardList[ANYSIZE_ARRAY]
Definition: bus.h:140
BUS_HANDLER HalpFakePciBusHandler
Definition: pci.c:91
_In_ ULONG _In_ ULONG _In_ ULONG _Out_ PKIRQL _Out_ PKAFFINITY Affinity
Definition: halfuncs.h:170
_In_ ULONG _In_ ULONG _In_ ULONG Length
Definition: ntddpcm.h:101
VOID NTAPI HalpInitializePciBus(VOID)
Definition: pci.c:770
VOID NTAPI HalpPCIReleaseSynchronzationType1(IN PBUS_HANDLER BusHandler, IN KIRQL Irql)
Definition: pci.c:133
_In_opt_ PUNICODE_STRING _In_ PDRIVER_OBJECT _In_ PDEVICE_OBJECT _In_ INTERFACE_TYPE _In_ ULONG _In_ ULONG SlotNumber
Definition: halfuncs.h:156
unsigned char UCHAR
Definition: xmlstorage.h:181
struct _PCI_CONFIG_HANDLER * PPCI_CONFIG_HANDLER
#define VOID
Definition: acefi.h:82
KIRQL * PKIRQL
Definition: env_spec_w32.h:592
struct _PCIPBUSDATA::@1403::@1404 Type1
IN PDEVICE_OBJECT DeviceObject
Definition: fatprocs.h:1560
FncSync Synchronize
Definition: bus.h:127
enum State_ State
Definition: pofuncs.h:54
unsigned int * PULONG
Definition: retypes.h:1
#define TYPE2_DEFINE(x)
Definition: bus.h:24
ULONG(NTAPI * FncConfigIO)(IN PPCIPBUSDATA BusData, IN PVOID State, IN PUCHAR Buffer, IN ULONG Offset)
Definition: bus.h:104
ULONG HalpMinPciBus
Definition: pci.c:18
struct _PCI_REGISTRY_INFO_INTERNAL * PPCI_REGISTRY_INFO_INTERNAL
struct _PCIPBUSDATA * PPCIPBUSDATA
VOID NTAPI HalpPCIReleaseSynchronzationType2(IN PBUS_HANDLER BusHandler, IN KIRQL Irql)
Definition: pci.c:190
#define OUT
Definition: typedefs.h:39
unsigned int ULONG
Definition: retypes.h:1
VOID NTAPI HalpWritePCIConfig(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
Definition: pci.c:281
_In_ PUNICODE_STRING RegistryPath
Definition: wmip.h:27
NTSTATUS NTAPI HalpAssignPCISlotResources(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN PUNICODE_STRING RegistryPath, IN PUNICODE_STRING DriverClassName OPTIONAL, IN PDRIVER_OBJECT DriverObject, IN PDEVICE_OBJECT DeviceObject OPTIONAL, IN ULONG Slot, IN OUT PCM_RESOURCE_LIST *pAllocatedResources)
Definition: pci.c:490
IN BOOLEAN OUT PSTR Buffer
Definition: progress.h:34
VOID NTAPI HalpPCISynchronizeType2(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PKIRQL Irql, IN PPCI_TYPE2_ADDRESS_BITS PciCfg)
Definition: pci.c:159
FncConfigIO ConfigWrite[3]
Definition: bus.h:130
PULONG MinorVersion OPTIONAL
Definition: CrossNt.h:68