ReactOS  0.4.14-dev-593-g1793dcc
apic.h
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1 
2 #pragma once
3 
4 #ifdef _M_AMD64
5 #define IOAPIC_BASE 0xFFFFFFFFFFFE1000ULL // checkme
6 #define ZERO_VECTOR 0x00 // IRQL 00
7 #define APC_VECTOR 0x3D // IRQL 01
8 #define APIC_SPURIOUS_VECTOR 0x3f
9 #define DISPATCH_VECTOR 0x41 // IRQL 02
10 #define APIC_GENERIC_VECTOR 0xC1 // IRQL 27
11 #define APIC_CLOCK_VECTOR 0xD1 // IRQL 28
12 #define APIC_SYNCH_VECTOR 0xD1 // IRQL 28
13 #define APIC_IPI_VECTOR 0xE1 // IRQL 29
14 #define APIC_ERROR_VECTOR 0xE3
15 #define POWERFAIL_VECTOR 0xEF // IRQL 30
16 #define APIC_PROFILE_VECTOR 0xFD // IRQL 31
17 #define APIC_NMI_VECTOR 0xFF
18 #define IrqlToTpr(Irql) (Irql << 4)
19 #define IrqlToSoftVector(Irql) ((Irql << 4)|0xf)
20 #define TprToIrql(Tpr) ((KIRQL)(Tpr >> 4))
21 #define CLOCK2_LEVEL CLOCK_LEVEL
22 #else
23 #define IOAPIC_BASE 0xFFFE1000 // checkme
24 #define ZERO_VECTOR 0x00 // IRQL 00
25 #define APIC_SPURIOUS_VECTOR 0x1f
26 #define APC_VECTOR 0x3D // IRQL 01
27 #define DISPATCH_VECTOR 0x41 // IRQL 02
28 #define APIC_GENERIC_VECTOR 0xC1 // IRQL 27
29 #define APIC_CLOCK_VECTOR 0xD1 // IRQL 28
30 #define APIC_SYNCH_VECTOR 0xD1 // IRQL 28
31 #define APIC_IPI_VECTOR 0xE1 // IRQL 29
32 #define APIC_ERROR_VECTOR 0xE3
33 #define POWERFAIL_VECTOR 0xEF // IRQL 30
34 #define APIC_PROFILE_VECTOR 0xFD // IRQL 31
35 #define APIC_NMI_VECTOR 0xFF
36 #define IrqlToTpr(Irql) (HalpIRQLtoTPR[Irql])
37 #define IrqlToSoftVector(Irql) IrqlToTpr(Irql)
38 #define TprToIrql(Tpr) (HalVectorToIRQL[Tpr >> 4])
39 #endif
40 
41 #define MSR_APIC_BASE 0x0000001B
42 #define IOAPIC_PHYS_BASE 0xFEC00000
43 #define APIC_CLOCK_INDEX 8
44 
45 #define ApicLogicalId(Cpu) ((UCHAR)(1<< Cpu))
46 
47 /* APIC Register Address Map */
48 #define APIC_ID 0x0020 /* Local APIC ID Register (R/W) */
49 #define APIC_VER 0x0030 /* Local APIC Version Register (R) */
50 #define APIC_TPR 0x0080 /* Task Priority Register (R/W) */
51 #define APIC_APR 0x0090 /* Arbitration Priority Register (R) */
52 #define APIC_PPR 0x00A0 /* Processor Priority Register (R) */
53 #define APIC_EOI 0x00B0 /* EOI Register (W) */
54 #define APIC_RRR 0x00C0 /* Remote Read Register () */
55 #define APIC_LDR 0x00D0 /* Logical Destination Register (R/W) */
56 #define APIC_DFR 0x00E0 /* Destination Format Register (0-27 R, 28-31 R/W) */
57 #define APIC_SIVR 0x00F0 /* Spurious Interrupt Vector Register (0-3 R, 4-9 R/W) */
58 #define APIC_ISR 0x0100 /* Interrupt Service Register 0-255 (R) */
59 #define APIC_TMR 0x0180 /* Trigger Mode Register 0-255 (R) */
60 #define APIC_IRR 0x0200 /* Interrupt Request Register 0-255 (r) */
61 #define APIC_ESR 0x0280 /* Error Status Register (R) */
62 #define APIC_ICR0 0x0300 /* Interrupt Command Register 0-31 (R/W) */
63 #define APIC_ICR1 0x0310 /* Interrupt Command Register 32-63 (R/W) */
64 #define APIC_TMRLVTR 0x0320 /* Timer Local Vector Table (R/W) */
65 #define APIC_THRMLVTR 0x0330 /* Thermal Local Vector Table */
66 #define APIC_PCLVTR 0x0340 /* Performance Counter Local Vector Table (R/W) */
67 #define APIC_LINT0 0x0350 /* LINT0 Local Vector Table (R/W) */
68 #define APIC_LINT1 0x0360 /* LINT1 Local Vector Table (R/W) */
69 #define APIC_ERRLVTR 0x0370 /* Error Local Vector Table (R/W) */
70 #define APIC_TICR 0x0380 /* Initial Count Register for Timer (R/W) */
71 #define APIC_TCCR 0x0390 /* Current Count Register for Timer (R) */
72 #define APIC_TDCR 0x03E0 /* Timer Divide Configuration Register (R/W) */
73 #define APIC_EAFR 0x0400 /* extended APIC Feature register (R/W) */
74 #define APIC_EACR 0x0410 /* Extended APIC Control Register (R/W) */
75 #define APIC_SEOI 0x0420 /* Specific End Of Interrupt Register (W) */
76 #define APIC_EXT0LVTR 0x0500 /* Extended Interrupt 0 Local Vector Table */
77 #define APIC_EXT1LVTR 0x0510 /* Extended Interrupt 1 Local Vector Table */
78 #define APIC_EXT2LVTR 0x0520 /* Extended Interrupt 2 Local Vector Table */
79 #define APIC_EXT3LVTR 0x0530 /* Extended Interrupt 3 Local Vector Table */
80 
81 enum
82 {
91 };
92 
93 enum
94 {
97 };
98 
99 enum
100 {
103 };
104 
105 enum
106 {
111 };
112 
113 enum
114 {
115  APIC_DF_Flat = 0xFFFFFFFF,
116  APIC_DF_Cluster = 0x0FFFFFFF
117 };
118 
119 enum
120 {
129 };
130 
131 
133 {
135  struct
136  {
143  };
145 
147 {
149  struct
150  {
155  };
157 
158 typedef union
159 {
161  struct
162  {
168  };
170 
171 typedef union
172 {
174  struct
175  {
180  };
182 
184 {
186  struct
187  {
190  };
191  struct
192  {
204  };
206 
207 typedef union
208 {
210  struct
211  {
222  };
223 } LVT_REGISTER;
224 
225 
226 enum
227 {
230 };
231 
232 enum
233 {
234  IOAPIC_ID = 0x00,
235  IOAPIC_VER = 0x01,
236  IOAPIC_ARB = 0x02,
238 };
239 
241 {
243  struct
244  {
247  };
248  struct
249  {
260  };
262 
264 ULONG
266 {
267  return *(volatile ULONG *)(APIC_BASE + Offset);
268 }
269 
271 VOID
273 {
274  *(volatile ULONG *)(APIC_BASE + Offset) = Value;
275 }
276 
277 VOID
278 NTAPI
280 
281 VOID
282 NTAPI
284 
286 
_In_opt_ ULONG _Out_ PULONG Value
Definition: rtlfuncs.h:2343
union _APIC_COMMAND_REGISTER APIC_COMMAND_REGISTER
ULONGLONG Level
Definition: apic.h:198
ULONG Long
Definition: apic.h:209
ULONGLONG DestinationMode
Definition: apic.h:252
ULONGLONG TriggerMode
Definition: apic.h:199
#define __cdecl
Definition: accygwin.h:79
ULONG TriggerMode
Definition: apic.h:218
ULONG Vector
Definition: apic.h:212
ULONGLONG DeliveryStatus
Definition: apic.h:196
ULONG RemoteIRR
Definition: apic.h:217
#define APIC_BASE
Definition: mboot.c:45
ULONGLONG Destination
Definition: apic.h:203
ULONGLONG LongLong
Definition: apic.h:185
ULONGLONG DeliveryStatus
Definition: apic.h:253
NTSTATUS(* NTAPI)(IN PFILE_FULL_EA_INFORMATION EaBuffer, IN ULONG EaLength, OUT PULONG ErrorOffset)
Definition: IoEaTest.cpp:117
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
ULONGLONG ReservedMBZ
Definition: apic.h:197
ULONG Reserved2MBZ
Definition: apic.h:221
ULONG ExtRegSpacePresent
Definition: apic.h:167
ULONGLONG Reserved2MBZ
Definition: apic.h:202
VOID __cdecl ApicSpuriousService(VOID)
#define FORCEINLINE
Definition: ntbasedef.h:221
ULONG ReservedMBZ1
Definition: apic.h:166
ULONGLONG DestinationShortHand
Definition: apic.h:201
union _APIC_BASE_ADRESS_REGISTER APIC_BASE_ADRESS_REGISTER
union _IOAPIC_REDIRECTION_REGISTER IOAPIC_REDIRECTION_REGISTER
ULONGLONG Vector
Definition: apic.h:193
uint64_t ULONGLONG
Definition: typedefs.h:65
FORCEINLINE VOID ApicWrite(ULONG Offset, ULONG Value)
Definition: apic.h:272
ULONG MessageType
Definition: apic.h:213
ULONG Mask
Definition: apic.h:219
ULONG ReservedMBZ
Definition: apic.h:214
unsigned __int64 ULONG64
Definition: imports.h:198
ULONG DeliveryStatus
Definition: apic.h:215
ULONG Reserved1MBZ
Definition: apic.h:216
ULONGLONG DestinationMode
Definition: apic.h:195
ULONG TimerMode
Definition: apic.h:220
union _APIC_SPURIOUS_INERRUPT_REGISTER APIC_SPURIOUS_INERRUPT_REGISTER
ULONGLONG RemoteReadStatus
Definition: apic.h:200
ULONGLONG MessageType
Definition: apic.h:194
ULONG64 BootStrapCPUCore
Definition: apic.h:138
unsigned int ULONG
Definition: retypes.h:1
VOID NTAPI ApicInitializeTimer(ULONG Cpu)
Definition: apictimer.c:51
VOID NTAPI HalInitializeProfiling(VOID)
Definition: apictimer.c:70
FORCEINLINE ULONG ApicRead(ULONG Offset)
Definition: apic.h:265