ReactOS  0.4.15-dev-2350-g7194f2f
bus.h
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1 #pragma once
2 
3 #define PCI_ADDRESS_MEMORY_SPACE 0x00000000
4 
5 //
6 // Helper Macros
7 //
8 #define PASTE2(x,y) x ## y
9 #define POINTER_TO_(x) PASTE2(P,x)
10 #define READ_FROM(x) PASTE2(READ_PORT_, x)
11 #define WRITE_TO(x) PASTE2(WRITE_PORT_, x)
12 
13 //
14 // Declares a PCI Register Read/Write Routine
15 //
16 #define TYPE_DEFINE(x, y) \
17  ULONG \
18  NTAPI \
19  x( \
20  IN PPCIPBUSDATA BusData, \
21  IN y PciCfg, \
22  IN PUCHAR Buffer, \
23  IN ULONG Offset \
24  )
25 #define TYPE1_DEFINE(x) TYPE_DEFINE(x, PPCI_TYPE1_CFG_BITS);
26 #define TYPE2_DEFINE(x) TYPE_DEFINE(x, PPCI_TYPE2_ADDRESS_BITS);
27 
28 //
29 // Defines a PCI Register Read/Write Type 1 Routine Prologue and Epilogue
30 //
31 #define TYPE1_START(x, y) \
32  TYPE_DEFINE(x, PPCI_TYPE1_CFG_BITS) \
33 { \
34  ULONG i = Offset % sizeof(ULONG); \
35  PciCfg->u.bits.RegisterNumber = Offset / sizeof(ULONG); \
36  WRITE_PORT_ULONG(BusData->Config.Type1.Address, PciCfg->u.AsULONG);
37 #define TYPE1_END(y) \
38  return sizeof(y); }
39 #define TYPE2_END TYPE1_END
40 
41 //
42 // PCI Register Read Type 1 Routine
43 //
44 #define TYPE1_READ(x, y) \
45  TYPE1_START(x, y) \
46  *((POINTER_TO_(y))Buffer) = \
47  READ_FROM(y)((POINTER_TO_(y))(ULONG_PTR)(BusData->Config.Type1.Data + i)); \
48  TYPE1_END(y)
49 
50 //
51 // PCI Register Write Type 1 Routine
52 //
53 #define TYPE1_WRITE(x, y) \
54  TYPE1_START(x, y) \
55  WRITE_TO(y)((POINTER_TO_(y))(ULONG_PTR)(BusData->Config.Type1.Data + i), \
56  *((POINTER_TO_(y))Buffer)); \
57  TYPE1_END(y)
58 
59 //
60 // Defines a PCI Register Read/Write Type 2 Routine Prologue and Epilogue
61 //
62 #define TYPE2_START(x, y) \
63  TYPE_DEFINE(x, PPCI_TYPE2_ADDRESS_BITS) \
64 { \
65  PciCfg->u.bits.RegisterNumber = (USHORT)Offset;
66 
67 //
68 // PCI Register Read Type 2 Routine
69 //
70 #define TYPE2_READ(x, y) \
71  TYPE2_START(x, y) \
72  *((POINTER_TO_(y))Buffer) = \
73  READ_FROM(y)((POINTER_TO_(y))(ULONG_PTR)PciCfg->u.AsUSHORT); \
74  TYPE2_END(y)
75 
76 //
77 // PCI Register Write Type 2 Routine
78 //
79 #define TYPE2_WRITE(x, y) \
80  TYPE2_START(x, y) \
81  WRITE_TO(y)((POINTER_TO_(y))(ULONG_PTR)PciCfg->u.AsUSHORT, \
82  *((POINTER_TO_(y))Buffer)); \
83  TYPE2_END(y)
84 
85 typedef NTSTATUS
87  IN PBUS_HANDLER BusHandler,
88  IN PBUS_HANDLER RootHandler,
89  IN PCI_SLOT_NUMBER PciSlot,
91 );
92 
93 typedef struct _PCIPBUSDATA
94 {
96  union
97  {
98  struct
99  {
100  PULONG Address;
101  ULONG Data;
102  } Type1;
103  struct
104  {
105  PUCHAR CSE;
106  PUCHAR Forward;
107  ULONG Base;
108  } Type2;
109  } Config;
120 
121 typedef ULONG
123  IN PPCIPBUSDATA BusData,
124  IN PVOID State,
125  IN PUCHAR Buffer,
126  IN ULONG Offset
127 );
128 
129 typedef VOID
131  IN PBUS_HANDLER BusHandler,
132  IN PCI_SLOT_NUMBER Slot,
133  IN PKIRQL Irql,
134  IN PVOID State
135 );
136 
137 typedef VOID
139  IN PBUS_HANDLER BusHandler,
140  IN KIRQL Irql
141 );
142 
143 typedef struct _PCI_CONFIG_HANDLER
144 {
150 
151 typedef struct _PCI_REGISTRY_INFO_INTERNAL
152 {
155  UCHAR NoBuses; // Number Of Buses
160 
161 //
162 // PCI Type 1 Ports
163 //
164 #define PCI_TYPE1_ADDRESS_PORT (PULONG)0xCF8
165 #define PCI_TYPE1_DATA_PORT 0xCFC
166 
167 //
168 // PCI Type 2 Ports
169 //
170 #define PCI_TYPE2_CSE_PORT (PUCHAR)0xCF8
171 #define PCI_TYPE2_FORWARD_PORT (PUCHAR)0xCFA
172 #define PCI_TYPE2_ADDRESS_BASE 0xC
173 
174 //
175 // PCI Type 1 Configuration Register
176 //
177 typedef struct _PCI_TYPE1_CFG_BITS
178 {
179  union
180  {
181  struct
182  {
190  } bits;
191 
193  } u;
195 
196 //
197 // PCI Type 2 CSE Register
198 //
199 typedef struct _PCI_TYPE2_CSE_BITS
200 {
201  union
202  {
203  struct
204  {
208  } bits;
209 
211  } u;
213 
214 //
215 // PCI Type 2 Address Register
216 //
218 {
219  union
220  {
221  struct
222  {
226  } bits;
227 
229  } u;
231 
233 {
234  union
235  {
236  struct
237  {
242  } bits;
244  } u;
246 
248 {
249  union
250  {
251  struct
252  {
259  } bits;
261  } u;
263 
264 typedef struct _ARRAY
265 {
268 } ARRAY, *PARRAY;
269 
270 typedef struct _HAL_BUS_HANDLER
271 {
276 
277 /* FUNCTIONS *****************************************************************/
278 
279 /* SHARED (Fake PCI-BUS HANDLER) */
280 
284 
286 NTAPI
288  VOID
289 );
290 
291 VOID
292 NTAPI
294  IN PBUS_HANDLER BusHandler,
295  IN PCI_SLOT_NUMBER Slot,
296  IN PKIRQL Irql,
297  IN PPCI_TYPE1_CFG_BITS PciCfg
298 );
299 
300 VOID
301 NTAPI
303  IN PBUS_HANDLER BusHandler,
304  IN KIRQL Irql
305 );
306 
307 VOID
308 NTAPI
310  IN PBUS_HANDLER BusHandler,
311  IN PCI_SLOT_NUMBER Slot,
312  IN PKIRQL Irql,
314 );
315 
316 VOID
317 NTAPI
319  IN PBUS_HANDLER BusHandler,
320  IN KIRQL Irql
321 );
322 
323 TYPE1_DEFINE(HalpPCIReadUcharType1);
324 TYPE1_DEFINE(HalpPCIReadUshortType1);
325 TYPE1_DEFINE(HalpPCIReadUlongType1);
326 TYPE2_DEFINE(HalpPCIReadUcharType2);
327 TYPE2_DEFINE(HalpPCIReadUshortType2);
328 TYPE2_DEFINE(HalpPCIReadUlongType2);
329 TYPE1_DEFINE(HalpPCIWriteUcharType1);
330 TYPE1_DEFINE(HalpPCIWriteUshortType1);
331 TYPE1_DEFINE(HalpPCIWriteUlongType1);
332 TYPE2_DEFINE(HalpPCIWriteUcharType2);
333 TYPE2_DEFINE(HalpPCIWriteUshortType2);
334 TYPE2_DEFINE(HalpPCIWriteUlongType2);
335 
336 BOOLEAN
337 NTAPI
339  IN PBUS_HANDLER BusHandler,
340  IN PCI_SLOT_NUMBER Slot
341 );
342 
343 VOID
344 NTAPI
346  IN PBUS_HANDLER BusHandler,
347  IN PCI_SLOT_NUMBER Slot,
348  IN PVOID Buffer,
349  IN ULONG Offset,
350  IN ULONG Length
351 );
352 
353 VOID
354 NTAPI
356  IN PBUS_HANDLER BusHandler,
357  IN PCI_SLOT_NUMBER Slot,
358  IN PVOID Buffer,
359  IN ULONG Offset,
360  IN ULONG Length
361 );
362 
363 ULONG
364 NTAPI
366  IN PBUS_HANDLER BusHandler,
367  IN PBUS_HANDLER RootBusHandler,
369  IN PVOID Buffer,
370  IN ULONG Offset,
371  IN ULONG Length
372 );
373 
374 ULONG
375 NTAPI
377  IN PBUS_HANDLER BusHandler,
378  IN PBUS_HANDLER RootBusHandler,
380  IN PVOID Buffer,
381  IN ULONG Offset,
382  IN ULONG Length
383 );
384 
385 NTSTATUS
386 NTAPI
388  IN PBUS_HANDLER BusHandler,
389  IN PBUS_HANDLER RootHandler,
394  IN ULONG Slot,
395  IN OUT PCM_RESOURCE_LIST *pAllocatedResources
396 );
397 
398 /* NON-LEGACY */
399 
400 ULONG
401 NTAPI
406  PKIRQL Irql,
408 );
409 
410 ULONG
411 NTAPI
417 );
418 
419 ULONG
420 NTAPI
424  IN PVOID Buffer,
425  IN ULONG Length
426 );
427 
428 VOID
429 NTAPI
431  VOID
432 );
433 
434 VOID
435 NTAPI
437  VOID
438 );
439 
440 BOOLEAN
441 NTAPI
448 );
449 
450 NTSTATUS
451 NTAPI
461 );
462 
463 BOOLEAN
464 NTAPI
470  IN BOOLEAN NextBus
471 );
472 
473 VOID
474 NTAPI
476  VOID
477 );
478 
479 /* LEGACY */
480 
481 BOOLEAN
482 NTAPI
489 );
490 
491 BOOLEAN
492 NTAPI
498  IN BOOLEAN NextBus
499 );
500 
501 NTSTATUS
502 NTAPI
504  IN PBUS_HANDLER RootHandler,
505  IN OUT PIO_RESOURCE_REQUIREMENTS_LIST *pResourceList);
506 
507 ULONG
508 NTAPI
510  IN PBUS_HANDLER RootHandler,
513  OUT PKIRQL Irql,
515 VOID
516 NTAPI
518  IN PBUS_HANDLER RootHandler,
520  IN PPCI_COMMON_CONFIG PciData);
521 
522 VOID
523 NTAPI
525  IN PBUS_HANDLER RootHandler,
527  IN PPCI_COMMON_CONFIG PciNewData,
528  IN PPCI_COMMON_CONFIG PciOldData);
529 
530 NTSTATUS
531 NTAPI
533  IN PBUS_HANDLER RootHandler,
534  IN PCI_SLOT_NUMBER PciSlot,
536 
537 VOID
538 NTAPI
540  VOID
541 );
542 
544 NTAPI
546  IN ULONG_PTR ContextValue
547 );
548 
550 FASTCALL
552  IN BUS_DATA_TYPE ConfigType,
554 );
555 
556 ULONG
557 NTAPI
559  IN PBUS_HANDLER BusHandler,
560  IN PBUS_HANDLER RootHandler,
562  IN PVOID Buffer,
563  IN ULONG Offset,
564  IN ULONG Length
565 );
566 
567 ULONG
568 NTAPI
570  IN PBUS_HANDLER BusHandler,
571  IN PBUS_HANDLER RootHandler,
573  IN PVOID Buffer,
574  IN ULONG Offset,
575  IN ULONG Length
576 );
577 
578 ULONG
579 NTAPI
581  IN PBUS_HANDLER BusHandler,
582  IN PBUS_HANDLER RootHandler,
584  IN PVOID Buffer,
585  IN ULONG Offset,
586  IN ULONG Length
587 );
588 
589 BOOLEAN
590 NTAPI
592  IN PBUS_HANDLER BusHandler,
593  IN PBUS_HANDLER RootHandler,
597 );
598 
599 BOOLEAN
600 NTAPI
602  IN PBUS_HANDLER BusHandler,
603  IN PBUS_HANDLER RootHandler,
607 );
608 
609 ULONG
610 NTAPI
612  IN PBUS_HANDLER BusHandler,
613  IN PBUS_HANDLER RootHandler,
616  OUT PKIRQL Irql,
618 );
619 
620 extern ULONG HalpBusType;
625 
626 /* EOF */
_In_ WDFIORESREQLIST _In_ ULONG SlotNumber
Definition: wdfresource.h:65
struct _PCI_REGISTRY_INFO_INTERNAL PCI_REGISTRY_INFO_INTERNAL
ULONG FunctionNumber
Definition: bus.h:185
_In_ ULONG _In_ ULONG BusInterruptLevel
Definition: halfuncs.h:170
ULONG NTAPI HalpcSetCmosData(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN ULONG SlotNumber, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
Definition: cmosbus.c:34
ULONG Reserved1
Definition: bus.h:183
#define IN
Definition: typedefs.h:39
VOID NTAPI HalpPCIISALine2Pin(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN PCI_SLOT_NUMBER SlotNumber, IN PPCI_COMMON_CONFIG PciNewData, IN PPCI_COMMON_CONFIG PciOldData)
Definition: pcibus.c:563
ULONG HalpMaxPciBus
Definition: pci.c:18
BOOLEAN NTAPI HaliFindBusAddressTranslation(IN PHYSICAL_ADDRESS BusAddress, IN OUT PULONG AddressSpace, OUT PPHYSICAL_ADDRESS TranslatedAddress, IN OUT PULONG_PTR Context, IN BOOLEAN NextBus)
Definition: bussupp.c:1193
ULONG Data
Definition: bus.h:91
BOOLEAN BridgeConfigRead
Definition: bus.h:112
struct _PCI_TYPE2_ADDRESS_BITS PCI_TYPE2_ADDRESS_BITS
_In_ ULONG _In_ PHYSICAL_ADDRESS BusAddress
Definition: iofuncs.h:2268
ULONG NTAPI HalpNoBusData(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN ULONG SlotNumber, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
Definition: bushndlr.c:108
struct _PCI_CONFIG_HANDLER PCI_CONFIG_HANDLER
_In_ ULONG _In_ ULONG _In_ ULONG Length
Definition: ntddpcm.h:101
VOID NTAPI HalpInitBusHandler(VOID)
Definition: bushndlr.c:420
enum _INTERFACE_TYPE INTERFACE_TYPE
ULONG MaxDevice
Definition: bus.h:100
VOID NTAPI HalpPCIPin2ISALine(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN PCI_SLOT_NUMBER SlotNumber, IN PPCI_COMMON_CONFIG PciData)
Definition: pcibus.c:553
UCHAR reserved[1]
Definition: bus.h:115
ULONG Base
Definition: bus.h:97
ULONG NTAPI HalpGetSystemInterruptVector_Acpi(ULONG BusNumber, ULONG BusInterruptLevel, ULONG BusInterruptVector, PKIRQL Irql, PKAFFINITY Affinity)
struct _PCI_TYPE0_CFG_CYCLE_BITS * PPCI_TYPE0_CFG_CYCLE_BITS
#define ANYSIZE_ARRAY
Definition: typedefs.h:46
IN BOOLEAN OUT PSTR Buffer
Definition: progress.h:34
_Inout_opt_ PDEVICE_OBJECT _Inout_opt_ PDEVICE_OBJECT _Inout_opt_ PDEVICE_OBJECT _Inout_opt_ PCM_RESOURCE_LIST * AllocatedResources
Definition: ndis.h:4640
_In_opt_ PUNICODE_STRING _In_ PDRIVER_OBJECT _In_ PDEVICE_OBJECT _In_ INTERFACE_TYPE BusType
Definition: halfuncs.h:156
enum _BUS_DATA_TYPE BUS_DATA_TYPE
_In_ ULONG _In_ PHYSICAL_ADDRESS _Inout_ PULONG AddressSpace
Definition: iofuncs.h:2268
_Must_inspect_result_ _In_ WDFDEVICE _In_ PWDF_INTERRUPT_CONFIG _In_opt_ PWDF_OBJECT_ATTRIBUTES _Out_ WDFINTERRUPT * Interrupt
Definition: wdfinterrupt.h:372
unsigned char * PUCHAR
Definition: retypes.h:3
VOID NTAPI HalpPCISynchronizeType1(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PKIRQL Irql, IN PPCI_TYPE1_CFG_BITS PciCfg)
Definition: pci.c:114
UCHAR Enable
Definition: bus.h:205
BOOLEAN NTAPI HalpValidPCISlot(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot)
Definition: pci.c:302
struct _PCIPBUSDATA::@1433::@1435 Type2
LONG NTSTATUS
Definition: precomp.h:26
struct _PCI_TYPE2_CSE_BITS PCI_TYPE2_CSE_BITS
ULONG NTAPI HalpGetSystemInterruptVector(ULONG BusNumber, ULONG BusInterruptLevel, ULONG BusInterruptVector, PKIRQL Irql, PKAFFINITY Affinity)
_Must_inspect_result_ _In_ PDRIVER_OBJECT _In_ PCUNICODE_STRING RegistryPath
Definition: wdfdriver.h:213
UCHAR ParentBus
Definition: bus.h:113
_In_ ULONG _In_ ULONG State
Definition: potypes.h:516
PUCHAR Forward
Definition: bus.h:96
PUCHAR CSE
Definition: bus.h:95
BOOLEAN NTAPI HalpFindBusAddressTranslation(IN PHYSICAL_ADDRESS BusAddress, IN OUT PULONG AddressSpace, OUT PPHYSICAL_ADDRESS TranslatedAddress, IN OUT PULONG_PTR Context, IN BOOLEAN NextBus)
Definition: bus.c:98
ULONG NTAPI HalpSetPCIData(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootBusHandler, IN PCI_SLOT_NUMBER SlotNumber, IN PUCHAR Buffer, IN ULONG Offset, IN ULONG Length)
Definition: pci.c:409
union _PCIPBUSDATA::@1433 Config
_In_ ULONG _In_ ULONG _In_ ULONG BusInterruptVector
Definition: halfuncs.h:170
ULONG HalpBusType
Definition: bus.c:17
_In_ ULONG _In_ PHYSICAL_ADDRESS _Inout_ PULONG _Out_ PPHYSICAL_ADDRESS TranslatedAddress
Definition: iofuncs.h:2268
#define FASTCALL
Definition: nt_native.h:50
union _PCI_TYPE0_CFG_CYCLE_BITS::@1478 u
_Out_ PKIRQL Irql
Definition: csq.h:179
PCIBUSDATA CommonData
Definition: bus.h:85
BOOLEAN HalpPCIConfigInitialized
Definition: pci.c:17
_In_opt_ PUNICODE_STRING DriverClassName
Definition: halfuncs.h:156
FncReleaseSync ReleaseSynchronzation
Definition: bus.h:128
VOID NTAPI HalpPCIReleaseSynchronizationType2(IN PBUS_HANDLER BusHandler, IN KIRQL Irql)
Definition: pcibus.c:196
ULONG NTAPI HalpSetCmosData(IN ULONG BusNumber, IN ULONG SlotNumber, IN PVOID Buffer, IN ULONG Length)
Definition: cmos.c:99
VOID(NTAPI * FncReleaseSync)(IN PBUS_HANDLER BusHandler, IN KIRQL Irql)
Definition: bus.h:120
FncConfigIO ConfigRead[3]
Definition: bus.h:129
uint32_t ULONG_PTR
Definition: typedefs.h:65
PULONG Address
Definition: bus.h:90
ULONG NTAPI HalpGetCmosData(IN ULONG BusNumber, IN ULONG SlotNumber, IN PVOID Buffer, IN ULONG Length)
Definition: cmos.c:47
#define _Out_writes_bytes_(s)
Definition: no_sal2.h:178
UCHAR KIRQL
Definition: env_spec_w32.h:591
VOID(NTAPI * FncSync)(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PKIRQL Irql, IN PVOID State)
Definition: bus.h:112
ULONG DeviceNumber
Definition: bus.h:186
_In_ PDEVICE_OBJECT DeviceObject
Definition: wdfdevice.h:2055
ULONG NTAPI HalpGetPCIIntOnISABus(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN ULONG BusInterruptLevel, IN ULONG BusInterruptVector, OUT PKIRQL Irql, OUT PKAFFINITY Affinity)
Definition: pcibus.c:532
NTSTATUS(* NTAPI)(IN PFILE_FULL_EA_INFORMATION EaBuffer, IN ULONG EaLength, OUT PULONG ErrorOffset)
Definition: IoEaTest.cpp:117
#define TYPE2_DEFINE(x)
Definition: bus.h:26
union _PCI_TYPE2_ADDRESS_BITS::@1476 u
union _PCI_TYPE2_CSE_BITS::@1474 u
BOOLEAN NTAPI HalpTranslateSystemBusAddress(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN PHYSICAL_ADDRESS BusAddress, IN OUT PULONG AddressSpace, OUT PPHYSICAL_ADDRESS TranslatedAddress)
Definition: sysbus.c:21
NTSTATUS NTAPI HalpAssignSlotResources(IN PUNICODE_STRING RegistryPath, IN PUNICODE_STRING DriverClassName, IN PDRIVER_OBJECT DriverObject, IN PDEVICE_OBJECT DeviceObject, IN INTERFACE_TYPE BusType, IN ULONG BusNumber, IN ULONG SlotNumber, IN OUT PCM_RESOURCE_LIST *AllocatedResources)
Definition: bus.c:39
UCHAR SwizzleIn[4]
Definition: bus.h:116
VOID NTAPI HalpInitializePciStubs(VOID)
Definition: pci.c:674
NTSTATUS NTAPI HalpGetISAFixedPCIIrq(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN PCI_SLOT_NUMBER PciSlot, OUT PSUPPORTED_RANGE *Range)
Definition: pcibus.c:574
struct _PCI_TYPE0_CFG_CYCLE_BITS PCI_TYPE0_CFG_CYCLE_BITS
KAFFINITY * PKAFFINITY
Definition: basetsd.h:197
struct _ARRAY ARRAY
unsigned char BOOLEAN
ULONG NTAPI HalpGetPCIData(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootBusHandler, IN PCI_SLOT_NUMBER SlotNumber, IN PUCHAR Buffer, IN ULONG Offset, IN ULONG Length)
Definition: pci.c:338
VOID NTAPI HalpRegisterPciDebuggingDeviceInfo(VOID)
Definition: pcibus.c:640
Definition: bufpool.h:45
_In_opt_ PUNICODE_STRING _In_ PDRIVER_OBJECT _In_ PDEVICE_OBJECT _In_ INTERFACE_TYPE _In_ ULONG BusNumber
Definition: halfuncs.h:156
BOOLEAN NTAPI HaliTranslateBusAddress(IN INTERFACE_TYPE InterfaceType, IN ULONG BusNumber, IN PHYSICAL_ADDRESS BusAddress, IN OUT PULONG AddressSpace, OUT PPHYSICAL_ADDRESS TranslatedAddress)
Definition: bussupp.c:1267
_Must_inspect_result_ _In_ PDRIVER_OBJECT DriverObject
Definition: wdfdriver.h:213
VOID NTAPI HalpReadPCIConfig(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
Definition: pci.c:255
struct _HAL_BUS_HANDLER HAL_BUS_HANDLER
struct _PCIPBUSDATA PCIPBUSDATA
PBUS_HANDLER FASTCALL HaliReferenceHandlerForConfigSpace(IN BUS_DATA_TYPE ConfigType, IN ULONG BusNumber)
Definition: bushndlr.c:197
PCI_CARD_DESCRIPTOR CardList[ANYSIZE_ARRAY]
Definition: bus.h:140
BUS_HANDLER HalpFakePciBusHandler
Definition: pci.c:91
BOOLEAN NTAPI HalpTranslateIsaBusAddress(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN PHYSICAL_ADDRESS BusAddress, IN OUT PULONG AddressSpace, OUT PPHYSICAL_ADDRESS TranslatedAddress)
Definition: isabus.c:21
struct _HAL_BUS_HANDLER * PHAL_BUS_HANDLER
#define PCI_MAX_DEVICES
Definition: iotypes.h:3597
_In_ ULONG _In_ ULONG _In_ ULONG _Out_ PKIRQL _Out_ PKAFFINITY Affinity
Definition: halfuncs.h:170
struct _PCI_TYPE1_CFG_BITS PCI_TYPE1_CFG_BITS
VOID NTAPI HalpInitializePciBus(VOID)
Definition: pci.c:770
VOID NTAPI HalpPCIReleaseSynchronzationType1(IN PBUS_HANDLER BusHandler, IN KIRQL Irql)
Definition: pci.c:133
struct _PCI_TYPE2_CSE_BITS::@1474::@1475 bits
unsigned char UCHAR
Definition: xmlstorage.h:181
struct _PCI_TYPE1_CFG_BITS * PPCI_TYPE1_CFG_BITS
USHORT RegisterNumber
Definition: bus.h:223
struct _PCI_CONFIG_HANDLER * PPCI_CONFIG_HANDLER
#define NTSTATUS
Definition: precomp.h:20
#define VOID
Definition: acefi.h:82
struct _PCI_TYPE2_ADDRESS_BITS::@1476::@1477 bits
KIRQL * PKIRQL
Definition: env_spec_w32.h:592
NTSTATUS NTAPI HalpAdjustPCIResourceList(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN OUT PIO_RESOURCE_REQUIREMENTS_LIST *pResourceList)
Definition: pcibus.c:675
struct _PCI_TYPE2_ADDRESS_BITS * PPCI_TYPE2_ADDRESS_BITS
Definition: typedefs.h:119
Definition: range.c:39
BOOLEAN NTAPI HalpTranslateBusAddress(IN INTERFACE_TYPE InterfaceType, IN ULONG BusNumber, IN PHYSICAL_ADDRESS BusAddress, IN OUT PULONG AddressSpace, OUT PPHYSICAL_ADDRESS TranslatedAddress)
Definition: bus.c:71
struct _PCIPBUSDATA::@1433::@1434 Type1
struct _PCI_TYPE2_CSE_BITS PPCI_TYPE2_CSE_BITS
#define PCI_MAX_FUNCTION
Definition: iotypes.h:3598
NTSTATUS(NTAPI * PciIrqRange)(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN PCI_SLOT_NUMBER PciSlot, OUT PSUPPORTED_RANGE *Interrupt)
Definition: bus.h:86
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
#define _In_
Definition: no_sal2.h:158
struct _PCI_TYPE1_CFG_CYCLE_BITS PCI_TYPE1_CFG_CYCLE_BITS
FncSync Synchronize
Definition: bus.h:127
ULONG ArraySize
Definition: bus.h:266
BUS_HANDLER Handler
Definition: bus.h:274
struct _ARRAY * PARRAY
ULONG Enable
Definition: bus.h:189
unsigned short USHORT
Definition: pedump.c:61
PVOID Element[ANYSIZE_ARRAY]
Definition: bus.h:267
union _PCI_TYPE1_CFG_CYCLE_BITS::@1480 u
ULONG NTAPI HalpcGetCmosData(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN ULONG SlotNumber, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
Definition: cmosbus.c:21
unsigned int * PULONG
Definition: retypes.h:1
PCI_CONFIG_HANDLER PCIConfigHandlerType1
Definition: pci.c:32
struct _PCI_TYPE1_CFG_CYCLE_BITS * PPCI_TYPE1_CFG_CYCLE_BITS
UCHAR Subtractive
Definition: bus.h:114
ULONG(NTAPI * FncConfigIO)(IN PPCIPBUSDATA BusData, IN PVOID State, IN PUCHAR Buffer, IN ULONG Offset)
Definition: bus.h:104
ULONG HalpMinPciBus
Definition: pci.c:18
PBUS_HANDLER NTAPI HalpContextToBusHandler(IN ULONG_PTR ContextValue)
Definition: bushndlr.c:206
PPCI_REGISTRY_INFO_INTERNAL NTAPI HalpQueryPciRegistryInfo(VOID)
Definition: pci.c:543
struct _PCI_REGISTRY_INFO_INTERNAL * PPCI_REGISTRY_INFO_INTERNAL
Definition: shimeng.h:15
struct _PCIPBUSDATA * PPCIPBUSDATA
struct _PCI_TYPE0_CFG_CYCLE_BITS::@1478::@1479 bits
#define OUT
Definition: typedefs.h:40
PCI_CONFIG_HANDLER PCIConfigHandler
Definition: pci.c:20
UCHAR AsUCHAR
Definition: bus.h:210
#define TYPE1_DEFINE(x)
Definition: bus.h:25
unsigned int ULONG
Definition: retypes.h:1
VOID NTAPI HalpWritePCIConfig(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
Definition: pci.c:281
LIST_ENTRY HalpAllBusHandlers
Definition: bushndlr.c:19
union _PCI_TYPE1_CFG_BITS::@1472 u
uint32_t * PULONG_PTR
Definition: typedefs.h:65
ULONG Reserved2
Definition: bus.h:188
NTSTATUS NTAPI HalpAssignPCISlotResources(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN PUNICODE_STRING RegistryPath, IN PUNICODE_STRING DriverClassName OPTIONAL, IN PDRIVER_OBJECT DriverObject, IN PDEVICE_OBJECT DeviceObject OPTIONAL, IN ULONG Slot, IN OUT PCM_RESOURCE_LIST *pAllocatedResources)
Definition: pci.c:490
RTL_BITMAP DeviceConfigured
Definition: bus.h:117
struct _PCI_TYPE1_CFG_CYCLE_BITS::@1480::@1481 bits
LIST_ENTRY AllHandlers
Definition: bus.h:272
PCI_CONFIG_HANDLER PCIConfigHandlerType2
Definition: pci.c:54
UCHAR FunctionNumber
Definition: bus.h:206
ULONG AsULONG
Definition: bus.h:192
VOID NTAPI HalpPCISynchronizeType2(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PKIRQL Irql, IN PPCI_TYPE2_ADDRESS_BITS PciCfg)
Definition: pci.c:159
PciIrqRange GetIrqRange
Definition: bus.h:111
FncConfigIO ConfigWrite[3]
Definition: bus.h:130
ULONG RegisterNumber
Definition: bus.h:184
ULONG ReferenceCount
Definition: bus.h:273
ULONG BusNumber
Definition: bus.h:187
_Must_inspect_result_ _In_ WDFDEVICE _In_ LPCGUID InterfaceType
Definition: wdffdo.h:461
USHORT AddressBase
Definition: bus.h:225
ULONG ConfiguredBits[PCI_MAX_DEVICES *PCI_MAX_FUNCTION/32]
Definition: bus.h:118
struct _PCI_TYPE1_CFG_BITS::@1472::@1473 bits
PULONG MinorVersion OPTIONAL
Definition: CrossNt.h:68