ReactOS  0.4.14-dev-317-g96040ec
bus.h
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1 #pragma once
2 
3 #define PCI_ADDRESS_MEMORY_SPACE 0x00000000
4 
5 //
6 // Helper Macros
7 //
8 #define PASTE2(x,y) x ## y
9 #define POINTER_TO_(x) PASTE2(P,x)
10 #define READ_FROM(x) PASTE2(READ_PORT_, x)
11 #define WRITE_TO(x) PASTE2(WRITE_PORT_, x)
12 
13 //
14 // Declares a PCI Register Read/Write Routine
15 //
16 #define TYPE_DEFINE(x, y) \
17  ULONG \
18  NTAPI \
19  x( \
20  IN PPCIPBUSDATA BusData, \
21  IN y PciCfg, \
22  IN PUCHAR Buffer, \
23  IN ULONG Offset \
24  )
25 #define TYPE1_DEFINE(x) TYPE_DEFINE(x, PPCI_TYPE1_CFG_BITS);
26 #define TYPE2_DEFINE(x) TYPE_DEFINE(x, PPCI_TYPE2_ADDRESS_BITS);
27 
28 //
29 // Defines a PCI Register Read/Write Type 1 Routine Prologue and Epilogue
30 //
31 #define TYPE1_START(x, y) \
32  TYPE_DEFINE(x, PPCI_TYPE1_CFG_BITS) \
33 { \
34  ULONG i = Offset % sizeof(ULONG); \
35  PciCfg->u.bits.RegisterNumber = Offset / sizeof(ULONG); \
36  WRITE_PORT_ULONG(BusData->Config.Type1.Address, PciCfg->u.AsULONG);
37 #define TYPE1_END(y) \
38  return sizeof(y); }
39 #define TYPE2_END TYPE1_END
40 
41 //
42 // PCI Register Read Type 1 Routine
43 //
44 #define TYPE1_READ(x, y) \
45  TYPE1_START(x, y) \
46  *((POINTER_TO_(y))Buffer) = \
47  READ_FROM(y)((POINTER_TO_(y))(ULONG_PTR)(BusData->Config.Type1.Data + i)); \
48  TYPE1_END(y)
49 
50 //
51 // PCI Register Write Type 1 Routine
52 //
53 #define TYPE1_WRITE(x, y) \
54  TYPE1_START(x, y) \
55  WRITE_TO(y)((POINTER_TO_(y))(ULONG_PTR)(BusData->Config.Type1.Data + i), \
56  *((POINTER_TO_(y))Buffer)); \
57  TYPE1_END(y)
58 
59 //
60 // Defines a PCI Register Read/Write Type 2 Routine Prologue and Epilogue
61 //
62 #define TYPE2_START(x, y) \
63  TYPE_DEFINE(x, PPCI_TYPE2_ADDRESS_BITS) \
64 { \
65  PciCfg->u.bits.RegisterNumber = (USHORT)Offset;
66 
67 //
68 // PCI Register Read Type 2 Routine
69 //
70 #define TYPE2_READ(x, y) \
71  TYPE2_START(x, y) \
72  *((POINTER_TO_(y))Buffer) = \
73  READ_FROM(y)((POINTER_TO_(y))(ULONG_PTR)PciCfg->u.AsUSHORT); \
74  TYPE2_END(y)
75 
76 //
77 // PCI Register Write Type 2 Routine
78 //
79 #define TYPE2_WRITE(x, y) \
80  TYPE2_START(x, y) \
81  WRITE_TO(y)((POINTER_TO_(y))(ULONG_PTR)PciCfg->u.AsUSHORT, \
82  *((POINTER_TO_(y))Buffer)); \
83  TYPE2_END(y)
84 
85 typedef NTSTATUS
87  IN PBUS_HANDLER BusHandler,
88  IN PBUS_HANDLER RootHandler,
89  IN PCI_SLOT_NUMBER PciSlot,
90  OUT PSUPPORTED_RANGE *Interrupt
91 );
92 
93 typedef struct _PCIPBUSDATA
94 {
96  union
97  {
98  struct
99  {
100  PULONG Address;
101  ULONG Data;
102  } Type1;
103  struct
104  {
105  PUCHAR CSE;
106  PUCHAR Forward;
107  ULONG Base;
108  } Type2;
109  } Config;
120 
121 typedef ULONG
123  IN PPCIPBUSDATA BusData,
124  IN PVOID State,
125  IN PUCHAR Buffer,
126  IN ULONG Offset
127 );
128 
129 typedef VOID
131  IN PBUS_HANDLER BusHandler,
132  IN PCI_SLOT_NUMBER Slot,
133  IN PKIRQL Irql,
134  IN PVOID State
135 );
136 
137 typedef VOID
139  IN PBUS_HANDLER BusHandler,
140  IN KIRQL Irql
141 );
142 
143 typedef struct _PCI_CONFIG_HANDLER
144 {
150 
151 typedef struct _PCI_REGISTRY_INFO_INTERNAL
152 {
155  UCHAR NoBuses; // Number Of Buses
160 
161 //
162 // PCI Type 1 Ports
163 //
164 #define PCI_TYPE1_ADDRESS_PORT (PULONG)0xCF8
165 #define PCI_TYPE1_DATA_PORT 0xCFC
166 
167 //
168 // PCI Type 2 Ports
169 //
170 #define PCI_TYPE2_CSE_PORT (PUCHAR)0xCF8
171 #define PCI_TYPE2_FORWARD_PORT (PUCHAR)0xCFA
172 #define PCI_TYPE2_ADDRESS_BASE 0xC
173 
174 //
175 // PCI Type 1 Configuration Register
176 //
177 typedef struct _PCI_TYPE1_CFG_BITS
178 {
179  union
180  {
181  struct
182  {
190  } bits;
191 
193  } u;
195 
196 //
197 // PCI Type 2 CSE Register
198 //
199 typedef struct _PCI_TYPE2_CSE_BITS
200 {
201  union
202  {
203  struct
204  {
208  } bits;
209 
211  } u;
213 
214 //
215 // PCI Type 2 Address Register
216 //
218 {
219  union
220  {
221  struct
222  {
226  } bits;
227 
229  } u;
231 
233 {
234  union
235  {
236  struct
237  {
242  } bits;
244  } u;
246 
248 {
249  union
250  {
251  struct
252  {
259  } bits;
261  } u;
263 
264 typedef struct _ARRAY
265 {
268 } ARRAY, *PARRAY;
269 
270 typedef struct _HAL_BUS_HANDLER
271 {
276 
277 /* FUNCTIONS *****************************************************************/
278 
279 /* SHARED (Fake PCI-BUS HANDLER) */
280 
284 
285 INIT_FUNCTION
287 NTAPI
289  VOID
290 );
291 
292 VOID
293 NTAPI
295  IN PBUS_HANDLER BusHandler,
296  IN PCI_SLOT_NUMBER Slot,
297  IN PKIRQL Irql,
298  IN PPCI_TYPE1_CFG_BITS PciCfg
299 );
300 
301 VOID
302 NTAPI
304  IN PBUS_HANDLER BusHandler,
305  IN KIRQL Irql
306 );
307 
308 VOID
309 NTAPI
311  IN PBUS_HANDLER BusHandler,
312  IN PCI_SLOT_NUMBER Slot,
313  IN PKIRQL Irql,
315 );
316 
317 VOID
318 NTAPI
320  IN PBUS_HANDLER BusHandler,
321  IN KIRQL Irql
322 );
323 
324 TYPE1_DEFINE(HalpPCIReadUcharType1);
325 TYPE1_DEFINE(HalpPCIReadUshortType1);
326 TYPE1_DEFINE(HalpPCIReadUlongType1);
327 TYPE2_DEFINE(HalpPCIReadUcharType2);
328 TYPE2_DEFINE(HalpPCIReadUshortType2);
329 TYPE2_DEFINE(HalpPCIReadUlongType2);
330 TYPE1_DEFINE(HalpPCIWriteUcharType1);
331 TYPE1_DEFINE(HalpPCIWriteUshortType1);
332 TYPE1_DEFINE(HalpPCIWriteUlongType1);
333 TYPE2_DEFINE(HalpPCIWriteUcharType2);
334 TYPE2_DEFINE(HalpPCIWriteUshortType2);
335 TYPE2_DEFINE(HalpPCIWriteUlongType2);
336 
337 BOOLEAN
338 NTAPI
340  IN PBUS_HANDLER BusHandler,
341  IN PCI_SLOT_NUMBER Slot
342 );
343 
344 VOID
345 NTAPI
347  IN PBUS_HANDLER BusHandler,
348  IN PCI_SLOT_NUMBER Slot,
349  IN PVOID Buffer,
350  IN ULONG Offset,
351  IN ULONG Length
352 );
353 
354 VOID
355 NTAPI
357  IN PBUS_HANDLER BusHandler,
358  IN PCI_SLOT_NUMBER Slot,
359  IN PVOID Buffer,
360  IN ULONG Offset,
361  IN ULONG Length
362 );
363 
364 ULONG
365 NTAPI
367  IN PBUS_HANDLER BusHandler,
368  IN PBUS_HANDLER RootBusHandler,
370  IN PVOID Buffer,
371  IN ULONG Offset,
372  IN ULONG Length
373 );
374 
375 ULONG
376 NTAPI
378  IN PBUS_HANDLER BusHandler,
379  IN PBUS_HANDLER RootBusHandler,
381  IN PVOID Buffer,
382  IN ULONG Offset,
383  IN ULONG Length
384 );
385 
386 NTSTATUS
387 NTAPI
389  IN PBUS_HANDLER BusHandler,
390  IN PBUS_HANDLER RootHandler,
395  IN ULONG Slot,
396  IN OUT PCM_RESOURCE_LIST *pAllocatedResources
397 );
398 
399 /* NON-LEGACY */
400 
401 ULONG
402 NTAPI
407  PKIRQL Irql,
409 );
410 
411 ULONG
412 NTAPI
416  IN PVOID Buffer,
417  IN ULONG Length
418 );
419 
420 ULONG
421 NTAPI
425  IN PVOID Buffer,
426  IN ULONG Length
427 );
428 
429 INIT_FUNCTION
430 VOID
431 NTAPI
433  VOID
434 );
435 
436 INIT_FUNCTION
437 VOID
438 NTAPI
440  VOID
441 );
442 
443 BOOLEAN
444 NTAPI
446  IN INTERFACE_TYPE InterfaceType,
451 );
452 
453 NTSTATUS
454 NTAPI
464 );
465 
466 BOOLEAN
467 NTAPI
473  IN BOOLEAN NextBus
474 );
475 
476 INIT_FUNCTION
477 VOID
478 NTAPI
480  VOID
481 );
482 
483 /* LEGACY */
484 
485 BOOLEAN
486 NTAPI
488  IN INTERFACE_TYPE InterfaceType,
493 );
494 
495 BOOLEAN
496 NTAPI
502  IN BOOLEAN NextBus
503 );
504 
505 NTSTATUS
506 NTAPI
508  IN PBUS_HANDLER RootHandler,
509  IN OUT PIO_RESOURCE_REQUIREMENTS_LIST *pResourceList);
510 
511 ULONG
512 NTAPI
514  IN PBUS_HANDLER RootHandler,
517  OUT PKIRQL Irql,
519 VOID
520 NTAPI
522  IN PBUS_HANDLER RootHandler,
524  IN PPCI_COMMON_CONFIG PciData);
525 
526 VOID
527 NTAPI
529  IN PBUS_HANDLER RootHandler,
531  IN PPCI_COMMON_CONFIG PciNewData,
532  IN PPCI_COMMON_CONFIG PciOldData);
533 
534 NTSTATUS
535 NTAPI
537  IN PBUS_HANDLER RootHandler,
538  IN PCI_SLOT_NUMBER PciSlot,
540 
541 VOID
542 NTAPI
544  VOID
545 );
546 
548 NTAPI
550  IN ULONG_PTR ContextValue
551 );
552 
554 FASTCALL
556  IN BUS_DATA_TYPE ConfigType,
558 );
559 
560 ULONG
561 NTAPI
563  IN PBUS_HANDLER BusHandler,
564  IN PBUS_HANDLER RootHandler,
566  IN PVOID Buffer,
567  IN ULONG Offset,
568  IN ULONG Length
569 );
570 
571 ULONG
572 NTAPI
574  IN PBUS_HANDLER BusHandler,
575  IN PBUS_HANDLER RootHandler,
577  IN PVOID Buffer,
578  IN ULONG Offset,
579  IN ULONG Length
580 );
581 
582 ULONG
583 NTAPI
585  IN PBUS_HANDLER BusHandler,
586  IN PBUS_HANDLER RootHandler,
588  IN PVOID Buffer,
589  IN ULONG Offset,
590  IN ULONG Length
591 );
592 
593 BOOLEAN
594 NTAPI
596  IN PBUS_HANDLER BusHandler,
597  IN PBUS_HANDLER RootHandler,
601 );
602 
603 BOOLEAN
604 NTAPI
606  IN PBUS_HANDLER BusHandler,
607  IN PBUS_HANDLER RootHandler,
611 );
612 
613 ULONG
614 NTAPI
616  IN PBUS_HANDLER BusHandler,
617  IN PBUS_HANDLER RootHandler,
620  OUT PKIRQL Irql,
622 );
623 
624 extern ULONG HalpBusType;
629 
630 /* EOF */
struct _PCI_REGISTRY_INFO_INTERNAL PCI_REGISTRY_INFO_INTERNAL
ULONG FunctionNumber
Definition: bus.h:185
_In_ ULONG _In_ ULONG BusInterruptLevel
Definition: halfuncs.h:170
ULONG NTAPI HalpcSetCmosData(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN ULONG SlotNumber, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
Definition: cmosbus.c:34
ULONG Reserved1
Definition: bus.h:183
#define IN
Definition: typedefs.h:38
VOID NTAPI HalpPCIISALine2Pin(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN PCI_SLOT_NUMBER SlotNumber, IN PPCI_COMMON_CONFIG PciNewData, IN PPCI_COMMON_CONFIG PciOldData)
Definition: pcibus.c:571
ULONG HalpMaxPciBus
Definition: pci.c:18
BOOLEAN NTAPI HaliFindBusAddressTranslation(IN PHYSICAL_ADDRESS BusAddress, IN OUT PULONG AddressSpace, OUT PPHYSICAL_ADDRESS TranslatedAddress, IN OUT PULONG_PTR Context, IN BOOLEAN NextBus)
Definition: bussupp.c:1297
ULONG Data
Definition: bus.h:91
BOOLEAN BridgeConfigRead
Definition: bus.h:112
struct _PCI_TYPE2_ADDRESS_BITS PCI_TYPE2_ADDRESS_BITS
_In_ ULONG _In_ PHYSICAL_ADDRESS BusAddress
Definition: iofuncs.h:2268
ULONG NTAPI HalpNoBusData(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN ULONG SlotNumber, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
Definition: bushndlr.c:108
struct _PCI_CONFIG_HANDLER PCI_CONFIG_HANDLER
VOID NTAPI HalpInitBusHandler(VOID)
Definition: bushndlr.c:420
enum _INTERFACE_TYPE INTERFACE_TYPE
ULONG MaxDevice
Definition: bus.h:100
VOID NTAPI HalpPCIPin2ISALine(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN PCI_SLOT_NUMBER SlotNumber, IN PPCI_COMMON_CONFIG PciData)
Definition: pcibus.c:561
union _PCI_TYPE2_CSE_BITS::@1463 u
UCHAR reserved[1]
Definition: bus.h:115
ULONG Base
Definition: bus.h:97
ULONG NTAPI HalpGetSystemInterruptVector_Acpi(ULONG BusNumber, ULONG BusInterruptLevel, ULONG BusInterruptVector, PKIRQL Irql, PKAFFINITY Affinity)
struct _PCIPBUSDATA::@1422::@1423 Type1
struct _PCI_TYPE0_CFG_CYCLE_BITS * PPCI_TYPE0_CFG_CYCLE_BITS
#define ANYSIZE_ARRAY
Definition: typedefs.h:45
_Inout_opt_ PDEVICE_OBJECT _Inout_opt_ PDEVICE_OBJECT _Inout_opt_ PDEVICE_OBJECT _Inout_opt_ PCM_RESOURCE_LIST * AllocatedResources
Definition: ndis.h:4640
_In_opt_ PUNICODE_STRING _In_ PDRIVER_OBJECT _In_ PDEVICE_OBJECT _In_ INTERFACE_TYPE BusType
Definition: halfuncs.h:156
enum _BUS_DATA_TYPE BUS_DATA_TYPE
_In_ ULONG _In_ PHYSICAL_ADDRESS _Inout_ PULONG AddressSpace
Definition: iofuncs.h:2268
unsigned char * PUCHAR
Definition: retypes.h:3
VOID NTAPI HalpPCISynchronizeType1(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PKIRQL Irql, IN PPCI_TYPE1_CFG_BITS PciCfg)
Definition: pci.c:114
UCHAR Enable
Definition: bus.h:205
BOOLEAN NTAPI HalpValidPCISlot(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot)
Definition: pci.c:302
LONG NTSTATUS
Definition: precomp.h:26
struct _PCI_TYPE2_CSE_BITS PCI_TYPE2_CSE_BITS
ULONG NTAPI HalpGetSystemInterruptVector(ULONG BusNumber, ULONG BusInterruptLevel, ULONG BusInterruptVector, PKIRQL Irql, PKAFFINITY Affinity)
UCHAR ParentBus
Definition: bus.h:113
PUCHAR Forward
Definition: bus.h:96
PUCHAR CSE
Definition: bus.h:95
BOOLEAN NTAPI HalpFindBusAddressTranslation(IN PHYSICAL_ADDRESS BusAddress, IN OUT PULONG AddressSpace, OUT PPHYSICAL_ADDRESS TranslatedAddress, IN OUT PULONG_PTR Context, IN BOOLEAN NextBus)
Definition: bus.c:98
ULONG NTAPI HalpSetPCIData(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootBusHandler, IN PCI_SLOT_NUMBER SlotNumber, IN PUCHAR Buffer, IN ULONG Offset, IN ULONG Length)
Definition: pci.c:409
_In_ ULONG _In_ ULONG _In_ ULONG BusInterruptVector
Definition: halfuncs.h:170
ULONG HalpBusType
Definition: bus.c:17
_In_ ULONG _In_ PHYSICAL_ADDRESS _Inout_ PULONG _Out_ PPHYSICAL_ADDRESS TranslatedAddress
Definition: iofuncs.h:2268
#define FASTCALL
Definition: nt_native.h:50
_Out_ PKIRQL Irql
Definition: csq.h:179
PCIBUSDATA CommonData
Definition: bus.h:85
BOOLEAN HalpPCIConfigInitialized
Definition: pci.c:17
_In_opt_ PUNICODE_STRING DriverClassName
Definition: halfuncs.h:156
FncReleaseSync ReleaseSynchronzation
Definition: bus.h:128
VOID NTAPI HalpPCIReleaseSynchronizationType2(IN PBUS_HANDLER BusHandler, IN KIRQL Irql)
Definition: pcibus.c:204
ULONG NTAPI HalpSetCmosData(IN ULONG BusNumber, IN ULONG SlotNumber, IN PVOID Buffer, IN ULONG Length)
Definition: cmos.c:99
VOID(NTAPI * FncReleaseSync)(IN PBUS_HANDLER BusHandler, IN KIRQL Irql)
Definition: bus.h:120
FncConfigIO ConfigRead[3]
Definition: bus.h:129
uint32_t ULONG_PTR
Definition: typedefs.h:63
INIT_FUNCTION PPCI_REGISTRY_INFO_INTERNAL NTAPI HalpQueryPciRegistryInfo(VOID)
Definition: pci.c:543
PULONG Address
Definition: bus.h:90
ULONG NTAPI HalpGetCmosData(IN ULONG BusNumber, IN ULONG SlotNumber, IN PVOID Buffer, IN ULONG Length)
Definition: cmos.c:47
UCHAR KIRQL
Definition: env_spec_w32.h:591
VOID(NTAPI * FncSync)(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PKIRQL Irql, IN PVOID State)
Definition: bus.h:112
ULONG DeviceNumber
Definition: bus.h:186
ULONG NTAPI HalpGetPCIIntOnISABus(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN ULONG BusInterruptLevel, IN ULONG BusInterruptVector, OUT PKIRQL Irql, OUT PKAFFINITY Affinity)
Definition: pcibus.c:540
NTSTATUS(* NTAPI)(IN PFILE_FULL_EA_INFORMATION EaBuffer, IN ULONG EaLength, OUT PULONG ErrorOffset)
Definition: IoEaTest.cpp:117
_In_ ULONG _In_ ULONG Offset
Definition: ntddpcm.h:101
#define TYPE2_DEFINE(x)
Definition: bus.h:26
BOOLEAN NTAPI HalpTranslateSystemBusAddress(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN PHYSICAL_ADDRESS BusAddress, IN OUT PULONG AddressSpace, OUT PPHYSICAL_ADDRESS TranslatedAddress)
Definition: sysbus.c:21
NTSTATUS NTAPI HalpAssignSlotResources(IN PUNICODE_STRING RegistryPath, IN PUNICODE_STRING DriverClassName, IN PDRIVER_OBJECT DriverObject, IN PDEVICE_OBJECT DeviceObject, IN INTERFACE_TYPE BusType, IN ULONG BusNumber, IN ULONG SlotNumber, IN OUT PCM_RESOURCE_LIST *AllocatedResources)
Definition: bus.c:39
UCHAR SwizzleIn[4]
Definition: bus.h:116
NTSTATUS NTAPI HalpGetISAFixedPCIIrq(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN PCI_SLOT_NUMBER PciSlot, OUT PSUPPORTED_RANGE *Range)
Definition: pcibus.c:582
struct _PCI_TYPE0_CFG_CYCLE_BITS PCI_TYPE0_CFG_CYCLE_BITS
KAFFINITY * PKAFFINITY
Definition: basetsd.h:197
struct _ARRAY ARRAY
unsigned char BOOLEAN
ULONG NTAPI HalpGetPCIData(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootBusHandler, IN PCI_SLOT_NUMBER SlotNumber, IN PUCHAR Buffer, IN ULONG Offset, IN ULONG Length)
Definition: pci.c:338
static PDRIVER_OBJECT DriverObject
Definition: template.c:42
Definition: bufpool.h:45
struct _PCI_TYPE0_CFG_CYCLE_BITS::@1467::@1468 bits
_In_opt_ PUNICODE_STRING _In_ PDRIVER_OBJECT _In_ PDEVICE_OBJECT _In_ INTERFACE_TYPE _In_ ULONG BusNumber
Definition: halfuncs.h:156
BOOLEAN NTAPI HaliTranslateBusAddress(IN INTERFACE_TYPE InterfaceType, IN ULONG BusNumber, IN PHYSICAL_ADDRESS BusAddress, IN OUT PULONG AddressSpace, OUT PPHYSICAL_ADDRESS TranslatedAddress)
Definition: bussupp.c:1371
struct _PCI_TYPE1_CFG_BITS::@1461::@1462 bits
VOID NTAPI HalpReadPCIConfig(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
Definition: pci.c:255
union _PCIPBUSDATA::@1422 Config
struct _HAL_BUS_HANDLER HAL_BUS_HANDLER
struct _PCIPBUSDATA PCIPBUSDATA
PBUS_HANDLER FASTCALL HaliReferenceHandlerForConfigSpace(IN BUS_DATA_TYPE ConfigType, IN ULONG BusNumber)
Definition: bushndlr.c:197
PCI_CARD_DESCRIPTOR CardList[ANYSIZE_ARRAY]
Definition: bus.h:140
union _PCI_TYPE2_ADDRESS_BITS::@1465 u
BUS_HANDLER HalpFakePciBusHandler
Definition: pci.c:91
BOOLEAN NTAPI HalpTranslateIsaBusAddress(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN PHYSICAL_ADDRESS BusAddress, IN OUT PULONG AddressSpace, OUT PPHYSICAL_ADDRESS TranslatedAddress)
Definition: isabus.c:21
struct _PCI_TYPE2_CSE_BITS::@1463::@1464 bits
struct _HAL_BUS_HANDLER * PHAL_BUS_HANDLER
#define PCI_MAX_DEVICES
Definition: iotypes.h:3242
_In_ ULONG _In_ ULONG _In_ ULONG _Out_ PKIRQL _Out_ PKAFFINITY Affinity
Definition: halfuncs.h:170
struct _PCI_TYPE1_CFG_BITS PCI_TYPE1_CFG_BITS
_In_ ULONG _In_ ULONG _In_ ULONG Length
Definition: ntddpcm.h:101
VOID NTAPI HalpInitializePciBus(VOID)
Definition: pci.c:770
VOID NTAPI HalpPCIReleaseSynchronzationType1(IN PBUS_HANDLER BusHandler, IN KIRQL Irql)
Definition: pci.c:133
_In_opt_ PUNICODE_STRING _In_ PDRIVER_OBJECT _In_ PDEVICE_OBJECT _In_ INTERFACE_TYPE _In_ ULONG _In_ ULONG SlotNumber
Definition: halfuncs.h:156
unsigned char UCHAR
Definition: xmlstorage.h:181
struct _PCI_TYPE1_CFG_BITS * PPCI_TYPE1_CFG_BITS
USHORT RegisterNumber
Definition: bus.h:223
struct _PCI_CONFIG_HANDLER * PPCI_CONFIG_HANDLER
#define NTSTATUS
Definition: precomp.h:20
#define VOID
Definition: acefi.h:82
KIRQL * PKIRQL
Definition: env_spec_w32.h:592
NTSTATUS NTAPI HalpAdjustPCIResourceList(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN OUT PIO_RESOURCE_REQUIREMENTS_LIST *pResourceList)
Definition: pcibus.c:683
struct _PCI_TYPE2_ADDRESS_BITS * PPCI_TYPE2_ADDRESS_BITS
Definition: typedefs.h:117
Definition: range.c:39
BOOLEAN NTAPI HalpTranslateBusAddress(IN INTERFACE_TYPE InterfaceType, IN ULONG BusNumber, IN PHYSICAL_ADDRESS BusAddress, IN OUT PULONG AddressSpace, OUT PPHYSICAL_ADDRESS TranslatedAddress)
Definition: bus.c:71
struct _PCIPBUSDATA::@1422::@1424 Type2
INIT_FUNCTION VOID NTAPI HalpInitializePciStubs(VOID)
Definition: pci.c:674
struct _PCI_TYPE2_CSE_BITS PPCI_TYPE2_CSE_BITS
#define PCI_MAX_FUNCTION
Definition: iotypes.h:3243
NTSTATUS(NTAPI * PciIrqRange)(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN PCI_SLOT_NUMBER PciSlot, OUT PSUPPORTED_RANGE *Interrupt)
Definition: bus.h:86
IN PDEVICE_OBJECT DeviceObject
Definition: fatprocs.h:1560
struct _PCI_TYPE1_CFG_CYCLE_BITS PCI_TYPE1_CFG_CYCLE_BITS
FncSync Synchronize
Definition: bus.h:127
ULONG ArraySize
Definition: bus.h:266
enum State_ State
Definition: pofuncs.h:54
BUS_HANDLER Handler
Definition: bus.h:274
struct _ARRAY * PARRAY
ULONG Enable
Definition: bus.h:189
unsigned short USHORT
Definition: pedump.c:61
PVOID Element[ANYSIZE_ARRAY]
Definition: bus.h:267
ULONG NTAPI HalpcGetCmosData(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN ULONG SlotNumber, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
Definition: cmosbus.c:21
unsigned int * PULONG
Definition: retypes.h:1
PCI_CONFIG_HANDLER PCIConfigHandlerType1
Definition: pci.c:32
struct _PCI_TYPE1_CFG_CYCLE_BITS * PPCI_TYPE1_CFG_CYCLE_BITS
UCHAR Subtractive
Definition: bus.h:114
struct _PCI_TYPE1_CFG_CYCLE_BITS::@1469::@1470 bits
union _PCI_TYPE0_CFG_CYCLE_BITS::@1467 u
ULONG(NTAPI * FncConfigIO)(IN PPCIPBUSDATA BusData, IN PVOID State, IN PUCHAR Buffer, IN ULONG Offset)
Definition: bus.h:104
struct _PCI_TYPE2_ADDRESS_BITS::@1465::@1466 bits
ULONG HalpMinPciBus
Definition: pci.c:18
PBUS_HANDLER NTAPI HalpContextToBusHandler(IN ULONG_PTR ContextValue)
Definition: bushndlr.c:206
struct _PCI_REGISTRY_INFO_INTERNAL * PPCI_REGISTRY_INFO_INTERNAL
Definition: shimeng.h:15
struct _PCIPBUSDATA * PPCIPBUSDATA
#define OUT
Definition: typedefs.h:39
PCI_CONFIG_HANDLER PCIConfigHandler
Definition: pci.c:20
UCHAR AsUCHAR
Definition: bus.h:210
#define TYPE1_DEFINE(x)
Definition: bus.h:25
unsigned int ULONG
Definition: retypes.h:1
VOID NTAPI HalpWritePCIConfig(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PVOID Buffer, IN ULONG Offset, IN ULONG Length)
Definition: pci.c:281
LIST_ENTRY HalpAllBusHandlers
Definition: bushndlr.c:19
uint32_t * PULONG_PTR
Definition: typedefs.h:63
_In_ PUNICODE_STRING RegistryPath
Definition: wmip.h:27
union _PCI_TYPE1_CFG_BITS::@1461 u
ULONG Reserved2
Definition: bus.h:188
NTSTATUS NTAPI HalpAssignPCISlotResources(IN PBUS_HANDLER BusHandler, IN PBUS_HANDLER RootHandler, IN PUNICODE_STRING RegistryPath, IN PUNICODE_STRING DriverClassName OPTIONAL, IN PDRIVER_OBJECT DriverObject, IN PDEVICE_OBJECT DeviceObject OPTIONAL, IN ULONG Slot, IN OUT PCM_RESOURCE_LIST *pAllocatedResources)
Definition: pci.c:490
RTL_BITMAP DeviceConfigured
Definition: bus.h:117
LIST_ENTRY AllHandlers
Definition: bus.h:272
IN BOOLEAN OUT PSTR Buffer
Definition: progress.h:34
PCI_CONFIG_HANDLER PCIConfigHandlerType2
Definition: pci.c:54
UCHAR FunctionNumber
Definition: bus.h:206
ULONG AsULONG
Definition: bus.h:192
VOID NTAPI HalpPCISynchronizeType2(IN PBUS_HANDLER BusHandler, IN PCI_SLOT_NUMBER Slot, IN PKIRQL Irql, IN PPCI_TYPE2_ADDRESS_BITS PciCfg)
Definition: pci.c:159
PciIrqRange GetIrqRange
Definition: bus.h:111
FncConfigIO ConfigWrite[3]
Definition: bus.h:130
ULONG RegisterNumber
Definition: bus.h:184
union _PCI_TYPE1_CFG_CYCLE_BITS::@1469 u
ULONG ReferenceCount
Definition: bus.h:273
ULONG BusNumber
Definition: bus.h:187
USHORT AddressBase
Definition: bus.h:225
ULONG ConfiguredBits[PCI_MAX_DEVICES *PCI_MAX_FUNCTION/32]
Definition: bus.h:118
INIT_FUNCTION VOID NTAPI HalpRegisterPciDebuggingDeviceInfo(VOID)
Definition: pcibus.c:648
PULONG MinorVersion OPTIONAL
Definition: CrossNt.h:68