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ReactOS 0.4.17-dev-1281-g065abb3
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This is the complete list of members for XhciRootHub, including all inherited members.
| AcknowledgeResume(_In_ Port *P, _In_ BOOLEAN PowerUp) | XhciRootHub | private |
| ArmPortResumeTimer(_In_ ULONG PortNumber, _In_ ULONG Milliseconds) | XhciRootHub | |
| CheckRunning() | XhciRootHub | private |
| ClearHubFeature(_In_ PURB Urb) | XhciRootHub | private |
| ClearPortFeature(_In_ PURB Urb) | XhciRootHub | private |
| ClearUsb20LpmLocked(_In_ Port *P) | XhciRootHub | private |
| ClearUsb20PortFeature(_In_ Port *P, _In_ USHORT Feature, _In_ UCHAR Value) | XhciRootHub | private |
| ClearUsb30PortFeature(_In_ Port *P, _In_ USHORT Feature, _In_ UCHAR Value) | XhciRootHub | private |
| CompleteHubRequest(_In_ WDFREQUEST Request, _In_ PURB Urb, _In_ Outcome Result) | XhciRootHub | privatestatic |
| Create(_In_ XhciController *Controller) | XhciRootHub | |
| D0Entry() | XhciRootHub | |
| D0Exit() | XhciRootHub | |
| DisableLpmForSlot(_In_ ULONG PortNumber, _In_ ULONG SlotId) | XhciRootHub | |
| DisarmPortResumeTimer(_In_ ULONG PortNumber) | XhciRootHub | |
| EvtClearHubFeature | XhciRootHub | privatestatic |
| EvtClearPortFeature | XhciRootHub | privatestatic |
| EvtGet20PortInfo | XhciRootHub | privatestatic |
| EvtGet30PortInfo | XhciRootHub | privatestatic |
| EvtGetHubStatus | XhciRootHub | privatestatic |
| EvtGetInfo | XhciRootHub | privatestatic |
| EvtGetPortErrorCount | XhciRootHub | privatestatic |
| EvtGetPortStatus | XhciRootHub | privatestatic |
| EvtInterruptTransfer | XhciRootHub | privatestatic |
| EvtSetHubFeature | XhciRootHub | privatestatic |
| EvtSetPortFeature | XhciRootHub | privatestatic |
| FillSpeeds(_In_ const Port *P, _Inout_ PROOTHUB_30PORT_INFO_EX Entry) const | XhciRootHub | private |
| FromUcx(_In_ UCXROOTHUB UcxRootHub) | XhciRootHub | privatestatic |
| GetHubStatus(_In_ PURB Urb) | XhciRootHub | private |
| GetPortErrorCount(_In_ PURB Urb) | XhciRootHub | private |
| GetPortStatus(_In_ PURB Urb) | XhciRootHub | private |
| HighestUsbVersion() const | XhciRootHub | |
| InterruptTransfer(_In_ PURB Urb) | XhciRootHub | private |
| IsHiddenDebugPort(_In_ const Port *P) const | XhciRootHub | private |
| IsPortConnected(_In_ const Port *P) const | XhciRootHub | private |
| IsUsb20Port(_In_ ULONG PortNumber) const | XhciRootHub | |
| m_AwaitingStatusRead | XhciRootHub | private |
| m_Controller | XhciRootHub | private |
| m_DebugCapability | XhciRootHub | private |
| m_FirstUsb30Port | XhciRootHub | private |
| m_PortCount | XhciRootHub | private |
| m_Ports | XhciRootHub | private |
| m_PortScTunnelValid | XhciRootHub | private |
| m_U1ExitLatency | XhciRootHub | private |
| m_U2ExitLatency | XhciRootHub | private |
| m_Ucx | XhciRootHub | private |
| m_Usb20PortCount | XhciRootHub | private |
| m_Usb30PortCount | XhciRootHub | private |
| OnHostLost() | XhciRootHub | |
| OnPortStatusChangeEvent(_In_ const XHCI_TRB *Event) | XhciRootHub | |
| Outcome enum name | XhciRootHub | private |
| ParseProtocol(_In_ ULONG Capability, _Out_ PBOOLEAN Usable) | XhciRootHub | private |
| PortAt(_In_ ULONG PortNumber) const | XhciRootHub | private |
| PortCount() const | XhciRootHub | |
| PostInterruptsEntry() | XhciRootHub | |
| PostReset() | XhciRootHub | |
| Prepare() | XhciRootHub | |
| QueryTunnelState(_In_ ULONG PortNumber) const | XhciRootHub | |
| ReadPortSc(_In_ const Port *P) const | XhciRootHub | private |
| Release() | XhciRootHub | |
| ResumeTimerDpc | XhciRootHub | privatestatic |
| ResuspendResumedPorts() | XhciRootHub | private |
| SetPortFeature(_In_ PURB Urb) | XhciRootHub | private |
| SetUsb20PortFeature(_In_ Port *P, _In_ USHORT Feature, _In_ UCHAR Value) | XhciRootHub | private |
| SetUsb30LinkState(_In_ Port *P, _In_ UCHAR LinkState) | XhciRootHub | private |
| SetUsb30PortFeature(_In_ Port *P, _In_ USHORT Feature, _In_ UCHAR Value) | XhciRootHub | private |
| SetWakeEnables(_In_ BOOLEAN Arm) | XhciRootHub | |
| SignalPortChange() | XhciRootHub | |
| StartResumeTimer(_In_ Port *P) | XhciRootHub | private |
| SuspendPort(_In_ Port *P) | XhciRootHub | private |
| Update20HardwareLpm(_In_ ULONG PortNumber, _In_ ULONG SlotId, _In_ const USBDEVICE_UPDATE_20_HARDWARE_LPM_PARAMETERS *Parameters) | XhciRootHub | |
| UpdatePortReg(_In_ Port *P, _In_ ULONG Offset, _In_ ULONG Clear, _In_ ULONG Set) | XhciRootHub | private |
| UpdatePortSc(_In_ Port *P, _In_ ULONG Keep, _In_ ULONG Set) | XhciRootHub | private |
| UpdatePortScLocked(_In_ Port *P, _In_ ULONG Keep, _In_ ULONG Set) | XhciRootHub | private |
| WaitForU3(_In_ Port *P, _In_ BOOLEAN RepeatRequest) | XhciRootHub | private |
| WaitU0(_In_ Port *P) | XhciRootHub | private |