ReactOS  0.4.13-dev-544-gede3fdd
pic.c File Reference
#include <hal.h>
#include <debug.h>
Include dependency graph for pic.c:

Go to the source code of this file.

Macros

#define NDEBUG
 

Functions

VOID NTAPI HalpEndSoftwareInterrupt (IN KIRQL OldIrql, IN PKTRAP_FRAME TrapFrame)
 
 HalpDelayedHardwareInterrupt (0)
 
 HalpDelayedHardwareInterrupt (1)
 
 HalpDelayedHardwareInterrupt (2)
 
 HalpDelayedHardwareInterrupt (3)
 
 HalpDelayedHardwareInterrupt (4)
 
 HalpDelayedHardwareInterrupt (5)
 
 HalpDelayedHardwareInterrupt (6)
 
 HalpDelayedHardwareInterrupt (7)
 
 HalpDelayedHardwareInterrupt (8)
 
 HalpDelayedHardwareInterrupt (9)
 
 HalpDelayedHardwareInterrupt (10)
 
 HalpDelayedHardwareInterrupt (11)
 
 HalpDelayedHardwareInterrupt (12)
 
 HalpDelayedHardwareInterrupt (13)
 
 HalpDelayedHardwareInterrupt (14)
 
 HalpDelayedHardwareInterrupt (15)
 
VOID NTAPI HalpInitializePICs (IN BOOLEAN EnableInterrupts)
 
UCHAR FASTCALL HalpIrqToVector (UCHAR Irq)
 
UCHAR FASTCALL HalpVectorToIrq (UCHAR Vector)
 
KIRQL FASTCALL HalpVectorToIrql (UCHAR Vector)
 
KIRQL NTAPI KeGetCurrentIrql (VOID)
 
KIRQL NTAPI KeRaiseIrqlToDpcLevel (VOID)
 
KIRQL NTAPI KeRaiseIrqlToSynchLevel (VOID)
 
KIRQL FASTCALL KfRaiseIrql (IN KIRQL NewIrql)
 
VOID FASTCALL KfLowerIrql (IN KIRQL OldIrql)
 
VOID FASTCALL HalRequestSoftwareInterrupt (IN KIRQL Irql)
 
VOID FASTCALL HalClearSoftwareInterrupt (IN KIRQL Irql)
 
PHAL_SW_INTERRUPT_HANDLER_2ND_ENTRY FASTCALL HalpEndSoftwareInterrupt2 (IN KIRQL OldIrql, IN PKTRAP_FRAME TrapFrame)
 
FORCEINLINE BOOLEAN _HalpDismissIrqGeneric (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
 
BOOLEAN NTAPI HalpDismissIrqGeneric (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
 
BOOLEAN NTAPI HalpDismissIrq15 (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
 
BOOLEAN NTAPI HalpDismissIrq13 (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
 
BOOLEAN NTAPI HalpDismissIrq07 (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
 
FORCEINLINE BOOLEAN _HalpDismissIrqLevel (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
 
BOOLEAN NTAPI HalpDismissIrqLevel (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
 
BOOLEAN NTAPI HalpDismissIrq15Level (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
 
BOOLEAN NTAPI HalpDismissIrq13Level (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
 
BOOLEAN NTAPI HalpDismissIrq07Level (IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
 
PHAL_SW_INTERRUPT_HANDLER __cdecl HalpHardwareInterruptLevel2 (VOID)
 
BOOLEAN NTAPI HalEnableSystemInterrupt (IN ULONG Vector, IN KIRQL Irql, IN KINTERRUPT_MODE InterruptMode)
 
VOID NTAPI HalDisableSystemInterrupt (IN ULONG Vector, IN KIRQL Irql)
 
BOOLEAN NTAPI HalBeginSystemInterrupt (IN KIRQL Irql, IN ULONG Vector, OUT PKIRQL OldIrql)
 
PHAL_SW_INTERRUPT_HANDLER_2ND_ENTRY FASTCALL HalEndSystemInterrupt2 (IN KIRQL OldIrql, IN PKTRAP_FRAME TrapFrame)
 
FORCEINLINE DECLSPEC_NORETURN VOID _HalpApcInterruptHandler (IN PKTRAP_FRAME TrapFrame)
 
DECLSPEC_NORETURN VOID FASTCALL HalpApcInterrupt2ndEntry (IN PKTRAP_FRAME TrapFrame)
 
DECLSPEC_NORETURN VOID FASTCALL HalpApcInterruptHandler (IN PKTRAP_FRAME TrapFrame)
 
FORCEINLINE KIRQL _HalpDispatchInterruptHandler (VOID)
 
DECLSPEC_NORETURN VOID FASTCALL HalpDispatchInterrupt2ndEntry (IN PKTRAP_FRAME TrapFrame)
 
PHAL_SW_INTERRUPT_HANDLER __cdecl HalpDispatchInterrupt2 (VOID)
 

Variables

PHAL_DISMISS_INTERRUPT HalpSpecialDismissTable [16]
 
PHAL_DISMISS_INTERRUPT HalpSpecialDismissLevelTable [16]
 
ULONG KiI8259MaskTable [32]
 
ULONG FindHigherIrqlMask [32]
 
KIRQL SWInterruptLookUpTable [8]
 
PHAL_SW_INTERRUPT_HANDLER SWInterruptHandlerTable [20]
 
PHAL_SW_INTERRUPT_HANDLER_2ND_ENTRY SWInterruptHandlerTable2 [3]
 
LONG HalpEisaELCR
 

Macro Definition Documentation

◆ NDEBUG

#define NDEBUG

Definition at line 12 of file pic.c.

Function Documentation

◆ _HalpApcInterruptHandler()

FORCEINLINE DECLSPEC_NORETURN VOID _HalpApcInterruptHandler ( IN PKTRAP_FRAME  TrapFrame)

Definition at line 1209 of file pic.c.

1210 {
1211  KIRQL CurrentIrql;
1212  PKPCR Pcr = KeGetPcr();
1213 
1214  /* Save the current IRQL and update it */
1215  CurrentIrql = Pcr->Irql;
1216  Pcr->Irql = APC_LEVEL;
1217 
1218  /* Remove DPC from IRR */
1219  Pcr->IRR &= ~(1 << APC_LEVEL);
1220 
1221  /* Enable interrupts and call the kernel's APC interrupt handler */
1222  _enable();
1223  KiDeliverApc(((KiUserTrap(TrapFrame)) || (TrapFrame->EFlags & EFLAGS_V86_MASK)) ?
1224  UserMode : KernelMode,
1225  NULL,
1226  TrapFrame);
1227 
1228  /* Disable interrupts and end the interrupt */
1229  _disable();
1230  HalpEndSoftwareInterrupt(CurrentIrql, TrapFrame);
1231 
1232  /* Exit the interrupt */
1233  KiEoiHelper(TrapFrame);
1234 }
KIRQL Irql
Definition: ke.h:298
void __cdecl _enable(void)
Definition: intrin_arm.h:373
Definition: ke.h:280
DECLSPEC_NORETURN VOID FASTCALL KiEoiHelper(IN PKTRAP_FRAME TrapFrame)
Definition: traphdlr.c:126
#define KeGetPcr()
Definition: ke.h:25
#define EFLAGS_V86_MASK
Definition: ketypes.h:129
UCHAR KIRQL
Definition: env_spec_w32.h:591
smooth NULL
Definition: ftsmooth.c:416
VOID NTAPI HalpEndSoftwareInterrupt(IN KIRQL OldIrql, IN PKTRAP_FRAME TrapFrame)
void __cdecl _disable(void)
Definition: intrin_arm.h:365
VOID NTAPI KiDeliverApc(IN KPROCESSOR_MODE DeliveryMode, IN PKEXCEPTION_FRAME ExceptionFrame, IN PKTRAP_FRAME TrapFrame)
Definition: apc.c:302
#define APC_LEVEL
Definition: env_spec_w32.h:695
ULONG IRR
Definition: ke.h:21
BOOLEAN FORCEINLINE KiUserTrap(IN PKTRAP_FRAME TrapFrame)
Definition: ke.h:305

Referenced by HalpApcInterrupt2ndEntry(), and HalpApcInterruptHandler().

◆ _HalpDismissIrqGeneric()

FORCEINLINE BOOLEAN _HalpDismissIrqGeneric ( IN KIRQL  Irql,
IN ULONG  Irq,
OUT PKIRQL  OldIrql 
)

Definition at line 737 of file pic.c.

740 {
741  PIC_MASK Mask;
742  KIRQL CurrentIrql;
743  I8259_OCW2 Ocw2;
744  PKPCR Pcr = KeGetPcr();
745 
746  /* First save current IRQL and compare it to the requested one */
747  CurrentIrql = Pcr->Irql;
748 
749  /* Check if this interrupt is really allowed to happen */
750  if (Irql > CurrentIrql)
751  {
752  /* Set the new IRQL and return the current one */
753  Pcr->Irql = Irql;
754  *OldIrql = CurrentIrql;
755 
756  /* Prepare OCW2 for EOI */
757  Ocw2.Bits = 0;
758  Ocw2.EoiMode = SpecificEoi;
759 
760  /* Check which PIC needs the EOI */
761  if (Irq >= 8)
762  {
763  /* Send the EOI for the IRQ */
764  __outbyte(PIC2_CONTROL_PORT, Ocw2.Bits | ((Irq - 8) & 0xFF));
765 
766  /* Send the EOI for IRQ2 on the master because this was cascaded */
767  __outbyte(PIC1_CONTROL_PORT, Ocw2.Bits | 2);
768  }
769  else
770  {
771  /* Send the EOI for the IRQ */
772  __outbyte(PIC1_CONTROL_PORT, Ocw2.Bits | (Irq &0xFF));
773  }
774 
775  /* Enable interrupts and return success */
776  _enable();
777  return TRUE;
778  }
779 
780  /* Update the IRR so that we deliver this interrupt when the IRQL is proper */
781  Pcr->IRR |= (1 << (Irq + 4));
782 
783  /* Set new PIC mask to real IRQL level, since the optimization is lost now */
784  Mask.Both = (KiI8259MaskTable[CurrentIrql] | Pcr->IDR) & 0xFFFF;
785  __outbyte(PIC1_DATA_PORT, Mask.Master);
786  __outbyte(PIC2_DATA_PORT, Mask.Slave);
787 
788  /* Now lie and say this was spurious */
789  return FALSE;
790 }
KIRQL Irql
Definition: ke.h:298
#define TRUE
Definition: types.h:120
UCHAR EoiMode
Definition: halp.h:330
void __cdecl _enable(void)
Definition: intrin_arm.h:373
ULONG IDR
Definition: ke.h:22
#define PIC1_CONTROL_PORT
Definition: halp.h:194
PPC_QUAL void __outbyte(unsigned long const Port, const unsigned char Data)
Definition: intrin_ppc.h:605
Definition: ke.h:280
_Out_ PKIRQL Irql
Definition: csq.h:179
#define KeGetPcr()
Definition: ke.h:25
UCHAR KIRQL
Definition: env_spec_w32.h:591
#define PIC2_DATA_PORT
Definition: halp.h:197
Definition: irql.c:21
#define PIC2_CONTROL_PORT
Definition: halp.h:196
#define PIC1_DATA_PORT
Definition: halp.h:195
_Requires_lock_held_ Interrupt _Releases_lock_ Interrupt _In_ _IRQL_restores_ KIRQL OldIrql
Definition: kefuncs.h:803
UCHAR Bits
Definition: halp.h:332
ULONG KiI8259MaskTable[32]
Definition: pic.c:100
ULONG IRR
Definition: ke.h:21

Referenced by HalpDismissIrq07(), HalpDismissIrq13(), HalpDismissIrq15(), and HalpDismissIrqGeneric().

◆ _HalpDismissIrqLevel()

FORCEINLINE BOOLEAN _HalpDismissIrqLevel ( IN KIRQL  Irql,
IN ULONG  Irq,
OUT PKIRQL  OldIrql 
)

Definition at line 880 of file pic.c.

883 {
884  PIC_MASK Mask;
885  KIRQL CurrentIrql;
886  I8259_OCW2 Ocw2;
887  PKPCR Pcr = KeGetPcr();
888 
889  /* Update the PIC */
890  Mask.Both = (KiI8259MaskTable[Irql] | Pcr->IDR) & 0xFFFF;
891  __outbyte(PIC1_DATA_PORT, Mask.Master);
892  __outbyte(PIC2_DATA_PORT, Mask.Slave);
893 
894  /* Update the IRR so that we clear this interrupt when the IRQL is proper */
895  Pcr->IRR |= (1 << (Irq + 4));
896 
897  /* Save current IRQL */
898  CurrentIrql = Pcr->Irql;
899 
900  /* Prepare OCW2 for EOI */
901  Ocw2.Bits = 0;
902  Ocw2.EoiMode = SpecificEoi;
903 
904  /* Check which PIC needs the EOI */
905  if (Irq >= 8)
906  {
907  /* Send the EOI for the IRQ */
908  __outbyte(PIC2_CONTROL_PORT, Ocw2.Bits | ((Irq - 8) & 0xFF));
909 
910  /* Send the EOI for IRQ2 on the master because this was cascaded */
911  __outbyte(PIC1_CONTROL_PORT, Ocw2.Bits | 2);
912  }
913  else
914  {
915  /* Send the EOI for the IRQ */
916  __outbyte(PIC1_CONTROL_PORT, Ocw2.Bits | (Irq & 0xFF));
917  }
918 
919  /* Check if this interrupt should be allowed to happen */
920  if (Irql > CurrentIrql)
921  {
922  /* Set the new IRQL and return the current one */
923  Pcr->Irql = Irql;
924  *OldIrql = CurrentIrql;
925 
926  /* Enable interrupts and return success */
927  _enable();
928  return TRUE;
929  }
930 
931  /* Now lie and say this was spurious */
932  return FALSE;
933 }
KIRQL Irql
Definition: ke.h:298
#define TRUE
Definition: types.h:120
UCHAR EoiMode
Definition: halp.h:330
void __cdecl _enable(void)
Definition: intrin_arm.h:373
ULONG IDR
Definition: ke.h:22
#define PIC1_CONTROL_PORT
Definition: halp.h:194
PPC_QUAL void __outbyte(unsigned long const Port, const unsigned char Data)
Definition: intrin_ppc.h:605
Definition: ke.h:280
_Out_ PKIRQL Irql
Definition: csq.h:179
#define KeGetPcr()
Definition: ke.h:25
UCHAR KIRQL
Definition: env_spec_w32.h:591
#define PIC2_DATA_PORT
Definition: halp.h:197
Definition: irql.c:21
#define PIC2_CONTROL_PORT
Definition: halp.h:196
#define PIC1_DATA_PORT
Definition: halp.h:195
_Requires_lock_held_ Interrupt _Releases_lock_ Interrupt _In_ _IRQL_restores_ KIRQL OldIrql
Definition: kefuncs.h:803
UCHAR Bits
Definition: halp.h:332
ULONG KiI8259MaskTable[32]
Definition: pic.c:100
ULONG IRR
Definition: ke.h:21

Referenced by HalpDismissIrq07Level(), HalpDismissIrq13Level(), HalpDismissIrq15Level(), and HalpDismissIrqLevel().

◆ _HalpDispatchInterruptHandler()

FORCEINLINE KIRQL _HalpDispatchInterruptHandler ( VOID  )

Definition at line 1264 of file pic.c.

1265 {
1266  KIRQL CurrentIrql;
1267  PKPCR Pcr = KeGetPcr();
1268 
1269  /* Save the current IRQL and update it */
1270  CurrentIrql = Pcr->Irql;
1271  Pcr->Irql = DISPATCH_LEVEL;
1272 
1273  /* Remove DPC from IRR */
1274  Pcr->IRR &= ~(1 << DISPATCH_LEVEL);
1275 
1276  /* Enable interrupts and call the kernel's DPC interrupt handler */
1277  _enable();
1279  _disable();
1280 
1281  /* Return IRQL */
1282  return CurrentIrql;
1283 }
KIRQL Irql
Definition: ke.h:298
void __cdecl _enable(void)
Definition: intrin_arm.h:373
Definition: ke.h:280
#define KeGetPcr()
Definition: ke.h:25
UCHAR KIRQL
Definition: env_spec_w32.h:591
VOID NTAPI KiDispatchInterrupt(VOID)
Definition: thrdini.c:295
#define DISPATCH_LEVEL
Definition: env_spec_w32.h:696
void __cdecl _disable(void)
Definition: intrin_arm.h:365
ULONG IRR
Definition: ke.h:21

Referenced by HalpDispatchInterrupt2(), and HalpDispatchInterrupt2ndEntry().

◆ HalBeginSystemInterrupt()

BOOLEAN NTAPI HalBeginSystemInterrupt ( IN KIRQL  Irql,
IN ULONG  Vector,
OUT PKIRQL  OldIrql 
)

Definition at line 1130 of file pic.c.

1133 {
1134  ULONG Irq;
1135 
1136  /* Get the IRQ and call the proper routine to handle it */
1137  Irq = Vector - PRIMARY_VECTOR_BASE;
1138  return HalpSpecialDismissTable[Irq](Irql, Irq, OldIrql);
1139 }
#define PRIMARY_VECTOR_BASE
Definition: halp.h:16
PHAL_DISMISS_INTERRUPT HalpSpecialDismissTable[16]
Definition: pic.c:55
_Out_ PKIRQL Irql
Definition: csq.h:179
_Requires_lock_held_ Interrupt _Releases_lock_ Interrupt _In_ _IRQL_restores_ KIRQL OldIrql
Definition: kefuncs.h:803
unsigned int ULONG
Definition: retypes.h:1

◆ HalClearSoftwareInterrupt()

VOID FASTCALL HalClearSoftwareInterrupt ( IN KIRQL  Irql)

Definition at line 673 of file pic.c.

674 {
675  /* Mask out the requested bit */
676  KeGetPcr()->IRR &= ~(1 << Irql);
677 }
_Out_ PKIRQL Irql
Definition: csq.h:179
#define KeGetPcr()
Definition: ke.h:25

◆ HalDisableSystemInterrupt()

VOID NTAPI HalDisableSystemInterrupt ( IN ULONG  Vector,
IN KIRQL  Irql 
)

Definition at line 1095 of file pic.c.

1097 {
1098  ULONG IrqMask;
1099  PIC_MASK PicMask;
1100 
1101  /* Compute new combined IRQ mask */
1102  IrqMask = 1 << (Vector - PRIMARY_VECTOR_BASE);
1103 
1104  /* Disable interrupts */
1105  _disable();
1106 
1107  /* Update software IDR */
1108  KeGetPcr()->IDR |= IrqMask;
1109 
1110  /* Read current interrupt mask */
1111  PicMask.Master = __inbyte(PIC1_DATA_PORT);
1112  PicMask.Slave = __inbyte(PIC2_DATA_PORT);
1113 
1114  /* Add the new disabled interrupt */
1115  PicMask.Both |= IrqMask;
1116 
1117  /* Write new interrupt mask */
1118  __outbyte(PIC1_DATA_PORT, PicMask.Master);
1119  __outbyte(PIC2_DATA_PORT, PicMask.Slave);
1120 
1121  /* Bring interrupts back */
1122  _enable();
1123 }
void __cdecl _enable(void)
Definition: intrin_arm.h:373
#define PRIMARY_VECTOR_BASE
Definition: halp.h:16
PPC_QUAL void __outbyte(unsigned long const Port, const unsigned char Data)
Definition: intrin_ppc.h:605
#define KeGetPcr()
Definition: ke.h:25
#define PIC2_DATA_PORT
Definition: halp.h:197
Definition: irql.c:21
#define PIC1_DATA_PORT
Definition: halp.h:195
void __cdecl _disable(void)
Definition: intrin_arm.h:365
unsigned int ULONG
Definition: retypes.h:1
PPC_QUAL unsigned char __inbyte(const unsigned long Port)
Definition: intrin_ppc.h:539

◆ HalEnableSystemInterrupt()

BOOLEAN NTAPI HalEnableSystemInterrupt ( IN ULONG  Vector,
IN KIRQL  Irql,
IN KINTERRUPT_MODE  InterruptMode 
)

Definition at line 1052 of file pic.c.

1055 {
1056  ULONG Irq;
1057  PKPCR Pcr = KeGetPcr();
1058  PIC_MASK PicMask;
1059 
1060  /* Validate the IRQ */
1061  Irq = Vector - PRIMARY_VECTOR_BASE;
1062  if (Irq >= CLOCK2_LEVEL) return FALSE;
1063 
1064  /* Check for level interrupt */
1066  {
1067  /* Switch handler to level */
1069 
1070  /* Switch dismiss to level */
1072  }
1073 
1074  /* Disable interrupts */
1075  _disable();
1076 
1077  /* Update software IDR */
1078  Pcr->IDR &= ~(1 << Irq);
1079 
1080  /* Set new PIC mask */
1081  PicMask.Both = (KiI8259MaskTable[Pcr->Irql] | Pcr->IDR) & 0xFFFF;
1082  __outbyte(PIC1_DATA_PORT, PicMask.Master);
1083  __outbyte(PIC2_DATA_PORT, PicMask.Slave);
1084 
1085  /* Enable interrupts and exit */
1086  _enable();
1087  return TRUE;
1088 }
KIRQL Irql
Definition: ke.h:298
#define TRUE
Definition: types.h:120
_In_ PKSERVICE_ROUTINE _In_opt_ PVOID _In_opt_ PKSPIN_LOCK _In_ ULONG _In_ KIRQL _In_ KIRQL _In_ KINTERRUPT_MODE InterruptMode
Definition: iofuncs.h:798
void __cdecl _enable(void)
Definition: intrin_arm.h:373
PHAL_DISMISS_INTERRUPT HalpSpecialDismissLevelTable[16]
Definition: pic.c:79
#define PRIMARY_VECTOR_BASE
Definition: halp.h:16
PHAL_DISMISS_INTERRUPT HalpSpecialDismissTable[16]
Definition: pic.c:55
ULONG IDR
Definition: ke.h:22
PPC_QUAL void __outbyte(unsigned long const Port, const unsigned char Data)
Definition: intrin_ppc.h:605
Definition: ke.h:280
#define KeGetPcr()
Definition: ke.h:25
PHAL_SW_INTERRUPT_HANDLER SWInterruptHandlerTable[20]
Definition: pic.c:381
#define PIC2_DATA_PORT
Definition: halp.h:197
Definition: irql.c:21
#define CLOCK2_LEVEL
Definition: env_spec_w32.h:700
#define PIC1_DATA_PORT
Definition: halp.h:195
ULONG KiI8259MaskTable[32]
Definition: pic.c:100
void __cdecl _disable(void)
Definition: intrin_arm.h:365
unsigned int ULONG
Definition: retypes.h:1
VOID __cdecl HalpHardwareInterruptLevel(VOID)

◆ HalEndSystemInterrupt2()

PHAL_SW_INTERRUPT_HANDLER_2ND_ENTRY FASTCALL HalEndSystemInterrupt2 ( IN KIRQL  OldIrql,
IN PKTRAP_FRAME  TrapFrame 
)

Definition at line 1146 of file pic.c.

1148 {
1149  ULONG PendingIrql, PendingIrqlMask, PendingIrqMask;
1150  PKPCR Pcr = KeGetPcr();
1151  PIC_MASK Mask;
1152 
1153  /* Set old IRQL */
1154  Pcr->Irql = OldIrql;
1155 
1156  /* Check for pending software interrupts and compare with current IRQL */
1157  PendingIrqlMask = Pcr->IRR & FindHigherIrqlMask[OldIrql];
1158  if (PendingIrqlMask)
1159  {
1160  /* Check for in-service delayed interrupt */
1161  if (Pcr->IrrActive & 0xFFFFFFF0) return NULL;
1162 
1163  /* Loop checking for pending interrupts */
1164  while (TRUE)
1165  {
1166  /* Check if pending IRQL affects hardware state */
1167  BitScanReverse(&PendingIrql, PendingIrqlMask);
1168  if (PendingIrql > DISPATCH_LEVEL)
1169  {
1170  /* Set new PIC mask */
1171  Mask.Both = Pcr->IDR & 0xFFFF;
1172  __outbyte(PIC1_DATA_PORT, Mask.Master);
1173  __outbyte(PIC2_DATA_PORT, Mask.Slave);
1174 
1175  /* Now check if this specific interrupt is already in-service */
1176  PendingIrqMask = (1 << PendingIrql);
1177  if (Pcr->IrrActive & PendingIrqMask) return NULL;
1178 
1179  /* Set active bit otherwise, and clear it from IRR */
1180  Pcr->IrrActive |= PendingIrqMask;
1181  Pcr->IRR ^= PendingIrqMask;
1182 
1183  /* Handle delayed hardware interrupt */
1184  SWInterruptHandlerTable[PendingIrql]();
1185 
1186  /* Handling complete */
1187  Pcr->IrrActive ^= PendingIrqMask;
1188 
1189  /* Check if there's still interrupts pending */
1190  PendingIrqlMask = Pcr->IRR & FindHigherIrqlMask[Pcr->Irql];
1191  if (!PendingIrqlMask) break;
1192  }
1193  else
1194  {
1195  /* Now handle pending software interrupt */
1196  return SWInterruptHandlerTable2[PendingIrql];
1197  }
1198  }
1199  }
1200 
1201  return NULL;
1202 }
KIRQL Irql
Definition: ke.h:298
#define TRUE
Definition: types.h:120
ULONG IDR
Definition: ke.h:22
ULONG FindHigherIrqlMask[32]
Definition: pic.c:216
PPC_QUAL void __outbyte(unsigned long const Port, const unsigned char Data)
Definition: intrin_ppc.h:605
Definition: ke.h:280
#define KeGetPcr()
Definition: ke.h:25
PHAL_SW_INTERRUPT_HANDLER SWInterruptHandlerTable[20]
Definition: pic.c:381
smooth NULL
Definition: ftsmooth.c:416
PHAL_SW_INTERRUPT_HANDLER_2ND_ENTRY SWInterruptHandlerTable2[3]
Definition: pic.c:406
ULONG IrrActive
Definition: ke.h:49
#define PIC2_DATA_PORT
Definition: halp.h:197
Definition: irql.c:21
#define PIC1_DATA_PORT
Definition: halp.h:195
_Requires_lock_held_ Interrupt _Releases_lock_ Interrupt _In_ _IRQL_restores_ KIRQL OldIrql
Definition: kefuncs.h:803
#define BitScanReverse
Definition: interlocked.h:6
#define DISPATCH_LEVEL
Definition: env_spec_w32.h:696
unsigned int ULONG
Definition: retypes.h:1
ULONG IRR
Definition: ke.h:21

◆ HalpApcInterrupt2ndEntry()

DECLSPEC_NORETURN VOID FASTCALL HalpApcInterrupt2ndEntry ( IN PKTRAP_FRAME  TrapFrame)

Definition at line 1239 of file pic.c.

1240 {
1241  /* Do the work */
1242  _HalpApcInterruptHandler(TrapFrame);
1243 }
FORCEINLINE DECLSPEC_NORETURN VOID _HalpApcInterruptHandler(IN PKTRAP_FRAME TrapFrame)
Definition: pic.c:1209

◆ HalpApcInterruptHandler()

DECLSPEC_NORETURN VOID FASTCALL HalpApcInterruptHandler ( IN PKTRAP_FRAME  TrapFrame)

Definition at line 1248 of file pic.c.

1249 {
1250  /* Set up a fake INT Stack */
1251  TrapFrame->EFlags = __readeflags();
1252  TrapFrame->SegCs = KGDT_R0_CODE;
1253  TrapFrame->Eip = TrapFrame->Eax;
1254 
1255  /* Build the trap frame */
1256  KiEnterInterruptTrap(TrapFrame);
1257 
1258  /* Do the work */
1259  _HalpApcInterruptHandler(TrapFrame);
1260 }
#define KGDT_R0_CODE
Definition: ketypes.h:74
__INTRIN_INLINE uintptr_t __readeflags(void)
Definition: intrin_x86.h:1555
FORCEINLINE DECLSPEC_NORETURN VOID _HalpApcInterruptHandler(IN PKTRAP_FRAME TrapFrame)
Definition: pic.c:1209
FORCEINLINE VOID KiEnterInterruptTrap(IN PKTRAP_FRAME TrapFrame)
Definition: trap_x.h:369

◆ HalpDelayedHardwareInterrupt() [1/16]

HalpDelayedHardwareInterrupt ( )

◆ HalpDelayedHardwareInterrupt() [2/16]

HalpDelayedHardwareInterrupt ( )

◆ HalpDelayedHardwareInterrupt() [3/16]

HalpDelayedHardwareInterrupt ( )

◆ HalpDelayedHardwareInterrupt() [4/16]

HalpDelayedHardwareInterrupt ( )

◆ HalpDelayedHardwareInterrupt() [5/16]

HalpDelayedHardwareInterrupt ( )

◆ HalpDelayedHardwareInterrupt() [6/16]

HalpDelayedHardwareInterrupt ( )

◆ HalpDelayedHardwareInterrupt() [7/16]

HalpDelayedHardwareInterrupt ( )

◆ HalpDelayedHardwareInterrupt() [8/16]

HalpDelayedHardwareInterrupt ( )

◆ HalpDelayedHardwareInterrupt() [9/16]

HalpDelayedHardwareInterrupt ( )

◆ HalpDelayedHardwareInterrupt() [10/16]

HalpDelayedHardwareInterrupt ( )

◆ HalpDelayedHardwareInterrupt() [11/16]

HalpDelayedHardwareInterrupt ( 10  )

◆ HalpDelayedHardwareInterrupt() [12/16]

HalpDelayedHardwareInterrupt ( 11  )

◆ HalpDelayedHardwareInterrupt() [13/16]

HalpDelayedHardwareInterrupt ( 12  )

◆ HalpDelayedHardwareInterrupt() [14/16]

HalpDelayedHardwareInterrupt ( 13  )

◆ HalpDelayedHardwareInterrupt() [15/16]

HalpDelayedHardwareInterrupt ( 14  )

◆ HalpDelayedHardwareInterrupt() [16/16]

HalpDelayedHardwareInterrupt ( 15  )

◆ HalpDismissIrq07()

BOOLEAN NTAPI HalpDismissIrq07 ( IN KIRQL  Irql,
IN ULONG  Irq,
OUT PKIRQL  OldIrql 
)

Definition at line 853 of file pic.c.

856 {
857  I8259_OCW3 Ocw3;
858  I8259_ISR Isr;
859 
860  /* Request the ISR */
861  Ocw3.Bits = 0;
862  Ocw3.Sbo = 1;
863  Ocw3.ReadRequest = ReadIsr;
865 
866  /* Read the ISR */
868 
869  /* Is IRQ 7 really active? If it isn't, this is spurious so fail */
870  if (Isr.Irq7 == FALSE) return FALSE;
871 
872  /* Do normal interrupt dismiss */
873  return _HalpDismissIrqGeneric(Irql, Irq, OldIrql);
874 }
#define PIC1_CONTROL_PORT
Definition: halp.h:194
PPC_QUAL void __outbyte(unsigned long const Port, const unsigned char Data)
Definition: intrin_ppc.h:605
_Out_ PKIRQL Irql
Definition: csq.h:179
FORCEINLINE BOOLEAN _HalpDismissIrqGeneric(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:737
UCHAR ReadRequest
Definition: halp.h:339
UCHAR Sbo
Definition: halp.h:341
_Requires_lock_held_ Interrupt _Releases_lock_ Interrupt _In_ _IRQL_restores_ KIRQL OldIrql
Definition: kefuncs.h:803
Definition: halp.h:245
UCHAR Bits
Definition: halp.h:346
static BOOLEAN NTAPI Isr(PKINTERRUPT Interrupt, PVOID ServiceContext)
Definition: floppy.c:584
PPC_QUAL unsigned char __inbyte(const unsigned long Port)
Definition: intrin_ppc.h:539

◆ HalpDismissIrq07Level()

BOOLEAN NTAPI HalpDismissIrq07Level ( IN KIRQL  Irql,
IN ULONG  Irq,
OUT PKIRQL  OldIrql 
)

Definition at line 995 of file pic.c.

998 {
999  I8259_OCW3 Ocw3;
1000  I8259_ISR Isr;
1001 
1002  /* Request the ISR */
1003  Ocw3.Bits = 0;
1004  Ocw3.Sbo = 1;
1005  Ocw3.ReadRequest = ReadIsr;
1007 
1008  /* Read the ISR */
1009  Isr.Bits = __inbyte(PIC1_CONTROL_PORT);
1010 
1011  /* Is IRQ 7 really active? If it isn't, this is spurious so fail */
1012  if (Isr.Irq7 == FALSE) return FALSE;
1013 
1014  /* Do normal interrupt dismiss */
1015  return _HalpDismissIrqLevel(Irql, Irq, OldIrql);
1016 }
#define PIC1_CONTROL_PORT
Definition: halp.h:194
PPC_QUAL void __outbyte(unsigned long const Port, const unsigned char Data)
Definition: intrin_ppc.h:605
_Out_ PKIRQL Irql
Definition: csq.h:179
FORCEINLINE BOOLEAN _HalpDismissIrqLevel(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:880
UCHAR ReadRequest
Definition: halp.h:339
UCHAR Sbo
Definition: halp.h:341
_Requires_lock_held_ Interrupt _Releases_lock_ Interrupt _In_ _IRQL_restores_ KIRQL OldIrql
Definition: kefuncs.h:803
Definition: halp.h:245
UCHAR Bits
Definition: halp.h:346
static BOOLEAN NTAPI Isr(PKINTERRUPT Interrupt, PVOID ServiceContext)
Definition: floppy.c:584
PPC_QUAL unsigned char __inbyte(const unsigned long Port)
Definition: intrin_ppc.h:539

◆ HalpDismissIrq13()

BOOLEAN NTAPI HalpDismissIrq13 ( IN KIRQL  Irql,
IN ULONG  Irq,
OUT PKIRQL  OldIrql 
)

Definition at line 840 of file pic.c.

843 {
844  /* Clear the FPU busy latch */
845  __outbyte(0xF0, 0);
846 
847  /* Do normal interrupt dismiss */
848  return _HalpDismissIrqGeneric(Irql, Irq, OldIrql);
849 }
PPC_QUAL void __outbyte(unsigned long const Port, const unsigned char Data)
Definition: intrin_ppc.h:605
_Out_ PKIRQL Irql
Definition: csq.h:179
FORCEINLINE BOOLEAN _HalpDismissIrqGeneric(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:737
_Requires_lock_held_ Interrupt _Releases_lock_ Interrupt _In_ _IRQL_restores_ KIRQL OldIrql
Definition: kefuncs.h:803

◆ HalpDismissIrq13Level()

BOOLEAN NTAPI HalpDismissIrq13Level ( IN KIRQL  Irql,
IN ULONG  Irq,
OUT PKIRQL  OldIrql 
)

Definition at line 982 of file pic.c.

985 {
986  /* Clear the FPU busy latch */
987  __outbyte(0xF0, 0);
988 
989  /* Do normal interrupt dismiss */
990  return _HalpDismissIrqLevel(Irql, Irq, OldIrql);
991 }
PPC_QUAL void __outbyte(unsigned long const Port, const unsigned char Data)
Definition: intrin_ppc.h:605
_Out_ PKIRQL Irql
Definition: csq.h:179
FORCEINLINE BOOLEAN _HalpDismissIrqLevel(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:880
_Requires_lock_held_ Interrupt _Releases_lock_ Interrupt _In_ _IRQL_restores_ KIRQL OldIrql
Definition: kefuncs.h:803

◆ HalpDismissIrq15()

BOOLEAN NTAPI HalpDismissIrq15 ( IN KIRQL  Irql,
IN ULONG  Irq,
OUT PKIRQL  OldIrql 
)

Definition at line 804 of file pic.c.

807 {
808  I8259_OCW3 Ocw3;
809  I8259_OCW2 Ocw2;
810  I8259_ISR Isr;
811 
812  /* Request the ISR */
813  Ocw3.Bits = 0;
814  Ocw3.Sbo = 1; /* This encodes an OCW3 vs. an OCW2 */
815  Ocw3.ReadRequest = ReadIsr;
817 
818  /* Read the ISR */
820 
821  /* Is IRQ15 really active (this is IR7) */
822  if (Isr.Irq7 == FALSE)
823  {
824  /* It isn't, so we have to EOI IRQ2 because this was cascaded */
825  Ocw2.Bits = 0;
826  Ocw2.EoiMode = SpecificEoi;
827  __outbyte(PIC1_CONTROL_PORT, Ocw2.Bits | 2);
828 
829  /* And now fail since this was spurious */
830  return FALSE;
831  }
832 
833  /* Do normal interrupt dismiss */
834  return _HalpDismissIrqGeneric(Irql, Irq, OldIrql);
835 }
UCHAR EoiMode
Definition: halp.h:330
#define PIC1_CONTROL_PORT
Definition: halp.h:194
PPC_QUAL void __outbyte(unsigned long const Port, const unsigned char Data)
Definition: intrin_ppc.h:605
_Out_ PKIRQL Irql
Definition: csq.h:179
FORCEINLINE BOOLEAN _HalpDismissIrqGeneric(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:737
UCHAR ReadRequest
Definition: halp.h:339
UCHAR Sbo
Definition: halp.h:341
#define PIC2_CONTROL_PORT
Definition: halp.h:196
_Requires_lock_held_ Interrupt _Releases_lock_ Interrupt _In_ _IRQL_restores_ KIRQL OldIrql
Definition: kefuncs.h:803
Definition: halp.h:245
UCHAR Bits
Definition: halp.h:332
UCHAR Bits
Definition: halp.h:346
static BOOLEAN NTAPI Isr(PKINTERRUPT Interrupt, PVOID ServiceContext)
Definition: floppy.c:584
PPC_QUAL unsigned char __inbyte(const unsigned long Port)
Definition: intrin_ppc.h:539

◆ HalpDismissIrq15Level()

BOOLEAN NTAPI HalpDismissIrq15Level ( IN KIRQL  Irql,
IN ULONG  Irq,
OUT PKIRQL  OldIrql 
)

Definition at line 947 of file pic.c.

950 {
951  I8259_OCW3 Ocw3;
952  I8259_OCW2 Ocw2;
953  I8259_ISR Isr;
954 
955  /* Request the ISR */
956  Ocw3.Bits = 0;
957  Ocw3.Sbo = 1; /* This encodes an OCW3 vs. an OCW2 */
958  Ocw3.ReadRequest = ReadIsr;
960 
961  /* Read the ISR */
963 
964  /* Is IRQ15 really active (this is IR7) */
965  if (Isr.Irq7 == FALSE)
966  {
967  /* It isn't, so we have to EOI IRQ2 because this was cascaded */
968  Ocw2.Bits = 0;
969  Ocw2.EoiMode = SpecificEoi;
970  __outbyte(PIC1_CONTROL_PORT, Ocw2.Bits | 2);
971 
972  /* And now fail since this was spurious */
973  return FALSE;
974  }
975 
976  /* Do normal interrupt dismiss */
977  return _HalpDismissIrqLevel(Irql, Irq, OldIrql);
978 }
UCHAR EoiMode
Definition: halp.h:330
#define PIC1_CONTROL_PORT
Definition: halp.h:194
PPC_QUAL void __outbyte(unsigned long const Port, const unsigned char Data)
Definition: intrin_ppc.h:605
_Out_ PKIRQL Irql
Definition: csq.h:179
FORCEINLINE BOOLEAN _HalpDismissIrqLevel(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:880
UCHAR ReadRequest
Definition: halp.h:339
UCHAR Sbo
Definition: halp.h:341
#define PIC2_CONTROL_PORT
Definition: halp.h:196
_Requires_lock_held_ Interrupt _Releases_lock_ Interrupt _In_ _IRQL_restores_ KIRQL OldIrql
Definition: kefuncs.h:803
Definition: halp.h:245
UCHAR Bits
Definition: halp.h:332
UCHAR Bits
Definition: halp.h:346
static BOOLEAN NTAPI Isr(PKINTERRUPT Interrupt, PVOID ServiceContext)
Definition: floppy.c:584
PPC_QUAL unsigned char __inbyte(const unsigned long Port)
Definition: intrin_ppc.h:539

◆ HalpDismissIrqGeneric()

BOOLEAN NTAPI HalpDismissIrqGeneric ( IN KIRQL  Irql,
IN ULONG  Irq,
OUT PKIRQL  OldIrql 
)

Definition at line 794 of file pic.c.

797 {
798  /* Run the inline code */
799  return _HalpDismissIrqGeneric(Irql, Irq, OldIrql);
800 }
_Out_ PKIRQL Irql
Definition: csq.h:179
FORCEINLINE BOOLEAN _HalpDismissIrqGeneric(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:737
_Requires_lock_held_ Interrupt _Releases_lock_ Interrupt _In_ _IRQL_restores_ KIRQL OldIrql
Definition: kefuncs.h:803

◆ HalpDismissIrqLevel()

BOOLEAN NTAPI HalpDismissIrqLevel ( IN KIRQL  Irql,
IN ULONG  Irq,
OUT PKIRQL  OldIrql 
)

Definition at line 937 of file pic.c.

940 {
941  /* Run the inline code */
942  return _HalpDismissIrqLevel(Irql, Irq, OldIrql);
943 }
_Out_ PKIRQL Irql
Definition: csq.h:179
FORCEINLINE BOOLEAN _HalpDismissIrqLevel(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:880
_Requires_lock_held_ Interrupt _Releases_lock_ Interrupt _In_ _IRQL_restores_ KIRQL OldIrql
Definition: kefuncs.h:803

◆ HalpDispatchInterrupt2()

PHAL_SW_INTERRUPT_HANDLER __cdecl HalpDispatchInterrupt2 ( VOID  )

Definition at line 1304 of file pic.c.

1305 {
1306  ULONG PendingIrqlMask, PendingIrql;
1307  KIRQL OldIrql;
1308  PIC_MASK Mask;
1309  PKPCR Pcr = KeGetPcr();
1310 
1311  /* Do the work */
1313 
1314  /* Restore IRQL */
1315  Pcr->Irql = OldIrql;
1316 
1317  /* Check for pending software interrupts and compare with current IRQL */
1318  PendingIrqlMask = Pcr->IRR & FindHigherIrqlMask[OldIrql];
1319  if (PendingIrqlMask)
1320  {
1321  /* Check if pending IRQL affects hardware state */
1322  BitScanReverse(&PendingIrql, PendingIrqlMask);
1323  if (PendingIrql > DISPATCH_LEVEL)
1324  {
1325  /* Set new PIC mask */
1326  Mask.Both = Pcr->IDR & 0xFFFF;
1327  __outbyte(PIC1_DATA_PORT, Mask.Master);
1328  __outbyte(PIC2_DATA_PORT, Mask.Slave);
1329 
1330  /* Clear IRR bit */
1331  Pcr->IRR ^= (1 << PendingIrql);
1332  }
1333 
1334  /* Now handle pending interrupt */
1335  return SWInterruptHandlerTable[PendingIrql];
1336  }
1337 
1338  return NULL;
1339 }
KIRQL Irql
Definition: ke.h:298
ULONG IDR
Definition: ke.h:22
ULONG FindHigherIrqlMask[32]
Definition: pic.c:216
PPC_QUAL void __outbyte(unsigned long const Port, const unsigned char Data)
Definition: intrin_ppc.h:605
Definition: ke.h:280
#define KeGetPcr()
Definition: ke.h:25
UCHAR KIRQL
Definition: env_spec_w32.h:591
PHAL_SW_INTERRUPT_HANDLER SWInterruptHandlerTable[20]
Definition: pic.c:381
smooth NULL
Definition: ftsmooth.c:416
#define PIC2_DATA_PORT
Definition: halp.h:197
Definition: irql.c:21
#define PIC1_DATA_PORT
Definition: halp.h:195
_Requires_lock_held_ Interrupt _Releases_lock_ Interrupt _In_ _IRQL_restores_ KIRQL OldIrql
Definition: kefuncs.h:803
#define BitScanReverse
Definition: interlocked.h:6
#define DISPATCH_LEVEL
Definition: env_spec_w32.h:696
FORCEINLINE KIRQL _HalpDispatchInterruptHandler(VOID)
Definition: pic.c:1264
unsigned int ULONG
Definition: retypes.h:1
ULONG IRR
Definition: ke.h:21

◆ HalpDispatchInterrupt2ndEntry()

DECLSPEC_NORETURN VOID FASTCALL HalpDispatchInterrupt2ndEntry ( IN PKTRAP_FRAME  TrapFrame)

Definition at line 1288 of file pic.c.

1289 {
1290  KIRQL CurrentIrql;
1291 
1292  /* Do the work */
1293  CurrentIrql = _HalpDispatchInterruptHandler();
1294 
1295  /* End the interrupt */
1296  HalpEndSoftwareInterrupt(CurrentIrql, TrapFrame);
1297 
1298  /* Exit the interrupt */
1299  KiEoiHelper(TrapFrame);
1300 }
DECLSPEC_NORETURN VOID FASTCALL KiEoiHelper(IN PKTRAP_FRAME TrapFrame)
Definition: traphdlr.c:126
UCHAR KIRQL
Definition: env_spec_w32.h:591
VOID NTAPI HalpEndSoftwareInterrupt(IN KIRQL OldIrql, IN PKTRAP_FRAME TrapFrame)
FORCEINLINE KIRQL _HalpDispatchInterruptHandler(VOID)
Definition: pic.c:1264

◆ HalpEndSoftwareInterrupt()

VOID NTAPI HalpEndSoftwareInterrupt ( IN KIRQL  OldIrql,
IN PKTRAP_FRAME  TrapFrame 
)

◆ HalpEndSoftwareInterrupt2()

PHAL_SW_INTERRUPT_HANDLER_2ND_ENTRY FASTCALL HalpEndSoftwareInterrupt2 ( IN KIRQL  OldIrql,
IN PKTRAP_FRAME  TrapFrame 
)

Definition at line 681 of file pic.c.

683 {
684  ULONG PendingIrql, PendingIrqlMask, PendingIrqMask;
685  PKPCR Pcr = KeGetPcr();
686  PIC_MASK Mask;
687 
688  UNREFERENCED_PARAMETER(TrapFrame);
689 
690  /* Set old IRQL */
691  Pcr->Irql = OldIrql;
692 
693  /* Loop checking for pending interrupts */
694  while (TRUE)
695  {
696  /* Check for pending software interrupts and compare with current IRQL */
697  PendingIrqlMask = Pcr->IRR & FindHigherIrqlMask[OldIrql];
698  if (!PendingIrqlMask) return NULL;
699 
700  /* Check for in-service delayed interrupt */
701  if (Pcr->IrrActive & 0xFFFFFFF0) return NULL;
702 
703  /* Check if pending IRQL affects hardware state */
704  BitScanReverse(&PendingIrql, PendingIrqlMask);
705  if (PendingIrql > DISPATCH_LEVEL)
706  {
707  /* Set new PIC mask */
708  Mask.Both = Pcr->IDR & 0xFFFF;
709  __outbyte(PIC1_DATA_PORT, Mask.Master);
710  __outbyte(PIC2_DATA_PORT, Mask.Slave);
711 
712  /* Set active bit otherwise, and clear it from IRR */
713  PendingIrqMask = (1 << PendingIrql);
714  Pcr->IrrActive |= PendingIrqMask;
715  Pcr->IRR ^= PendingIrqMask;
716 
717  /* Handle delayed hardware interrupt */
718  SWInterruptHandlerTable[PendingIrql]();
719 
720  /* Handling complete */
721  Pcr->IrrActive ^= PendingIrqMask;
722  }
723  else
724  {
725  /* No need to loop checking for hardware interrupts */
726  return SWInterruptHandlerTable2[PendingIrql];
727  }
728  }
729 
730  return NULL;
731 }
KIRQL Irql
Definition: ke.h:298
#define TRUE
Definition: types.h:120
#define UNREFERENCED_PARAMETER(P)
Definition: ntbasedef.h:323
ULONG IDR
Definition: ke.h:22
ULONG FindHigherIrqlMask[32]
Definition: pic.c:216
PPC_QUAL void __outbyte(unsigned long const Port, const unsigned char Data)
Definition: intrin_ppc.h:605
Definition: ke.h:280
#define KeGetPcr()
Definition: ke.h:25
PHAL_SW_INTERRUPT_HANDLER SWInterruptHandlerTable[20]
Definition: pic.c:381
smooth NULL
Definition: ftsmooth.c:416
PHAL_SW_INTERRUPT_HANDLER_2ND_ENTRY SWInterruptHandlerTable2[3]
Definition: pic.c:406
ULONG IrrActive
Definition: ke.h:49
#define PIC2_DATA_PORT
Definition: halp.h:197
Definition: irql.c:21
#define PIC1_DATA_PORT
Definition: halp.h:195
_Requires_lock_held_ Interrupt _Releases_lock_ Interrupt _In_ _IRQL_restores_ KIRQL OldIrql
Definition: kefuncs.h:803
#define BitScanReverse
Definition: interlocked.h:6
#define DISPATCH_LEVEL
Definition: env_spec_w32.h:696
unsigned int ULONG
Definition: retypes.h:1
ULONG IRR
Definition: ke.h:21

◆ HalpHardwareInterruptLevel2()

PHAL_SW_INTERRUPT_HANDLER __cdecl HalpHardwareInterruptLevel2 ( VOID  )

Definition at line 1020 of file pic.c.

1021 {
1022  PKPCR Pcr = KeGetPcr();
1023  ULONG PendingIrqlMask, PendingIrql;
1024 
1025  /* Check for pending software interrupts and compare with current IRQL */
1026  PendingIrqlMask = Pcr->IRR & FindHigherIrqlMask[Pcr->Irql];
1027  if (PendingIrqlMask)
1028  {
1029  /* Check for in-service delayed interrupt */
1030  if (Pcr->IrrActive & 0xFFFFFFF0) return NULL;
1031 
1032  /* Check if pending IRQL affects hardware state */
1033  BitScanReverse(&PendingIrql, PendingIrqlMask);
1034 
1035  /* Clear IRR bit */
1036  Pcr->IRR ^= (1 << PendingIrql);
1037 
1038  /* Now handle pending interrupt */
1039  return SWInterruptHandlerTable[PendingIrql];
1040  }
1041 
1042  return NULL;
1043 }
KIRQL Irql
Definition: ke.h:298
ULONG FindHigherIrqlMask[32]
Definition: pic.c:216
Definition: ke.h:280
#define KeGetPcr()
Definition: ke.h:25
PHAL_SW_INTERRUPT_HANDLER SWInterruptHandlerTable[20]
Definition: pic.c:381
smooth NULL
Definition: ftsmooth.c:416
ULONG IrrActive
Definition: ke.h:49
#define BitScanReverse
Definition: interlocked.h:6
unsigned int ULONG
Definition: retypes.h:1
ULONG IRR
Definition: ke.h:21

◆ HalpInitializePICs()

VOID NTAPI HalpInitializePICs ( IN BOOLEAN  EnableInterrupts)

Definition at line 419 of file pic.c.

420 {
421  ULONG EFlags;
422  EISA_ELCR Elcr;
423  ULONG i, j;
424 
425  /* Save EFlags and disable interrupts */
426  EFlags = __readeflags();
427  _disable();
428 
429  /* Initialize and mask the PIC */
431 
432  /* Read EISA Edge/Level Register for master and slave */
434 
435  /* IRQs 0, 1, 2, 8, and 13 are system-reserved and must be edge */
436  if (!(Elcr.Master.Irq0Level) && !(Elcr.Master.Irq1Level) && !(Elcr.Master.Irq2Level) &&
437  !(Elcr.Slave.Irq8Level) && !(Elcr.Slave.Irq13Level))
438  {
439  /* ELCR is as it's supposed to be, save it */
440  HalpEisaELCR = Elcr.Bits;
441 
442  /* Scan for level interrupts */
443  for (i = 1, j = 0; j < 16; i <<= 1, j++)
444  {
445  if (HalpEisaELCR & i)
446  {
447  /* Switch handler to level */
449 
450  /* Switch dismiss to level */
452  }
453  }
454  }
455 
456  /* Register IRQ 2 */
460  HIGH_LEVEL);
461 
462  /* Restore interrupt state */
464  __writeeflags(EFlags);
465 }
static NTSTATUS EnableInterrupts(IN PPORT_DEVICE_EXTENSION DeviceExtension, IN UCHAR FlagsToDisable, IN UCHAR FlagsToEnable)
Definition: pnp.c:380
LONG HalpEisaELCR
Definition: pic.c:413
USHORT Bits
Definition: halp.h:406
struct _EISA_ELCR::@1480::@1483 Slave
struct _EISA_ELCR::@1480::@1482 Master
VOID NTAPI HalpRegisterVector(IN UCHAR Flags, IN ULONG BusVector, IN ULONG SystemVector, IN KIRQL Irql)
Definition: usage.c:34
PHAL_DISMISS_INTERRUPT HalpSpecialDismissLevelTable[16]
Definition: pic.c:79
#define PRIMARY_VECTOR_BASE
Definition: halp.h:16
PHAL_DISMISS_INTERRUPT HalpSpecialDismissTable[16]
Definition: pic.c:55
#define EISA_ELCR_SLAVE
Definition: halp.h:377
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint i
Definition: glfuncs.h:248
__INTRIN_INLINE uintptr_t __readeflags(void)
Definition: intrin_x86.h:1555
PHAL_SW_INTERRUPT_HANDLER SWInterruptHandlerTable[20]
Definition: pic.c:381
#define EISA_ELCR_MASTER
Definition: halp.h:376
GLsizei GLenum const GLvoid GLsizei GLenum GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLint GLint GLint GLshort GLshort GLshort GLubyte GLubyte GLubyte GLuint GLuint GLuint GLushort GLushort GLushort GLbyte GLbyte GLbyte GLbyte GLdouble GLdouble GLdouble GLdouble GLfloat GLfloat GLfloat GLfloat GLint GLint GLint GLint GLshort GLshort GLshort GLshort GLubyte GLubyte GLubyte GLubyte GLuint GLuint GLuint GLuint GLushort GLushort GLushort GLushort GLboolean const GLdouble const GLfloat const GLint const GLshort const GLbyte const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLdouble const GLfloat const GLfloat const GLint const GLint const GLshort const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort const GLdouble const GLfloat const GLint const GLshort GLenum GLenum GLenum GLfloat GLenum GLint GLenum GLenum GLenum GLfloat GLenum GLenum GLint GLenum GLfloat GLenum GLint GLint GLushort GLenum GLenum GLfloat GLenum GLenum GLint GLfloat const GLubyte GLenum GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid GLenum GLenum const GLfloat GLenum GLenum const GLint GLenum GLenum const GLdouble GLenum GLenum const GLfloat GLenum GLenum const GLint GLsizei GLuint GLfloat GLuint GLbitfield GLfloat GLint GLuint GLboolean GLenum GLfloat GLenum GLbitfield GLenum GLfloat GLfloat GLint GLint const GLfloat GLenum GLfloat GLfloat GLint GLint GLfloat GLfloat GLint GLint const GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat GLint GLfloat GLfloat const GLdouble const GLfloat const GLdouble const GLfloat GLint GLint GLint j
Definition: glfuncs.h:250
#define IDT_INTERNAL
Definition: halp.h:21
__INTRIN_INLINE void __writeeflags(uintptr_t Value)
Definition: intrin_x86.h:1550
#define HIGH_LEVEL
Definition: env_spec_w32.h:703
void __cdecl _disable(void)
Definition: intrin_arm.h:365
unsigned int ULONG
Definition: retypes.h:1
VOID __cdecl HalpHardwareInterruptLevel(VOID)
VOID NTAPI HalpInitializeLegacyPICs(VOID)
Definition: pic.c:18
#define EFLAGS_INTERRUPT_MASK
Definition: ketypes.h:126
PPC_QUAL unsigned char __inbyte(const unsigned long Port)
Definition: intrin_ppc.h:539

◆ HalpIrqToVector()

UCHAR FASTCALL HalpIrqToVector ( UCHAR  Irq)

Definition at line 469 of file pic.c.

470 {
471  return (PRIMARY_VECTOR_BASE + Irq);
472 }
#define PRIMARY_VECTOR_BASE
Definition: halp.h:16

◆ HalpVectorToIrq()

UCHAR FASTCALL HalpVectorToIrq ( UCHAR  Vector)

Definition at line 476 of file pic.c.

477 {
478  return (Vector - PRIMARY_VECTOR_BASE);
479 }
#define PRIMARY_VECTOR_BASE
Definition: halp.h:16

◆ HalpVectorToIrql()

KIRQL FASTCALL HalpVectorToIrql ( UCHAR  Vector)

Definition at line 483 of file pic.c.

484 {
486 }
#define PRIMARY_VECTOR_BASE
Definition: halp.h:16
#define PROFILE_LEVEL
Definition: env_spec_w32.h:698

◆ HalRequestSoftwareInterrupt()

VOID FASTCALL HalRequestSoftwareInterrupt ( IN KIRQL  Irql)

Definition at line 647 of file pic.c.

648 {
649  ULONG EFlags;
650  PKPCR Pcr = KeGetPcr();
651  KIRQL PendingIrql;
652 
653  /* Save EFlags and disable interrupts */
654  EFlags = __readeflags();
655  _disable();
656 
657  /* Mask out the requested bit */
658  Pcr->IRR |= (1 << Irql);
659 
660  /* Check for pending software interrupts and compare with current IRQL */
661  PendingIrql = SWInterruptLookUpTable[Pcr->IRR & 3];
662  if (PendingIrql > Pcr->Irql) SWInterruptHandlerTable[PendingIrql]();
663 
664  /* Restore interrupt state */
665  __writeeflags(EFlags);
666 }
KIRQL Irql
Definition: ke.h:298
Definition: ke.h:280
_Out_ PKIRQL Irql
Definition: csq.h:179
#define KeGetPcr()
Definition: ke.h:25
UCHAR KIRQL
Definition: env_spec_w32.h:591
__INTRIN_INLINE uintptr_t __readeflags(void)
Definition: intrin_x86.h:1555
PHAL_SW_INTERRUPT_HANDLER SWInterruptHandlerTable[20]
Definition: pic.c:381
KIRQL SWInterruptLookUpTable[8]
Definition: pic.c:321
__INTRIN_INLINE void __writeeflags(uintptr_t Value)
Definition: intrin_x86.h:1550
void __cdecl _disable(void)
Definition: intrin_arm.h:365
unsigned int ULONG
Definition: retypes.h:1
ULONG IRR
Definition: ke.h:21

◆ KeGetCurrentIrql()

KIRQL NTAPI KeGetCurrentIrql ( VOID  )

Definition at line 495 of file pic.c.

496 {
497  /* Return the IRQL */
498  return KeGetPcr()->Irql;
499 }
#define KeGetPcr()
Definition: ke.h:25

◆ KeRaiseIrqlToDpcLevel()

KIRQL NTAPI KeRaiseIrqlToDpcLevel ( VOID  )

Definition at line 506 of file pic.c.

507 {
508  PKPCR Pcr = KeGetPcr();
509  KIRQL CurrentIrql;
510 
511  /* Save and update IRQL */
512  CurrentIrql = Pcr->Irql;
513  Pcr->Irql = DISPATCH_LEVEL;
514 
515 #if DBG
516  /* Validate correct raise */
517  if (CurrentIrql > DISPATCH_LEVEL) KeBugCheck(IRQL_NOT_GREATER_OR_EQUAL);
518 #endif
519 
520  /* Return the previous value */
521  return CurrentIrql;
522 }
KIRQL Irql
Definition: ke.h:298
Definition: ke.h:280
#define KeGetPcr()
Definition: ke.h:25
UCHAR KIRQL
Definition: env_spec_w32.h:591
VOID NTAPI KeBugCheck(ULONG BugCheckCode)
Definition: bug.c:1465
#define DISPATCH_LEVEL
Definition: env_spec_w32.h:696

◆ KeRaiseIrqlToSynchLevel()

KIRQL NTAPI KeRaiseIrqlToSynchLevel ( VOID  )

Definition at line 529 of file pic.c.

530 {
531  PKPCR Pcr = KeGetPcr();
532  KIRQL CurrentIrql;
533 
534  /* Save and update IRQL */
535  CurrentIrql = Pcr->Irql;
536  Pcr->Irql = SYNCH_LEVEL;
537 
538 #if DBG
539  /* Validate correct raise */
540  if (CurrentIrql > SYNCH_LEVEL)
541  {
542  /* Crash system */
543  KeBugCheckEx(IRQL_NOT_GREATER_OR_EQUAL,
544  CurrentIrql,
545  SYNCH_LEVEL,
546  0,
547  1);
548  }
549 #endif
550 
551  /* Return the previous value */
552  return CurrentIrql;
553 }
KIRQL Irql
Definition: ke.h:298
Definition: ke.h:280
#define KeGetPcr()
Definition: ke.h:25
UCHAR KIRQL
Definition: env_spec_w32.h:591
#define SYNCH_LEVEL
Definition: env_spec_w32.h:704
VOID NTAPI KeBugCheckEx(_In_ ULONG BugCheckCode, _In_ ULONG_PTR BugCheckParameter1, _In_ ULONG_PTR BugCheckParameter2, _In_ ULONG_PTR BugCheckParameter3, _In_ ULONG_PTR BugCheckParameter4)
Definition: rtlcompat.c:107

◆ KfLowerIrql()

VOID FASTCALL KfLowerIrql ( IN KIRQL  OldIrql)

Definition at line 591 of file pic.c.

592 {
593  ULONG EFlags;
594  ULONG PendingIrql, PendingIrqlMask;
595  PKPCR Pcr = KeGetPcr();
596  PIC_MASK Mask;
597 
598 #if DBG
599  /* Validate correct lower */
600  if (OldIrql > Pcr->Irql)
601  {
602  /* Crash system */
603  Pcr->Irql = HIGH_LEVEL;
604  KeBugCheck(IRQL_NOT_LESS_OR_EQUAL);
605  }
606 #endif
607 
608  /* Save EFlags and disable interrupts */
609  EFlags = __readeflags();
610  _disable();
611 
612  /* Set old IRQL */
613  Pcr->Irql = OldIrql;
614 
615  /* Check for pending software interrupts and compare with current IRQL */
616  PendingIrqlMask = Pcr->IRR & FindHigherIrqlMask[OldIrql];
617  if (PendingIrqlMask)
618  {
619  /* Check if pending IRQL affects hardware state */
620  BitScanReverse(&PendingIrql, PendingIrqlMask);
621  if (PendingIrql > DISPATCH_LEVEL)
622  {
623  /* Set new PIC mask */
624  Mask.Both = Pcr->IDR & 0xFFFF;
625  __outbyte(PIC1_DATA_PORT, Mask.Master);
626  __outbyte(PIC2_DATA_PORT, Mask.Slave);
627 
628  /* Clear IRR bit */
629  Pcr->IRR ^= (1 << PendingIrql);
630  }
631 
632  /* Now handle pending interrupt */
633  SWInterruptHandlerTable[PendingIrql]();
634  }
635 
636  /* Restore interrupt state */
637  __writeeflags(EFlags);
638 }
KIRQL Irql
Definition: ke.h:298
ULONG IDR
Definition: ke.h:22
ULONG FindHigherIrqlMask[32]
Definition: pic.c:216
PPC_QUAL void __outbyte(unsigned long const Port, const unsigned char Data)
Definition: intrin_ppc.h:605
Definition: ke.h:280
#define KeGetPcr()
Definition: ke.h:25
__INTRIN_INLINE uintptr_t __readeflags(void)
Definition: intrin_x86.h:1555
PHAL_SW_INTERRUPT_HANDLER SWInterruptHandlerTable[20]
Definition: pic.c:381
VOID NTAPI KeBugCheck(ULONG BugCheckCode)
Definition: bug.c:1465
#define PIC2_DATA_PORT
Definition: halp.h:197
Definition: irql.c:21
#define PIC1_DATA_PORT
Definition: halp.h:195
_Requires_lock_held_ Interrupt _Releases_lock_ Interrupt _In_ _IRQL_restores_ KIRQL OldIrql
Definition: kefuncs.h:803
__INTRIN_INLINE void __writeeflags(uintptr_t Value)
Definition: intrin_x86.h:1550
#define BitScanReverse
Definition: interlocked.h:6
#define DISPATCH_LEVEL
Definition: env_spec_w32.h:696
#define HIGH_LEVEL
Definition: env_spec_w32.h:703
void __cdecl _disable(void)
Definition: intrin_arm.h:365
unsigned int ULONG
Definition: retypes.h:1
ULONG IRR
Definition: ke.h:21

Referenced by KiCheckForApcDelivery().

◆ KfRaiseIrql()

KIRQL FASTCALL KfRaiseIrql ( IN KIRQL  NewIrql)

Definition at line 560 of file pic.c.

561 {
562  PKPCR Pcr = KeGetPcr();
563  KIRQL CurrentIrql;
564 
565  /* Read current IRQL */
566  CurrentIrql = Pcr->Irql;
567 
568 #if DBG
569  /* Validate correct raise */
570  if (CurrentIrql > NewIrql)
571  {
572  /* Crash system */
573  Pcr->Irql = PASSIVE_LEVEL;
574  KeBugCheck(IRQL_NOT_GREATER_OR_EQUAL);
575  }
576 #endif
577 
578  /* Set new IRQL */
579  Pcr->Irql = NewIrql;
580 
581  /* Return old IRQL */
582  return CurrentIrql;
583 }
KIRQL Irql
Definition: ke.h:298
Definition: ke.h:280
#define KeGetPcr()
Definition: ke.h:25
UCHAR KIRQL
Definition: env_spec_w32.h:591
VOID NTAPI KeBugCheck(ULONG BugCheckCode)
Definition: bug.c:1465
#define PASSIVE_LEVEL
Definition: env_spec_w32.h:693
_Requires_lock_held_ SpinLock _Releases_lock_ SpinLock _In_ _IRQL_restores_ KIRQL NewIrql
Definition: ke.h:114

Referenced by _IRQL_requires_max_(), KeRaiseIrqlToSynchLevel(), and KiCheckForApcDelivery().

Variable Documentation

◆ FindHigherIrqlMask

◆ HalpEisaELCR

LONG HalpEisaELCR

Definition at line 413 of file pic.c.

Referenced by HalpInitializePICs().

◆ HalpSpecialDismissLevelTable

PHAL_DISMISS_INTERRUPT HalpSpecialDismissLevelTable[16]
Initial value:
=
{
}
BOOLEAN NTAPI HalpDismissIrq15Level(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:947
BOOLEAN NTAPI HalpDismissIrqLevel(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:937
BOOLEAN NTAPI HalpDismissIrq13Level(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:982
BOOLEAN NTAPI HalpDismissIrq07Level(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:995

Definition at line 79 of file pic.c.

Referenced by HalEnableSystemInterrupt(), and HalpInitializePICs().

◆ HalpSpecialDismissTable

PHAL_DISMISS_INTERRUPT HalpSpecialDismissTable[16]
Initial value:
=
{
}
BOOLEAN NTAPI HalpDismissIrq07(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:853
BOOLEAN NTAPI HalpDismissIrqGeneric(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:794
BOOLEAN NTAPI HalpDismissIrq13(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:840
BOOLEAN NTAPI HalpDismissIrq15(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql)
Definition: pic.c:804

Definition at line 55 of file pic.c.

Referenced by HalBeginSystemInterrupt(), HalEnableSystemInterrupt(), and HalpInitializePICs().

◆ KiI8259MaskTable

ULONG KiI8259MaskTable[32]

Definition at line 100 of file pic.c.

Referenced by _HalpDismissIrqGeneric(), _HalpDismissIrqLevel(), and HalEnableSystemInterrupt().

◆ SWInterruptHandlerTable

PHAL_SW_INTERRUPT_HANDLER SWInterruptHandlerTable[20]
Initial value:
=
{
HalpHardwareInterrupt0,
HalpHardwareInterrupt1,
HalpHardwareInterrupt2,
HalpHardwareInterrupt3,
HalpHardwareInterrupt4,
HalpHardwareInterrupt5,
HalpHardwareInterrupt6,
HalpHardwareInterrupt7,
HalpHardwareInterrupt8,
HalpHardwareInterrupt9,
HalpHardwareInterrupt10,
HalpHardwareInterrupt11,
HalpHardwareInterrupt12,
HalpHardwareInterrupt13,
HalpHardwareInterrupt14,
HalpHardwareInterrupt15
}
VOID __cdecl HalpDispatchInterrupt(VOID)
VOID KiUnexpectedInterrupt(VOID)
Definition: interrupt.c:51
VOID __cdecl HalpApcInterrupt(VOID)
VOID(__cdecl * PHAL_SW_INTERRUPT_HANDLER)(VOID)
Definition: halp.h:32

Definition at line 381 of file pic.c.

Referenced by HalEnableSystemInterrupt(), HalEndSystemInterrupt2(), HalpDispatchInterrupt2(), HalpEndSoftwareInterrupt2(), HalpHardwareInterruptLevel2(), HalpInitializePICs(), HalRequestSoftwareInterrupt(), and KfLowerIrql().

◆ SWInterruptHandlerTable2

PHAL_SW_INTERRUPT_HANDLER_2ND_ENTRY SWInterruptHandlerTable2[3]
Initial value:
=
{
}
DECLSPEC_NORETURN VOID FASTCALL HalpDispatchInterrupt2ndEntry(IN PKTRAP_FRAME TrapFrame)
Definition: pic.c:1288
DECLSPEC_NORETURN VOID FASTCALL HalpApcInterrupt2ndEntry(IN PKTRAP_FRAME TrapFrame)
Definition: pic.c:1239
VOID(FASTCALL * PHAL_SW_INTERRUPT_HANDLER_2ND_ENTRY)(IN PKTRAP_FRAME TrapFrame)
Definition: halp.h:38
VOID KiUnexpectedInterrupt(VOID)
Definition: interrupt.c:51

Definition at line 406 of file pic.c.

Referenced by HalEndSystemInterrupt2(), and HalpEndSoftwareInterrupt2().

◆ SWInterruptLookUpTable

KIRQL SWInterruptLookUpTable[8]
Initial value:

Definition at line 321 of file pic.c.

Referenced by HalRequestSoftwareInterrupt().