addl andl ax eax ebx edx L01 L02 L03 L04 leal leal mm0 mm1 mm2 mm3 mm4 mm5 mm6 mm7 movl movl movq next_loop null_one one_null pmaddwd psrad psrlq shrl subl TEMP TEMP testl

ecx edi ebx edx edi decl ecx esi eax jecxz L01 decl eax andl eax esi movl edx edx movl TEMP incl eax andl eax ecx incl ebx eax jnz L02 xchgl ecx incl TEMP esi esp ecx subl ebx pushl ecx ecx leal ( %  edi, %  ecx, 2    )