VOID VGADDI_BltPointerToVGA	(	IN LONG	StartX,
		IN LONG	StartY,
		IN ULONG	SizeX,
		IN ULONG	SizeY,
		IN PUCHAR	MaskBits,
		IN ULONG	MaskPitch,
		IN ULONG	MaskOp
	)
Definition at line 21 of file pointer.c.
Referenced by VGADDI_ShowCursor().
{
    ULONG DestX, EndX, DestY, EndY;
    UCHAR Mask;
    PUCHAR Video;
    PUCHAR Src;
    UCHAR SrcValue;
    ULONG i, j;
    ULONG Left;
    ULONG Length;
    LONG Bits;

    DestX = StartX < 0 ? 0 : StartX;
    DestY = StartY < 0 ? 0 : StartY;
    EndX = StartX + SizeX;
    EndY = StartY + SizeY;

    /* Set write mode zero. */
    WRITE_PORT_UCHAR((PUCHAR)GRA_I, 5);
    WRITE_PORT_UCHAR((PUCHAR)GRA_D, 0);

    /* Select raster op. */
    WRITE_PORT_UCHAR((PUCHAR)GRA_I, 3);
    WRITE_PORT_UCHAR((PUCHAR)GRA_D, MaskOp);

    if ((DestX % 8) != 0)
    {
        /* Disable writes to pixels outside of the destination rectangle. */
        Mask = (1 << (8 - (DestX % 8))) - 1;
        if ((EndX - DestX) < (8 - (DestX % 8)))
        {
            Mask &= ~((1 << (8 - (EndX % 8))) - 1);
        }
        WRITE_PORT_UCHAR((PUCHAR)GRA_I, 0x8);
        WRITE_PORT_UCHAR((PUCHAR)GRA_D, Mask);

        /* Write the mask. */
        Video = (PUCHAR)vidmem + DestY * 80 + (DestX >> 3);
        Src = MaskBits + (SizeY - (DestY - StartY)) * MaskPitch;
        for (i = DestY; i < EndY; i++, Video += 80)
        {
            Src -= MaskPitch;
            SrcValue = (*Src) >> (DestX % 8);
            (VOID)READ_REGISTER_UCHAR(Video);
            WRITE_REGISTER_UCHAR(Video, SrcValue);
        }
    }

    /* Enable writes to all pixels. */
    WRITE_PORT_UCHAR((PUCHAR)GRA_I, 0x8);
    WRITE_PORT_UCHAR((PUCHAR)GRA_D, 0xFF);

    /* Have we finished. */
    if ((EndX - DestX) < (8 - (DestX % 8)))
        return;

    /* Fill any whole rows of eight pixels. */
    Left = (DestX + 7) & ~0x7;
    Length = (EndX >> 3) - (Left >> 3);
    Bits = StartX;
    while (Bits < 0)
        Bits += 8;
    Bits = Bits % 8;
    for (i = DestY; i < EndY; i++)
    {
        Video = (PUCHAR)vidmem + i * 80 + (Left >> 3);
        Src = MaskBits + (EndY - i - 1) * MaskPitch + ((DestX - StartX) >> 3);
        for (j = 0; j < Length; j++, Video++, Src++)
        {
            if (Bits != 0)
            {
                SrcValue = (Src[0] << (8 - Bits));
                SrcValue |= (Src[1] >> Bits);
            }
            else
            {
                SrcValue = Src[0];
            }
            (VOID)READ_REGISTER_UCHAR(Video);
            WRITE_REGISTER_UCHAR(Video, SrcValue);
        }
    }

    /* Fill any pixels on the right which don't fall into a complete row. */
    if ((EndX % 8) != 0)
    {
        /* Disable writes to pixels outside the destination rectangle. */
        Mask = ~((1 << (8 - (EndX % 8))) - 1);
        WRITE_PORT_UCHAR((PUCHAR)GRA_I, 0x8);
        WRITE_PORT_UCHAR((PUCHAR)GRA_D, Mask);

        Video = (PUCHAR)vidmem + DestY * 80 + (EndX >> 3);
        Src = MaskBits + (SizeY - (DestY - StartY)) * MaskPitch + (SizeX >> 3) - 1;
        for (i = DestY; i < EndY; i++, Video += 80)
        {
            Src -= MaskPitch;
            SrcValue = (Src[0] << (8 - Bits));
            (VOID)READ_REGISTER_UCHAR(Video);
            WRITE_REGISTER_UCHAR(Video, SrcValue);
        }

        /* Restore the default write masks. */
        WRITE_PORT_UCHAR((PUCHAR)GRA_I, 0x8);
        WRITE_PORT_UCHAR((PUCHAR)GRA_D, 0xFF);
    }

    /* Set write mode two. */
    WRITE_PORT_UCHAR((PUCHAR)GRA_I, 5);
    WRITE_PORT_UCHAR((PUCHAR)GRA_D, 2);

    /* Select raster op replace. */
    WRITE_PORT_UCHAR((PUCHAR)GRA_I, 3);
    WRITE_PORT_UCHAR((PUCHAR)GRA_D, 0);
}
ReactOS Development > Doxygen
