AutomaticEoi BCD_INT BufferedMaster BufferedSlave Cascade CMOS_CONTROL_PORT CMOS_DATA_PORT EdgeTriggered EISA_ELCR_MASTER EISA_ELCR_SLAVE GRAPHICS_MODE_12 HAL_APC_REQUEST HAL_BUILD_TYPE HAL_DPC_REQUEST HalAddressToPde HalAddressToPte HalDisableFirmwareMapper HalHardwareIdString HaliHaltSystem HaliInitPnpDriver HaliQuerySystemInformation HaliSetSystemInformation HalName HALP_CARD_FEATURE_FULL_DECODE HALP_CHECK_CARD_REVISION_ID HALP_CHECK_CARD_SUBSYSTEM_ID HALP_CHECK_CARD_SUBVENDOR_ID HALP_HACK_FLAGS HALP_REVISION_FROM_HACK_FLAGS HALP_REVISION_HACK_FLAGS HalpAcquireCmosSpinLock HalpActiveProcessors HalpAddressUsageList HalpAllocateAdapterEx HalpAllocPhysicalMemory HalpApcInterrupt HalpApcInterrupt2ndEntry HalpBiosDisplayReset HalpBuildAddressMap HalpBuildType HalpCalibrateStallExecution HalpCheckPowerButton HalpClockInterrupt HalpDebugPciDumpBus HalpDefaultInterruptAffinity HalpDefaultIoSpace HalpDismissIrq07 HalpDismissIrq07Level HalpDismissIrq13 HalpDismissIrq13Level HalpDismissIrq15 HalpDismissIrq15Level HalpDismissIrqGeneric HalpDismissIrqLevel HalpDispatchInterrupt HalpDispatchInterrupt2 HalpDispatchInterrupt2ndEntry HalpEnableInterruptHandler HalpExitToV86 HalpFlushTLB HalpGetDebugPortTable HalpGetNMICrashFlag HalpHardwareInterruptLevel HalpIDTUsageFlags HalpInitBusHandlers HalpInitDma HalpInitializeClock HalpInitializeCmos HalpInitializePICs HalpInitPciBus HalpInitPhase0 HalpInitPhase1 HalpInitProcessor HalpIs16BitPortDecodeSupported HalpMapPhysicalMemory64 HalpMarkAcpiHal HalpNMIInProgress HalpOpenRegistryKey HalpPerfCounter HalpProfileInterrupt HalpQueryAcpiResourceRequirements HalpReadCmos HalpRealModeStart HalpRegisterKdSupportFunctions HalpRegisterVector HalpReleaseCmosSpinLock HalpReleasePciDeviceForDebugging HalpReportResourceUsage HalpReportSerialNumber HalpSetupPciDeviceForDebugging HalpSystemHardwareLock HalpUnmapVirtualAddress HalpWriteCmos I8259_EOI_MODE I8259_ICW1_INTERRUPT_MODE I8259_ICW1_INTERVAL I8259_ICW1_OPERATING_MODE I8259_ICW4_BUFFERED_MODE I8259_ICW4_EOI_MODE I8259_ICW4_SYSTEM_MODE I8259_IDR I8259_READ_REQUEST IDT_DEVICE IDT_INTERNAL IDT_LATCHED IDT_READ_ONLY IDT_REGISTERED INIT_FUNCTION INT_BCD Interval4 Interval8 InvalidEoiMode InvalidRequest InvalidRequest2 KeUpdateSystemTime LevelTriggered Mcs8085Mode New8086Mode NonBuffered NonBuffered2 NonSpecificEoi NormalEoi PAGE_LOCKED_FUNCTION PAGE_UNLOCKED_FUNCTION PHAL_DISMISS_INTERRUPT PHAL_SW_INTERRUPT_HANDLER PHAL_SW_INTERRUPT_HANDLER_2ND_ENTRY PI8259_IDR PIC1_CONTROL_PORT PIC1_DATA_PORT PIC2_CONTROL_PORT PIC2_DATA_PORT PIT_FREQUENCY PitAccessModeCounterLatch PitAccessModeHigh PitAccessModeLow PitAccessModeLowHigh PitChannel0 PitChannel1 PitChannel2 PitOperatingMode0 PitOperatingMode1 PitOperatingMode2 PitOperatingMode2Reserved PitOperatingMode3 PitOperatingMode4 PitOperatingMode5 PitOperatingMode5Reserved PitReadBack PLACE_IN_SECTION ReadIdr ReadIsr REGISTERCALL RotateAutoEoiClear RotateAutoEoiSet RotateNonSpecific RotateSpecific RTC_REG_A_UIP RTC_REG_B_PI RTC_REGISTER_A RTC_REGISTER_B RTC_REGISTER_C RTC_REGISTER_CENTURY RTC_REGISTER_D SET_VIDEO_MODE SetPriority Single SpecificEoi SYSTEM_CONTROL_PORT_A SYSTEM_CONTROL_PORT_B TIMER_ACCESS_MODES TIMER_CHANNEL0_DATA_PORT TIMER_CHANNEL1_DATA_PORT TIMER_CHANNEL2_DATA_PORT TIMER_CHANNELS TIMER_CONTROL_PORT TIMER_OPERATING_MODES VIDEO_SERVICES

BOOLEAN REGISTERCALL HalpDismissIrq15Level ( IN KIRQL  Irql, IN ULONG  Irq, OUT PKIRQL  OldIrql  ) Definition at line 997 of file pic.c. { I8259_OCW3 Ocw3; I8259_OCW2 Ocw2; I8259_ISR Isr; /* Request the ISR */ Ocw3.Bits = 0; Ocw3.Sbo = 1; /* This encodes an OCW3 vs. an OCW2 */ Ocw3.ReadRequest = ReadIsr; __outbyte(PIC2_CONTROL_PORT, Ocw3.Bits); /* Read the ISR */ Isr.Bits = __inbyte(PIC2_CONTROL_PORT); /* Is IRQ15 really active (this is IR7) */ if (Isr.Irq7 == FALSE) { /* It isn't, so we have to EOI IRQ2 because this was cascaded */ Ocw2.Bits = 0; Ocw2.EoiMode = SpecificEoi; __outbyte(PIC1_CONTROL_PORT, Ocw2.Bits | 2); /* And now fail since this was spurious */ return FALSE; } /* Do normal interrupt dismiss */ return _HalpDismissIrqLevel(Irql, Irq, OldIrql); }