GetPteAddress HalpReboot HalpWriteResetCommand HalReturnToFirmware NDEBUG

VOID NTAPI HalpReboot ( VOID  ) Definition at line 30 of file reboot.c. Referenced by HalReturnToFirmware(). { UCHAR Data; PVOID ZeroPageMapping; PHARDWARE_PTE Pte; /* Get a PTE in the HAL reserved region */ ZeroPageMapping = (PVOID)(0xFFC00000 + PAGE_SIZE); Pte = GetPteAddress(ZeroPageMapping); /* Make it valid and map it to the first physical page */ Pte->Valid = 1; Pte->Write = 1; Pte->Owner = 1; Pte->PageFrameNumber = 0; /* Flush the TLB by resetting CR3 */ __writecr3(__readcr3()); /* Enable warm reboot */ ((PUSHORT)ZeroPageMapping)[0x239] = 0x1234; /* Lock CMOS Access (and disable interrupts) */ HalpAcquireCmosSpinLock(); /* Setup control register B */ WRITE_PORT_UCHAR((PUCHAR)0x70, 0x0B); KeStallExecutionProcessor(1); /* Read periodic register and clear the interrupt enable */ Data = READ_PORT_UCHAR((PUCHAR)0x71); WRITE_PORT_UCHAR((PUCHAR)0x71, Data & ~0x40); KeStallExecutionProcessor(1); /* Setup control register A */ WRITE_PORT_UCHAR((PUCHAR)0x70, 0x0A); KeStallExecutionProcessor(1); /* Read divider rate and reset it */ Data = READ_PORT_UCHAR((PUCHAR)0x71); WRITE_PORT_UCHAR((PUCHAR)0x71, (Data & ~0x9) | 0x06); KeStallExecutionProcessor(1); /* Reset neutral CMOS address */ WRITE_PORT_UCHAR((PUCHAR)0x70, 0x15); KeStallExecutionProcessor(1); /* Flush write buffers and send the reset command */ KeFlushWriteBuffer(); HalpWriteResetCommand(); /* Halt the CPU */ __halt(); }