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ReactOS Development > Doxygenhwlcd.c
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00001 /* 00002 * PROJECT: ReactOS Boot Loader 00003 * LICENSE: BSD - See COPYING.ARM in the top level directory 00004 * FILE: boot/armllb/hw/omap3-zoom2/hwlcd.c 00005 * PURPOSE: LLB LCD Routines for OMAP3 ZOOM2 00006 * PROGRAMMERS: ReactOS Portable Systems Group 00007 */ 00008 00009 #include "precomp.h" 00010 00011 PUSHORT LlbHwVideoBuffer; 00012 00013 VOID 00014 NTAPI 00015 LlbHwOmap3LcdInitialize(VOID) 00016 { 00017 /* 00018 * N.B. The following initialization sequence took about 12 months to figure 00019 * out. 00020 * This means if you are glancing at it and have no idea what on Earth 00021 * could possibly be going on, this is *normal*. 00022 * Just trust that this turns on the LCD. 00023 * And be thankful all you ever have to worry about is Java and HTML. 00024 */ 00025 00026 /* Turn on the functional and interface clocks in the entire PER domain */ 00027 WRITE_REGISTER_ULONG(0x48005000, 0x3ffff); /* Functional clocks */ 00028 WRITE_REGISTER_ULONG(0x48005010, 0x3ffff); /* Interface clocks */ 00029 00030 /* Now that GPIO Module 3 is on, send a reset to the LCD panel on GPIO 96 */ 00031 WRITE_REGISTER_ULONG(0x49054034, 0); /* FIXME: Enable all as output */ 00032 WRITE_REGISTER_ULONG(0x49054094, 0xffffffff); /* FIXME: Output on all gpios */ 00033 00034 /* Now turn on the functional and interface clocks in the CORE domain */ 00035 WRITE_REGISTER_ULONG(0x48004a00, 0x03fffe29); /* Functional clocks */ 00036 WRITE_REGISTER_ULONG(0x48004a10, 0x3ffffffb); /* Interface clocks */ 00037 00038 /* The HS I2C interface is now on, configure it */ 00039 WRITE_REGISTER_USHORT(0x48070024, 0x0); /* Disable I2c */ 00040 WRITE_REGISTER_USHORT(0x48070030, 0x17); /* Configure clock divider */ 00041 WRITE_REGISTER_USHORT(0x48070034, 0xd); /* Configure clock scaler */ 00042 WRITE_REGISTER_USHORT(0x48070038, 0xf); /* Configure clock scaler */ 00043 WRITE_REGISTER_USHORT(0x48070020, 0x215); /* Configure clocks and idle */ 00044 WRITE_REGISTER_USHORT(0x4807000c, 0x636f); /* Select wakeup bits */ 00045 WRITE_REGISTER_USHORT(0x48070014, 0x4343); /* Disable DMA */ 00046 WRITE_REGISTER_USHORT(0x48070024, 0x8000); /* Enable I2C */ 00047 00048 /* 00049 * Set the VPLL2 to cover all device groups instead of just P3. 00050 * This essentially enables the VRRTC to power up the LCD panel. 00051 */ 00052 LlbHwOmap3TwlWrite1(0x4B, 0x8E, 0xE0); 00053 00054 /* VPLL2 runs at 1.2V by default, so we need to reprogram to 1.8V for DVI */ 00055 LlbHwOmap3TwlWrite1(0x4B, 0x91, 0x05); 00056 00057 /* Set GPIO pin 7 on the TWL4030 as an output pin */ 00058 LlbHwOmap3TwlWrite1(0x49, 0x9B, 0x80); 00059 00060 /* Set GPIO pin 7 signal on the TWL4030 ON. This powers the LCD backlight */ 00061 LlbHwOmap3TwlWrite1(0x49, 0xA4, 0x80); 00062 00063 /* Now go on the McSPI interface and program it on for the channel */ 00064 WRITE_REGISTER_ULONG(0x48098010, 0x15); 00065 WRITE_REGISTER_ULONG(0x48098020, 0x1); 00066 WRITE_REGISTER_ULONG(0x48098028, 0x1); 00067 WRITE_REGISTER_ULONG(0x4809802c, 0x112fdc); 00068 00069 /* Send the reset signal (R2 = 00h) to the NEC WVGA LCD Panel */ 00070 WRITE_REGISTER_ULONG(0x48098034, 0x1); 00071 WRITE_REGISTER_ULONG(0x48098038, 0x20100); 00072 WRITE_REGISTER_ULONG(0x48098034, 0x0); 00073 00074 /* Turn on the functional and interface clocks in the DSS domain */ 00075 WRITE_REGISTER_ULONG(0x48004e00, 0x5); 00076 WRITE_REGISTER_ULONG(0x48004e10, 0x1); 00077 00078 /* Reset the Display Controller (DISPC) */ 00079 WRITE_REGISTER_ULONG(0x48050410, 0x00000005); // DISPC_SYSCONFIG 00080 00081 /* Set the frame buffer address */ 00082 WRITE_REGISTER_ULONG(0x48050480, 0x800A0000); // DISPC_GFX_BA0 00083 00084 /* Set resolution and RGB16 color mode */ 00085 WRITE_REGISTER_ULONG(0x4805048c, 0x01df031f); // DISPC_GFX_SIZE 00086 WRITE_REGISTER_ULONG(0x480504a0, 0x0000000d); // DISPC_GFX_ATTRIBUTES 00087 00088 /* Set LCD timings (VSync and HSync), pixel clock, and LCD size */ 00089 WRITE_REGISTER_ULONG(0x4805046c, 0x00003000); // DISPC_POL_FREQ 00090 WRITE_REGISTER_ULONG(0x48050470, 0x00010004); // DISPC_DIVISOR 00091 WRITE_REGISTER_ULONG(0x48050464, 0x00300500); // DISPC_TIMING_H 00092 WRITE_REGISTER_ULONG(0x48050468, 0x00400300); // DISPC_TIMING_V 00093 WRITE_REGISTER_ULONG(0x4805047c, 0x01df031f); // DISPC_SIZE_LCD 00094 00095 /* Turn the LCD on */ 00096 WRITE_REGISTER_ULONG(0x48050440, 0x00018309); // DISPC_CONTROL 00097 } 00098 00099 ULONG 00100 NTAPI 00101 LlbHwGetScreenWidth(VOID) 00102 { 00103 return 800; 00104 } 00105 00106 ULONG 00107 NTAPI 00108 LlbHwGetScreenHeight(VOID) 00109 { 00110 return 480; 00111 } 00112 00113 PVOID 00114 NTAPI 00115 LlbHwGetFrameBuffer(VOID) 00116 { 00117 return (PVOID)0x800A0000; 00118 } 00119 00120 ULONG 00121 NTAPI 00122 LlbHwVideoCreateColor(IN ULONG Red, 00123 IN ULONG Green, 00124 IN ULONG Blue) 00125 { 00126 return (((Red >> 3) << 11)| ((Green >> 2) << 5)| ((Blue >> 3) << 0)); 00127 } 00128 00129 /* EOF */ Generated on Sun May 27 2012 04:19:00 for ReactOS by
1.7.6.1
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