BCR16 BCR17 BCR18 BCR18_BREADE BCR18_BWRITE BCR18_DWIO BCR18_EXTREQ BCR18_MEMCMD BCR19 BCR19_ECS BCR19_ED0 BCR19_EDI BCR19_EEDET BCR19_EEN BCR19_ESK BCR19_PREAD BCR19_PVALID BCR2 BCR20 BCR20_APERREN BCR20_CSRPCNET BCR20_SSIZE32 BCR21 BCR22 BCR2_APROMWE BCR2_ASEL BCR2_AWAKE BCR2_DXCVRCTL BCR2_DXCVRPOL BCR2_EADISEL BCR2_INTLEVEL BCR2_LEDPE BCR2_TMAULOOP BCR4 BCR4_COLE BCR4_E100 BCR4_FDLSE BCR4_JABE BCR4_LEDDIS BCR4_LEDOUT BCR4_LEDPOL BCR4_LNKSTE BCR4_MPSE BCR4_PSE BCR4_RCVE BCR4_RCVME BCR4_RXPOLE BCR4_XMTE BCR5 BCR5_COLE BCR5_E100 BCR5_FDLSE BCR5_JABE BCR5_LEDDIS BCR5_LEDOUT BCR5_LEDPOL BCR5_LNKSTE BCR5_MPSE BCR5_PSE BCR5_RCVE BCR5_RCVME BCR5_RXPOLE BCR5_XMTE BCR6 BCR6_COLE BCR6_E100 BCR6_FDLSE BCR6_JABE BCR6_LEDDIS BCR6_LEDOUT BCR6_LEDPOL BCR6_LNKSTE BCR6_MPSE BCR6_PSE BCR6_RCVE BCR6_RCVME BCR6_RXPOLE BCR6_XMTE BCR7 BCR7_COLE BCR7_E100 BCR7_FDLSE BCR7_JABE BCR7_LEDDIS BCR7_LEDOUT BCR7_LEDPOL BCR7_LNKSTE BCR7_MPSE BCR7_PSE BCR7_RCVE BCR7_RCVME BCR7_RXPOLE BCR7_XMTE BCR9 BCR9_AUIFD BCR9_FDEN BCR9_FDRPAD BDP BDP16 BDP32 CSR0 CSR0_BABL CSR0_CERR CSR0_ERR CSR0_IDON CSR0_IENA CSR0_INIT CSR0_INTR CSR0_MERR CSR0_MISS CSR0_RINT CSR0_RXON CSR0_STOP CSR0_STRT CSR0_TDMD CSR0_TINT CSR0_TXON CSR1 CSR10 CSR100 CSR11 CSR112 CSR114 CSR12 CSR122 CSR124 CSR124_RPA CSR13 CSR14 CSR15 CSR15_DAPC CSR15_DLNKTST CSR15_DRCVBC CSR15_DRCVPA CSR15_DRTY CSR15_DRX CSR15_DTX CSR15_DXMTFCS CSR15_FCOLL CSR15_INTL CSR15_LOOP CSR15_LRT CSR15_MENDECL CSR15_PORTSEL0 CSR15_PORTSEL1 CSR15_PROM CSR15_TSEL CSR16 CSR17 CSR18 CSR19 CSR2 CSR20 CSR21 CSR22 CSR23 CSR24 CSR25 CSR26 CSR27 CSR28 CSR29 CSR3 CSR30 CSR31 CSR32 CSR33 CSR34 CSR35 CSR36 CSR37 CSR38 CSR39 CSR3_BABLM CSR3_BSWP CSR3_DXMT2PD CSR3_DXSUFLO CSR3_EMBA CSR3_IDONM CSR3_LAPPEN CSR3_MERRM CSR3_MISSM CSR3_RINTM CSR3_TINTM CSR4 CSR40 CSR41 CSR42 CSR43 CSR44 CSR45 CSR46 CSR47 CSR4_APAD_XMT CSR4_ASTRP_RCV CSR4_DMAPLUS CSR4_DPOLL CSR4_EN124 CSR4_JAB CSR4_JABM CSR4_MFCO CSR4_MFCOM CSR4_RCVCCO CSR4_RCVCCOM CSR4_TIMER CSR4_TXSTRT CSR4_TXSTRTM CSR4_UINT CSR4_UINTCMD CSR5 CSR58 CSR58_APERREN CSR58_CSRPCNET CSR58_SSIZE32 CSR5_EXDINT CSR5_EXDINTE CSR5_LTINTEN CSR5_MPEN CSR5_MPINT CSR5_MPINTE CSR5_MPMODE CSR5_MPPLBA CSR5_SINE CSR5_SINT CSR5_SLPINT CSR5_SLPINTE CSR5_SPND CSR5_TOKINTD CSR6 CSR60 CSR61 CSR62 CSR63 CSR64 CSR65 CSR66 CSR67 CSR72 CSR74 CSR76 CSR78 CSR8 CSR80 CSR82 CSR84 CSR85 CSR86 CSR88 CSR89 CSR9 CSR94 DEV_ID MASK16 NUMBER_OF_PORTS PCI_ID RAP RAP16 RAP32 RD_BAM RD_BPE RD_BUFF RD_CRC RD_ENP RD_ERR RD_FRAM RD_LAFM RD_OFLO RD_OWN RD_PAM RD_STP RDP RESET16 RESET32 SW_STYLE_0 SW_STYLE_1 SW_STYLE_2 SW_STYLE_3 TD1_ADD_FCS TD1_BPE TD1_DEF TD1_ENP TD1_ERR TD1_LTINT TD1_MORE TD1_NO_FCS TD1_ONE TD1_OWN TD1_STP TD2_BUFF TD2_EXDEF TD2_LCAR TD2_LCOL TD2_RTRY TD2_UFLO VEN_ID

#define BCR5_JABE   0x2 /* jabber status enable */ Definition at line 273 of file pcnethw.h.