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ReactOS Development > Doxygen

actbl71.h
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00001 /******************************************************************************
00002  *
00003  * Name: actbl71.h - IA-64 Extensions to the ACPI Spec Rev. 0.71
00004  *                   This file includes tables specific to this
00005  *                   specification revision.
00006  *       $Revision: 1.1 $
00007  *
00008  *****************************************************************************/
00009 
00010 /*
00011  *  Copyright (C) 2000, 2001 R. Byron Moore
00012  *
00013  *  This program is free software; you can redistribute it and/or modify
00014  *  it under the terms of the GNU General Public License as published by
00015  *  the Free Software Foundation; either version 2 of the License, or
00016  *  (at your option) any later version.
00017  *
00018  *  This program is distributed in the hope that it will be useful,
00019  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
00020  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00021  *  GNU General Public License for more details.
00022  *
00023  *  You should have received a copy of the GNU General Public License
00024  *  along with this program; if not, write to the Free Software
00025  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
00026  */
00027 
00028 #ifndef __ACTBL71_H__
00029 #define __ACTBL71_H__
00030 
00031 /* 0.71 FADT Address_space data item bitmasks defines */
00032 /* If the associated bit is zero then it is in memory space else in io space */
00033 #define SMI_CMD_ADDRESS_SPACE       0x01
00034 #define PM1_BLK_ADDRESS_SPACE       0x02
00035 #define PM2_CNT_BLK_ADDRESS_SPACE   0x04
00036 #define PM_TMR_BLK_ADDRESS_SPACE    0x08
00037 #define GPE0_BLK_ADDRESS_SPACE      0x10
00038 #define GPE1_BLK_ADDRESS_SPACE      0x20
00039 
00040 /* Only for clarity in declarations */
00041 typedef UINT64              IO_ADDRESS;
00042 
00043 #pragma pack(1)
00044 
00045 typedef struct  /* Root System Descriptor Pointer */
00046 {
00047     NATIVE_CHAR             signature [8];          /* contains "RSD PTR " */
00048     u8                      checksum;               /* to make sum of struct == 0 */
00049     NATIVE_CHAR             oem_id [6];             /* OEM identification */
00050     u8                      reserved;               /* Must be 0 for 1.0, 2 for 2.0 */
00051     UINT64                  rsdt_physical_address;  /* 64-bit physical address of RSDT */
00052 } RSDP_DESCRIPTOR_REV071;
00053 
00054 
00055 /*****************************************/
00056 /* IA64 Extensions to ACPI Spec Rev 0.71 */
00057 /* for the Root System Description Table */
00058 /*****************************************/
00059 typedef struct
00060 {
00061     ACPI_TABLE_HEADER   header;                 /* Table header */
00062     u32                 reserved_pad;           /* IA64 alignment, must be 0 */
00063     UINT64              table_offset_entry [1]; /* Array of pointers to other */
00064                /* tables' headers */
00065 } RSDT_DESCRIPTOR_REV071;
00066 
00067 
00068 /*******************************************/
00069 /* IA64 Extensions to ACPI Spec Rev 0.71   */
00070 /* for the Firmware ACPI Control Structure */
00071 /*******************************************/
00072 typedef struct
00073 {
00074     NATIVE_CHAR         signature[4];         /* signature "FACS" */
00075     u32                 length;               /* length of structure, in bytes */
00076     u32                 hardware_signature;   /* hardware configuration signature */
00077     u32                 reserved4;            /* must be 0 */
00078     UINT64              firmware_waking_vector; /* ACPI OS waking vector */
00079     UINT64              global_lock;          /* Global Lock */
00080     u32                 S4_bios_f     : 1;    /* Indicates if S4_bIOS support is present */
00081     u32                 reserved1     : 31;   /* must be 0 */
00082     u8                  reserved3 [28];       /* reserved - must be zero */
00083 
00084 } FACS_DESCRIPTOR_REV071;
00085 
00086 
00087 /******************************************/
00088 /* IA64 Extensions to ACPI Spec Rev 0.71  */
00089 /* for the Fixed ACPI Description Table   */
00090 /******************************************/
00091 typedef struct
00092 {
00093     ACPI_TABLE_HEADER   header;             /* table header */
00094     u32                 reserved_pad;       /* IA64 alignment, must be 0 */
00095     UINT64              firmware_ctrl;      /* 64-bit Physical address of FACS */
00096     UINT64              dsdt;               /* 64-bit Physical address of DSDT */
00097     u8                  model;              /* System Interrupt Model */
00098     u8                  address_space;      /* Address Space Bitmask */
00099     u16                 sci_int;            /* System vector of SCI interrupt */
00100     u8                  acpi_enable;        /* value to write to smi_cmd to enable ACPI */
00101     u8                  acpi_disable;       /* value to write to smi_cmd to disable ACPI */
00102     u8                  S4_bios_req;        /* Value to write to SMI CMD to enter S4_bIOS state */
00103     u8                  reserved2;          /* reserved - must be zero */
00104     UINT64              smi_cmd;            /* Port address of SMI command port */
00105     UINT64              pm1a_evt_blk;       /* Port address of Power Mgt 1a Acpi_event Reg Blk */
00106     UINT64              pm1b_evt_blk;       /* Port address of Power Mgt 1b Acpi_event Reg Blk */
00107     UINT64              pm1a_cnt_blk;       /* Port address of Power Mgt 1a Control Reg Blk */
00108     UINT64              pm1b_cnt_blk;       /* Port address of Power Mgt 1b Control Reg Blk */
00109     UINT64              pm2_cnt_blk;        /* Port address of Power Mgt 2 Control Reg Blk */
00110     UINT64              pm_tmr_blk;         /* Port address of Power Mgt Timer Ctrl Reg Blk */
00111     UINT64              gpe0blk;            /* Port addr of General Purpose Acpi_event 0 Reg Blk */
00112     UINT64              gpe1_blk;           /* Port addr of General Purpose Acpi_event 1 Reg Blk */
00113     u8                  pm1_evt_len;        /* Byte Length of ports at pm1_x_evt_blk */
00114     u8                  pm1_cnt_len;        /* Byte Length of ports at pm1_x_cnt_blk */
00115     u8                  pm2_cnt_len;        /* Byte Length of ports at pm2_cnt_blk */
00116     u8                  pm_tm_len;          /* Byte Length of ports at pm_tm_blk */
00117     u8                  gpe0blk_len;        /* Byte Length of ports at gpe0_blk */
00118     u8                  gpe1_blk_len;       /* Byte Length of ports at gpe1_blk */
00119     u8                  gpe1_base;          /* offset in gpe model where gpe1 events start */
00120     u8                  reserved3;          /* reserved */
00121     u16                 plvl2_lat;          /* worst case HW latency to enter/exit C2 state */
00122     u16                 plvl3_lat;          /* worst case HW latency to enter/exit C3 state */
00123     u8                  day_alrm;           /* index to day-of-month alarm in RTC CMOS RAM */
00124     u8                  mon_alrm;           /* index to month-of-year alarm in RTC CMOS RAM */
00125     u8                  century;            /* index to century in RTC CMOS RAM */
00126     u8                  reserved4;          /* reserved */
00127     u32                 flush_cash  : 1;    /* PAL_FLUSH_CACHE is correctly supported */
00128     u32                 reserved5   : 1;    /* reserved - must be zero */
00129     u32                 proc_c1     : 1;    /* all processors support C1 state */
00130     u32                 plvl2_up    : 1;    /* C2 state works on MP system */
00131     u32                 pwr_button  : 1;    /* Power button is handled as a generic feature */
00132     u32                 sleep_button : 1;   /* Sleep button is handled as a generic feature, or not present */
00133     u32                 fixed_rTC   : 1;    /* RTC wakeup stat not in fixed register space */
00134     u32                 rtcs4       : 1;    /* RTC wakeup stat not possible from S4 */
00135     u32                 tmr_val_ext : 1;    /* tmr_val is 32 bits */
00136     u32                 dock_cap    : 1;    /* Supports Docking */
00137     u32                 reserved6   : 22;    /* reserved - must be zero */
00138 
00139 }  FADT_DESCRIPTOR_REV071;
00140 
00141 #pragma pack()
00142 
00143 #endif /* __ACTBL71_H__ */
00144 

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