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00001 /* 00002 * parallel.h 00003 * 00004 * ParPort driver interface 00005 * 00006 * This file is part of the w32api package. 00007 * 00008 * Contributors: 00009 * Created by Casper S. Hornstrup <chorns@users.sourceforge.net> 00010 * 00011 * THIS SOFTWARE IS NOT COPYRIGHTED 00012 * 00013 * This source code is offered for use in the public domain. You may 00014 * use, modify or distribute it freely. 00015 * 00016 * This code is distributed in the hope that it will be useful but 00017 * WITHOUT ANY WARRANTY. ALL WARRANTIES, EXPRESS OR IMPLIED ARE HEREBY 00018 * DISCLAIMED. This includes but is not limited to warranties of 00019 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 00020 * 00021 */ 00022 00023 #ifndef __PARALLEL_H 00024 #define __PARALLEL_H 00025 00026 #include "ntddpar.h" 00027 00028 #ifdef __cplusplus 00029 extern "C" { 00030 #endif 00031 00032 #define DD_PARALLEL_PORT_BASE_NAME "ParallelPort" 00033 #define DD_PARALLEL_PORT_BASE_NAME_U L"ParallelPort" 00034 00035 #define IOCTL_INTERNAL_DESELECT_DEVICE \ 00036 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 24, METHOD_BUFFERED, FILE_ANY_ACCESS) 00037 #define IOCTL_INTERNAL_GET_MORE_PARALLEL_PORT_INFO \ 00038 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 17, METHOD_BUFFERED, FILE_ANY_ACCESS) 00039 #define IOCTL_INTERNAL_GET_PARALLEL_PNP_INFO \ 00040 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 21, METHOD_BUFFERED, FILE_ANY_ACCESS) 00041 #define IOCTL_INTERNAL_GET_PARALLEL_PORT_INFO \ 00042 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 12, METHOD_BUFFERED, FILE_ANY_ACCESS) 00043 #define IOCTL_INTERNAL_INIT_1284_3_BUS \ 00044 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 22, METHOD_BUFFERED, FILE_ANY_ACCESS) 00045 #define IOCTL_INTERNAL_PARALLEL_CLEAR_CHIP_MODE \ 00046 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 20, METHOD_BUFFERED, FILE_ANY_ACCESS) 00047 #define IOCTL_INTERNAL_PARALLEL_CONNECT_INTERRUPT \ 00048 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 13, METHOD_BUFFERED, FILE_ANY_ACCESS) 00049 #define IOCTL_INTERNAL_PARALLEL_DISCONNECT_INTERRUPT \ 00050 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 14, METHOD_BUFFERED, FILE_ANY_ACCESS) 00051 #define IOCTL_INTERNAL_PARALLEL_PORT_ALLOCATE \ 00052 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 11, METHOD_BUFFERED, FILE_ANY_ACCESS) 00053 #define IOCTL_INTERNAL_PARALLEL_PORT_FREE \ 00054 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 40, METHOD_BUFFERED, FILE_ANY_ACCESS) 00055 #define IOCTL_INTERNAL_PARALLEL_SET_CHIP_MODE \ 00056 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 19, METHOD_BUFFERED, FILE_ANY_ACCESS) 00057 #define IOCTL_INTERNAL_RELEASE_PARALLEL_PORT_INFO \ 00058 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 15, METHOD_BUFFERED, FILE_ANY_ACCESS) 00059 #define IOCTL_INTERNAL_SELECT_DEVICE \ 00060 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 23, METHOD_BUFFERED, FILE_ANY_ACCESS) 00061 00062 00063 typedef struct _PARALLEL_1284_COMMAND { 00064 UCHAR ID; 00065 UCHAR Port; 00066 ULONG CommandFlags; 00067 } PARALLEL_1284_COMMAND, *PPARALLEL_1284_COMMAND; 00068 00069 /* PARALLEL_1284_COMMAND.CommandFlags */ 00070 #define PAR_END_OF_CHAIN_DEVICE 0x00000001 00071 #define PAR_HAVE_PORT_KEEP_PORT 0x00000002 00072 00073 typedef struct _MORE_PARALLEL_PORT_INFORMATION { 00074 INTERFACE_TYPE InterfaceType; 00075 ULONG BusNumber; 00076 ULONG InterruptLevel; 00077 ULONG InterruptVector; 00078 KAFFINITY InterruptAffinity; 00079 KINTERRUPT_MODE InterruptMode; 00080 } MORE_PARALLEL_PORT_INFORMATION, *PMORE_PARALLEL_PORT_INFORMATION; 00081 00082 typedef NTSTATUS 00083 (NTAPI *PPARALLEL_SET_CHIP_MODE)( 00084 IN PVOID SetChipContext, 00085 IN UCHAR ChipMode); 00086 00087 typedef NTSTATUS 00088 (NTAPI *PPARALLEL_CLEAR_CHIP_MODE)( 00089 IN PVOID ClearChipContext, 00090 IN UCHAR ChipMode); 00091 00092 typedef NTSTATUS 00093 (NTAPI *PPARCHIP_CLEAR_CHIP_MODE)( 00094 IN PVOID ClearChipContext, 00095 IN UCHAR ChipMode); 00096 00097 typedef NTSTATUS 00098 (NTAPI *PPARALLEL_TRY_SELECT_ROUTINE)( 00099 IN PVOID TrySelectContext, 00100 IN PVOID TrySelectCommand); 00101 00102 typedef NTSTATUS 00103 (NTAPI *PPARALLEL_DESELECT_ROUTINE)( 00104 IN PVOID DeselectContext, 00105 IN PVOID DeselectCommand); 00106 00107 /* PARALLEL_PNP_INFORMATION.HardwareCapabilities */ 00108 #define PPT_NO_HARDWARE_PRESENT 0x00000000 00109 #define PPT_ECP_PRESENT 0x00000001 00110 #define PPT_EPP_PRESENT 0x00000002 00111 #define PPT_EPP_32_PRESENT 0x00000004 00112 #define PPT_BYTE_PRESENT 0x00000008 00113 #define PPT_BIDI_PRESENT 0x00000008 00114 #define PPT_1284_3_PRESENT 0x00000010 00115 00116 typedef struct _PARALLEL_PNP_INFORMATION { 00117 PHYSICAL_ADDRESS OriginalEcpController; 00118 PUCHAR EcpController; 00119 ULONG SpanOfEcpController; 00120 ULONG PortNumber; 00121 ULONG HardwareCapabilities; 00122 PPARALLEL_SET_CHIP_MODE TrySetChipMode; 00123 PPARALLEL_CLEAR_CHIP_MODE ClearChipMode; 00124 ULONG FifoDepth; 00125 ULONG FifoWidth; 00126 PHYSICAL_ADDRESS EppControllerPhysicalAddress; 00127 ULONG SpanOfEppController; 00128 ULONG Ieee1284_3DeviceCount; 00129 PPARALLEL_TRY_SELECT_ROUTINE TrySelectDevice; 00130 PPARALLEL_DESELECT_ROUTINE DeselectDevice; 00131 PVOID Context; 00132 ULONG CurrentMode; 00133 PWSTR PortName; 00134 } PARALLEL_PNP_INFORMATION, *PPARALLEL_PNP_INFORMATION; 00135 00136 typedef BOOLEAN 00137 (NTAPI *PPARALLEL_TRY_ALLOCATE_ROUTINE)( 00138 IN PVOID TryAllocateContext); 00139 00140 typedef VOID 00141 (NTAPI *PPARALLEL_FREE_ROUTINE)( 00142 IN PVOID FreeContext); 00143 00144 typedef ULONG 00145 (NTAPI *PPARALLEL_QUERY_WAITERS_ROUTINE)( 00146 IN PVOID QueryAllocsContext); 00147 00148 typedef struct _PARALLEL_PORT_INFORMATION { 00149 PHYSICAL_ADDRESS OriginalController; 00150 PUCHAR Controller; 00151 ULONG SpanOfController; 00152 PPARALLEL_TRY_ALLOCATE_ROUTINE TryAllocatePort; 00153 PPARALLEL_FREE_ROUTINE FreePort; 00154 PPARALLEL_QUERY_WAITERS_ROUTINE QueryNumWaiters; 00155 PVOID Context; 00156 } PARALLEL_PORT_INFORMATION, *PPARALLEL_PORT_INFORMATION; 00157 00158 /* PARALLEL_CHIP_MODE.ModeFlags */ 00159 #define INITIAL_MODE 0x00 00160 #define PARCHIP_ECR_ARBITRATOR 0x01 00161 00162 typedef struct _PARALLEL_CHIP_MODE { 00163 UCHAR ModeFlags; 00164 BOOLEAN success; 00165 } PARALLEL_CHIP_MODE, *PPARALLEL_CHIP_MODE; 00166 00167 typedef VOID 00168 (NTAPI *PPARALLEL_DEFERRED_ROUTINE)( 00169 IN PVOID DeferredContext); 00170 00171 typedef struct _PARALLEL_INTERRUPT_SERVICE_ROUTINE { 00172 PKSERVICE_ROUTINE InterruptServiceRoutine; 00173 PVOID InterruptServiceContext; 00174 PPARALLEL_DEFERRED_ROUTINE DeferredPortCheckRoutine; 00175 PVOID DeferredPortCheckContext; 00176 } PARALLEL_INTERRUPT_SERVICE_ROUTINE, *PPARALLEL_INTERRUPT_SERVICE_ROUTINE; 00177 00178 00179 #define IOCTL_INTERNAL_DISCONNECT_IDLE \ 00180 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 32, METHOD_BUFFERED, FILE_ANY_ACCESS) 00181 #define IOCTL_INTERNAL_LOCK_PORT \ 00182 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 37, METHOD_BUFFERED, FILE_ANY_ACCESS) 00183 #define IOCTL_INTERNAL_LOCK_PORT_NO_SELECT \ 00184 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 52, METHOD_BUFFERED, FILE_ANY_ACCESS) 00185 #define IOCTL_INTERNAL_PARCLASS_CONNECT \ 00186 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 30, METHOD_BUFFERED, FILE_ANY_ACCESS) 00187 #define IOCTL_INTERNAL_PARCLASS_DISCONNECT \ 00188 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 31, METHOD_BUFFERED, FILE_ANY_ACCESS) 00189 #define IOCTL_INTERNAL_UNLOCK_PORT \ 00190 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 38, METHOD_BUFFERED, FILE_ANY_ACCESS) 00191 #define IOCTL_INTERNAL_UNLOCK_PORT_NO_DESELECT \ 00192 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 53, METHOD_BUFFERED, FILE_ANY_ACCESS) 00193 00194 typedef USHORT 00195 (NTAPI *PDETERMINE_IEEE_MODES)( 00196 IN PVOID Context); 00197 00198 typedef enum _PARALLEL_SAFETY { 00199 SAFE_MODE, 00200 UNSAFE_MODE 00201 } PARALLEL_SAFETY; 00202 00203 typedef NTSTATUS 00204 (NTAPI *PNEGOTIATE_IEEE_MODE)( 00205 IN PVOID Context, 00206 IN USHORT ModeMaskFwd, 00207 IN USHORT ModeMaskRev, 00208 IN PARALLEL_SAFETY ModeSafety, 00209 IN BOOLEAN IsForward); 00210 00211 typedef NTSTATUS 00212 (NTAPI *PTERMINATE_IEEE_MODE)( 00213 IN PVOID Context); 00214 00215 typedef NTSTATUS 00216 (NTAPI *PPARALLEL_IEEE_FWD_TO_REV)( 00217 IN PVOID Context); 00218 00219 typedef NTSTATUS 00220 (NTAPI *PPARALLEL_IEEE_REV_TO_FWD)( 00221 IN PVOID Context); 00222 00223 typedef NTSTATUS 00224 (NTAPI *PPARALLEL_READ)( 00225 IN PVOID Context, 00226 OUT PVOID Buffer, 00227 IN ULONG NumBytesToRead, 00228 OUT PULONG NumBytesRead, 00229 IN UCHAR Channel); 00230 00231 typedef NTSTATUS 00232 (NTAPI *PPARALLEL_WRITE)( 00233 IN PVOID Context, 00234 OUT PVOID Buffer, 00235 IN ULONG NumBytesToWrite, 00236 OUT PULONG NumBytesWritten, 00237 IN UCHAR Channel); 00238 00239 typedef NTSTATUS 00240 (NTAPI *PPARALLEL_TRYSELECT_DEVICE)( 00241 IN PVOID Context, 00242 IN PARALLEL_1284_COMMAND Command); 00243 00244 typedef NTSTATUS 00245 (NTAPI *PPARALLEL_DESELECT_DEVICE)( 00246 IN PVOID Context, 00247 IN PARALLEL_1284_COMMAND Command); 00248 00249 typedef struct _PARCLASS_INFORMATION { 00250 PUCHAR Controller; 00251 PUCHAR EcrController; 00252 ULONG SpanOfController; 00253 PDETERMINE_IEEE_MODES DetermineIeeeModes; 00254 PNEGOTIATE_IEEE_MODE NegotiateIeeeMode; 00255 PTERMINATE_IEEE_MODE TerminateIeeeMode; 00256 PPARALLEL_IEEE_FWD_TO_REV IeeeFwdToRevMode; 00257 PPARALLEL_IEEE_REV_TO_FWD IeeeRevToFwdMode; 00258 PPARALLEL_READ ParallelRead; 00259 PPARALLEL_WRITE ParallelWrite; 00260 PVOID ParclassContext; 00261 ULONG HardwareCapabilities; 00262 ULONG FifoDepth; 00263 ULONG FifoWidth; 00264 PPARALLEL_TRYSELECT_DEVICE ParallelTryselect; 00265 PPARALLEL_DESELECT_DEVICE ParallelDeSelect; 00266 } PARCLASS_INFORMATION, *PPARCLASS_INFORMATION; 00267 00268 #ifdef __cplusplus 00269 } 00270 #endif 00271 00272 #endif /* __PARALLEL_H */ Generated on Wed May 23 2012 04:25:58 for ReactOS by
1.7.6.1
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